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https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
deal with some strict aliasing issues
This commit is contained in:
parent
a76fad4129
commit
895d15121b
6 changed files with 38 additions and 17 deletions
10
Makefile
10
Makefile
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@ -151,6 +151,16 @@ tools/textfilter: tools/textfilter.c
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.s.o:
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.s.o:
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$(CC) $(CFLAGS) -c $< -o $@
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$(CC) $(CFLAGS) -c $< -o $@
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# special flags - perhaps fix this someday instead?
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pico/draw.o: CFLAGS += -fno-strict-aliasing
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pico/draw2.o: CFLAGS += -fno-strict-aliasing
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pico/mode4.o: CFLAGS += -fno-strict-aliasing
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pico/cd/memory.o: CFLAGS += -fno-strict-aliasing
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pico/cd/cd_file.o: CFLAGS += -fno-strict-aliasing
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pico/cd/pcm.o: CFLAGS += -fno-strict-aliasing
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pico/cd/LC89510.o: CFLAGS += -fno-strict-aliasing
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pico/cd/gfx_cd.o: CFLAGS += -fno-strict-aliasing
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# random deps
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# random deps
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pico/carthw/svp/compiler.o : cpu/drc/emit_$(ARCH).c
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pico/carthw/svp/compiler.o : cpu/drc/emit_$(ARCH).c
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cpu/sh2/compiler.o : cpu/drc/emit_$(ARCH).c
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cpu/sh2/compiler.o : cpu/drc/emit_$(ARCH).c
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@ -1110,8 +1110,11 @@ static void emit_or_t_if_eq(int srr)
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// reg cache must be clean before call
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// reg cache must be clean before call
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static int emit_memhandler_read_(int size, int ram_check)
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static int emit_memhandler_read_(int size, int ram_check)
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{
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{
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int arg0, arg1;
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int arg1;
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#if 0
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int arg0;
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host_arg2reg(arg0, 0);
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host_arg2reg(arg0, 0);
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#endif
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rcache_clean();
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rcache_clean();
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@ -3179,7 +3182,7 @@ void sh2_drc_flush_all(void)
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void sh2_drc_mem_setup(SH2 *sh2)
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void sh2_drc_mem_setup(SH2 *sh2)
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{
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{
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// fill the convenience pointers
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// fill the convenience pointers
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sh2->p_bios = sh2->is_slave ? Pico32xMem->sh2_rom_s : Pico32xMem->sh2_rom_m;
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sh2->p_bios = sh2->is_slave ? Pico32xMem->sh2_rom_s.w : Pico32xMem->sh2_rom_m.w;
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sh2->p_da = sh2->data_array;
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sh2->p_da = sh2->data_array;
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sh2->p_sdram = Pico32xMem->sdram;
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sh2->p_sdram = Pico32xMem->sdram;
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sh2->p_rom = Pico.rom;
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sh2->p_rom = Pico.rom;
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@ -3293,7 +3296,7 @@ static void *dr_get_pc_base(u32 pc, int is_slave)
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if ((pc & ~0x7ff) == 0) {
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if ((pc & ~0x7ff) == 0) {
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// BIOS
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// BIOS
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ret = is_slave ? Pico32xMem->sh2_rom_s : Pico32xMem->sh2_rom_m;
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ret = is_slave ? Pico32xMem->sh2_rom_s.w : Pico32xMem->sh2_rom_m.w;
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mask = 0x7ff;
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mask = 0x7ff;
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}
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}
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else if ((pc & 0xfffff000) == 0xc0000000) {
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else if ((pc & 0xfffff000) == 0xc0000000) {
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@ -1208,9 +1208,9 @@ static u32 sh2_read8_cs0(u32 a, SH2 *sh2)
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// TODO: mirroring?
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// TODO: mirroring?
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if (!sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_m))
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if (!sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_m))
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return Pico32xMem->sh2_rom_m[a ^ 1];
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return Pico32xMem->sh2_rom_m.b[a ^ 1];
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if (sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_s))
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if (sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_s))
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return Pico32xMem->sh2_rom_s[a ^ 1];
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return Pico32xMem->sh2_rom_s.b[a ^ 1];
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if ((a & 0x3fe00) == 0x4200) {
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if ((a & 0x3fe00) == 0x4200) {
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d = Pico32xMem->pal[(a & 0x1ff) / 2];
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d = Pico32xMem->pal[(a & 0x1ff) / 2];
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@ -1263,9 +1263,9 @@ static u32 sh2_read16_cs0(u32 a, SH2 *sh2)
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}
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}
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if (!sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_m))
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if (!sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_m))
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return *(u16 *)(Pico32xMem->sh2_rom_m + a);
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return Pico32xMem->sh2_rom_m.w[a / 2];
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if (sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_s))
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if (sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_s))
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return *(u16 *)(Pico32xMem->sh2_rom_s + a);
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return Pico32xMem->sh2_rom_s.w[a / 2];
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if ((a & 0x3fe00) == 0x4200) {
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if ((a & 0x3fe00) == 0x4200) {
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d = Pico32xMem->pal[(a & 0x1ff) / 2];
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d = Pico32xMem->pal[(a & 0x1ff) / 2];
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@ -1619,17 +1619,17 @@ static void get_bios(void)
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// MSH2
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// MSH2
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if (p32x_bios_m != NULL) {
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if (p32x_bios_m != NULL) {
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elprintf(EL_STATUS|EL_32X, "32x: using supplied master SH2 BIOS");
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elprintf(EL_STATUS|EL_32X, "32x: using supplied master SH2 BIOS");
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Byteswap(Pico32xMem->sh2_rom_m, p32x_bios_m, sizeof(Pico32xMem->sh2_rom_m));
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Byteswap(&Pico32xMem->sh2_rom_m, p32x_bios_m, sizeof(Pico32xMem->sh2_rom_m));
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}
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}
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else {
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else {
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pl = (u32 *)Pico32xMem->sh2_rom_m;
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pl = (u32 *)&Pico32xMem->sh2_rom_m;
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// fill exception vector table to our trap address
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// fill exception vector table to our trap address
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for (i = 0; i < 128; i++)
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for (i = 0; i < 128; i++)
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pl[i] = HWSWAP(0x200);
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pl[i] = HWSWAP(0x200);
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// startup code
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// startup code
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memcpy(Pico32xMem->sh2_rom_m + 0x200, msh2_code, sizeof(msh2_code));
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memcpy(&Pico32xMem->sh2_rom_m.b[0x200], msh2_code, sizeof(msh2_code));
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// reset SP
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// reset SP
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pl[1] = pl[3] = HWSWAP(0x6040000);
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pl[1] = pl[3] = HWSWAP(0x6040000);
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@ -1640,17 +1640,17 @@ static void get_bios(void)
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// SSH2
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// SSH2
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if (p32x_bios_s != NULL) {
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if (p32x_bios_s != NULL) {
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elprintf(EL_STATUS|EL_32X, "32x: using supplied slave SH2 BIOS");
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elprintf(EL_STATUS|EL_32X, "32x: using supplied slave SH2 BIOS");
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Byteswap(Pico32xMem->sh2_rom_s, p32x_bios_s, sizeof(Pico32xMem->sh2_rom_s));
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Byteswap(&Pico32xMem->sh2_rom_s, p32x_bios_s, sizeof(Pico32xMem->sh2_rom_s));
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}
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}
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else {
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else {
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pl = (u32 *)Pico32xMem->sh2_rom_s;
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pl = (u32 *)&Pico32xMem->sh2_rom_s;
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// fill exception vector table to our trap address
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// fill exception vector table to our trap address
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for (i = 0; i < 128; i++)
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for (i = 0; i < 128; i++)
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pl[i] = HWSWAP(0x200);
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pl[i] = HWSWAP(0x200);
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// startup code
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// startup code
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memcpy(Pico32xMem->sh2_rom_s + 0x200, ssh2_code, sizeof(ssh2_code));
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memcpy(&Pico32xMem->sh2_rom_s.b[0x200], ssh2_code, sizeof(ssh2_code));
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// reset SP
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// reset SP
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pl[1] = pl[3] = HWSWAP(0x603f800);
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pl[1] = pl[3] = HWSWAP(0x603f800);
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@ -43,7 +43,7 @@ PICO_INTERNAL int PicoResetMCD(void)
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memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
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memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
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memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
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memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
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*(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
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memset(Pico_mcd->bios + 0x70, 0xff, 4); // reset hint vector (simplest way to implement reg6)
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Pico_mcd->m.state_flags |= 1; // s68k reset pending
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Pico_mcd->m.state_flags |= 1; // s68k reset pending
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Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
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Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
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@ -441,6 +441,7 @@ typedef struct
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unsigned char pcm_ram[0x10000];
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unsigned char pcm_ram[0x10000];
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unsigned char pcm_ram_b[0x10][0x1000];
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unsigned char pcm_ram_b[0x10][0x1000];
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};
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};
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// FIXME: should be short
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unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
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unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
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unsigned char bram[0x2000]; // 110200: 8K
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unsigned char bram[0x2000]; // 110200: 8K
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struct mcd_misc m; // 112200: misc
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struct mcd_misc m; // 112200: misc
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@ -543,8 +544,14 @@ struct Pico32xMem
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#ifdef DRC_SH2
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#ifdef DRC_SH2
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unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
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unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
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#endif
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#endif
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unsigned char sh2_rom_m[0x800];
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union {
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unsigned char sh2_rom_s[0x400];
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unsigned char b[0x800];
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unsigned short w[0x800/2];
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} sh2_rom_m;
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union {
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unsigned char b[0x400];
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unsigned short w[0x400/2];
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} sh2_rom_s;
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unsigned short pal[0x100];
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unsigned short pal[0x100];
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unsigned short pal_native[0x100]; // converted to native (for renderer)
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unsigned short pal_native[0x100]; // converted to native (for renderer)
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signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame
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signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame
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@ -290,7 +290,8 @@ static int state_save(void *file)
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SekPackCpu(buff, 1);
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SekPackCpu(buff, 1);
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if (Pico_mcd->s68k_regs[3] & 4) // 1M mode?
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if (Pico_mcd->s68k_regs[3] & 4) // 1M mode?
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wram_1M_to_2M(Pico_mcd->word_ram2M);
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wram_1M_to_2M(Pico_mcd->word_ram2M);
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Pico_mcd->m.hint_vector = *(unsigned short *)(Pico_mcd->bios + 0x72);
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memcpy(&Pico_mcd->m.hint_vector, Pico_mcd->bios + 0x72,
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sizeof(Pico_mcd->m.hint_vector));
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CHECKED_WRITE_BUFF(CHUNK_S68K, buff);
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CHECKED_WRITE_BUFF(CHUNK_S68K, buff);
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CHECKED_WRITE_BUFF(CHUNK_PRG_RAM, Pico_mcd->prg_ram);
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CHECKED_WRITE_BUFF(CHUNK_PRG_RAM, Pico_mcd->prg_ram);
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