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drc: revive x86 dynarec, support x86-64
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notaz
parent
91be5ebd10
commit
898d51a7fd
10 changed files with 285 additions and 123 deletions
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@ -326,6 +326,27 @@ static temp_reg_t reg_temp[] = {
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{ xDX, },
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};
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#elif defined(__x86_64__)
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#include "../drc/emit_x86.c"
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static const int reg_map_g2h[] = {
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-1, -1, -1, -1,
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-1, -1, -1, -1,
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-1, -1, -1, -1,
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-1, -1, -1, -1,
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-1, -1, -1, xBX,
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-1, -1, -1, -1,
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};
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// ax, cx, dx are usually temporaries by convention
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static temp_reg_t reg_temp[] = {
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{ xAX, },
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{ xCX, },
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{ xDX, },
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{ xSI, },
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{ xDI, },
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};
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#else
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#error unsupported arch
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#endif
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@ -919,13 +940,12 @@ do_alloc:
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return tr->hreg;
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}
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static int rcache_get_arg_id(int arg)
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static int rcache_get_hr_id(int hr)
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{
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int i, r = 0;
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host_arg2reg(r, arg);
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int i;
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for (i = 0; i < ARRAY_SIZE(reg_temp); i++)
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if (reg_temp[i].hreg == r)
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if (reg_temp[i].hreg == hr)
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break;
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if (i == ARRAY_SIZE(reg_temp)) // can't happen
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@ -938,7 +958,7 @@ static int rcache_get_arg_id(int arg)
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gconst_check_evict(reg_temp[i].greg);
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}
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else if (reg_temp[i].type == HR_TEMP) {
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printf("arg %d reg %d already used, aborting\n", arg, r);
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printf("host reg %d already used, aborting\n", hr);
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exit(1);
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}
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@ -948,6 +968,13 @@ static int rcache_get_arg_id(int arg)
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return i;
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}
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static int rcache_get_arg_id(int arg)
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{
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int r = 0;
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host_arg2reg(r, arg);
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return rcache_get_hr_id(r);
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}
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// get a reg to be used as function arg
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static int rcache_get_tmp_arg(int arg)
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{
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@ -957,6 +984,15 @@ static int rcache_get_tmp_arg(int arg)
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return reg_temp[id].hreg;
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}
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// ... as return value after a call
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static int rcache_get_tmp_ret(void)
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{
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int id = rcache_get_hr_id(RET_REG);
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reg_temp[id].type = HR_TEMP;
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return reg_temp[id].hreg;
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}
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// same but caches a reg. RC_GR_READ only.
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static int rcache_get_reg_arg(int arg, sh2_reg_e r)
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{
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@ -1104,8 +1140,8 @@ static int emit_get_rbase_and_offs(u32 a, u32 *offs)
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// XXX: could use some related reg
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hr = rcache_get_tmp();
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emith_ctx_read(hr, poffs);
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emith_add_r_imm(hr, a & mask & ~0xff);
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emith_ctx_read_ptr(hr, poffs);
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emith_add_r_r_ptr_imm(hr, hr, a & mask & ~0xff);
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*offs = a & 0xff; // XXX: ARM oriented..
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return hr;
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}
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@ -1154,7 +1190,7 @@ static int emit_memhandler_read_(int size, int ram_check)
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emith_ctx_write(reg_map_g2h[SHR_SR], SHR_SR * 4);
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arg1 = rcache_get_tmp_arg(1);
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emith_move_r_r(arg1, CONTEXT_REG);
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emith_move_r_r_ptr(arg1, CONTEXT_REG);
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#if 0 // can't do this because of unmapped reads
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// ndef PDB_NET
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@ -1208,8 +1244,7 @@ static int emit_memhandler_read_(int size, int ram_check)
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if (reg_map_g2h[SHR_SR] != -1)
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emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4);
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// assuming arg0 and retval reg matches
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return rcache_get_tmp_arg(0);
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return rcache_get_tmp_ret();
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}
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static int emit_memhandler_read(int size)
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@ -1279,7 +1314,7 @@ static void emit_memhandler_write(int size)
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emith_call(sh2_drc_write16);
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break;
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case 2: // 32
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emith_move_r_r(ctxr, CONTEXT_REG);
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emith_move_r_r_ptr(ctxr, CONTEXT_REG);
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emith_call(sh2_drc_write32);
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break;
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}
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@ -1351,26 +1386,23 @@ static void emit_do_static_regs(int is_write, int tmpr)
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}
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}
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/* just after lookup function, jump to address returned */
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static void emit_block_entry(void)
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{
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int arg0;
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host_arg2reg(arg0, 0);
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#if (DRC_DEBUG & 8) || defined(PDB)
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int arg1, arg2;
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host_arg2reg(arg1, 1);
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host_arg2reg(arg2, 2);
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emit_do_static_regs(1, arg2);
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emith_move_r_r(arg1, CONTEXT_REG);
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emith_move_r_r_ptr(arg1, CONTEXT_REG);
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emith_move_r_r(arg2, rcache_get_reg(SHR_SR, RC_GR_READ));
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emith_call(sh2_drc_log_entry);
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rcache_invalidate();
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#endif
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emith_tst_r_r(arg0, arg0);
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emith_tst_r_r(RET_REG, RET_REG);
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EMITH_SJMP_START(DCOND_EQ);
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emith_jump_reg_c(DCOND_NE, arg0);
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emith_jump_reg_c(DCOND_NE, RET_REG);
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EMITH_SJMP_END(DCOND_EQ);
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}
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@ -2703,14 +2735,18 @@ end_op:
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struct op_data *opd_b =
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(op_flags[i] & OF_DELAY_OP) ? &ops[i-1] : opd;
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u32 target_pc = opd_b->imm;
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int cond = -1;
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int cond = -1, ncond = -1;
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void *target = NULL;
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EMITH_SJMP_DECL_();
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sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
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FLUSH_CYCLES(sr);
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rcache_clean();
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if (opd_b->op != OP_BRANCH)
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if (opd_b->op != OP_BRANCH) {
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cond = (opd_b->op == OP_BRANCH_CF) ? DCOND_EQ : DCOND_NE;
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ncond = (opd_b->op == OP_BRANCH_CF) ? DCOND_NE : DCOND_EQ;
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}
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if (cond != -1) {
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int ctaken = (op_flags[i] & OF_DELAY_OP) ? 1 : 2;
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@ -2719,9 +2755,9 @@ end_op:
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else
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emith_tst_r_imm(sr, T);
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EMITH_SJMP_START_(ncond);
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emith_sub_r_imm_c(cond, sr, ctaken<<12);
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}
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rcache_clean();
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#if LINK_BRANCHES
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if (find_in_array(branch_target_pc, branch_target_count, target_pc) >= 0)
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@ -2750,8 +2786,10 @@ end_op:
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return NULL;
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}
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if (cond != -1)
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if (cond != -1) {
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emith_jump_cond_patchable(cond, target);
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EMITH_SJMP_END_(ncond);
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}
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else {
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emith_jump_patchable(target);
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rcache_invalidate();
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@ -2906,18 +2944,18 @@ static void sh2_generate_utils(void)
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rcache_invalidate();
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emith_ctx_read(arg0, SHR_PC * 4);
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emith_ctx_read(arg1, offsetof(SH2, is_slave));
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emith_add_r_r_imm(arg2, CONTEXT_REG, offsetof(SH2, drc_tmp));
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emith_add_r_r_ptr_imm(arg2, CONTEXT_REG, offsetof(SH2, drc_tmp));
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emith_call(dr_lookup_block);
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emit_block_entry();
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// lookup failed, call sh2_translate()
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emith_move_r_r(arg0, CONTEXT_REG);
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emith_move_r_r_ptr(arg0, CONTEXT_REG);
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emith_ctx_read(arg1, offsetof(SH2, drc_tmp)); // tcache_id
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emith_call(sh2_translate);
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emit_block_entry();
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// sh2_translate() failed, flush cache and retry
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emith_ctx_read(arg0, offsetof(SH2, drc_tmp));
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emith_call(flush_tcache);
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emith_move_r_r(arg0, CONTEXT_REG);
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emith_move_r_r_ptr(arg0, CONTEXT_REG);
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emith_ctx_read(arg1, offsetof(SH2, drc_tmp));
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emith_call(sh2_translate);
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emit_block_entry();
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@ -2944,13 +2982,13 @@ static void sh2_generate_utils(void)
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emith_add_r_imm(tmp, 4);
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tmp = rcache_get_reg_arg(1, SHR_SR);
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emith_clear_msb(tmp, tmp, 22);
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emith_move_r_r(arg2, CONTEXT_REG);
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emith_move_r_r_ptr(arg2, CONTEXT_REG);
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emith_call(p32x_sh2_write32); // XXX: use sh2_drc_write32?
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rcache_invalidate();
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// push PC
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rcache_get_reg_arg(0, SHR_SP);
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emith_ctx_read(arg1, SHR_PC * 4);
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emith_move_r_r(arg2, CONTEXT_REG);
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emith_move_r_r_ptr(arg2, CONTEXT_REG);
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emith_call(p32x_sh2_write32);
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rcache_invalidate();
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// update I, cycles, do callback
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@ -2960,16 +2998,16 @@ static void sh2_generate_utils(void)
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emith_or_r_r_lsl(sr, arg1, I_SHIFT);
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emith_sub_r_imm(sr, 13 << 12); // at least 13 cycles
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rcache_flush();
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emith_move_r_r(arg0, CONTEXT_REG);
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emith_move_r_r_ptr(arg0, CONTEXT_REG);
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emith_call_ctx(offsetof(SH2, irq_callback)); // vector = sh2->irq_callback(sh2, level);
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// obtain new PC
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emith_lsl(arg0, arg0, 2);
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emith_lsl(arg0, RET_REG, 2);
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emith_ctx_read(arg1, SHR_VBR * 4);
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emith_add_r_r(arg0, arg1);
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emit_memhandler_read(2);
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emith_ctx_write(arg0, SHR_PC * 4);
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#ifdef __i386__
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emith_add_r_imm(xSP, 4); // fix stack
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tmp = emit_memhandler_read(2);
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emith_ctx_write(tmp, SHR_PC * 4);
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#if defined(__i386__) || defined(__x86_64__)
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emith_add_r_r_ptr_imm(xSP, xSP, sizeof(void *)); // fix stack
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#endif
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emith_jump(sh2_drc_dispatcher);
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rcache_invalidate();
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@ -2977,19 +3015,19 @@ static void sh2_generate_utils(void)
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// sh2_drc_entry(SH2 *sh2)
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sh2_drc_entry = (void *)tcache_ptr;
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emith_sh2_drc_entry();
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emith_move_r_r(CONTEXT_REG, arg0); // move ctx, arg0
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emith_move_r_r_ptr(CONTEXT_REG, arg0); // move ctx, arg0
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emit_do_static_regs(0, arg2);
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emith_call(sh2_drc_test_irq);
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emith_jump(sh2_drc_dispatcher);
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// sh2_drc_write8(u32 a, u32 d)
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sh2_drc_write8 = (void *)tcache_ptr;
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emith_ctx_read(arg2, offsetof(SH2, write8_tab));
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emith_ctx_read_ptr(arg2, offsetof(SH2, write8_tab));
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emith_sh2_wcall(arg0, arg2);
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// sh2_drc_write16(u32 a, u32 d)
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sh2_drc_write16 = (void *)tcache_ptr;
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emith_ctx_read(arg2, offsetof(SH2, write16_tab));
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emith_ctx_read_ptr(arg2, offsetof(SH2, write16_tab));
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emith_sh2_wcall(arg0, arg2);
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#ifdef PDB_NET
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@ -3015,7 +3053,7 @@ static void sh2_generate_utils(void)
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emith_ctx_read(arg2, offsetof(SH2, pdb_io_csum[1])); \
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emith_adc_r_imm(arg2, 0x01000000); \
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emith_ctx_write(arg2, offsetof(SH2, pdb_io_csum[1])); \
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emith_move_r_r(arg2, CONTEXT_REG); \
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emith_move_r_r_ptr(arg2, CONTEXT_REG); \
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emith_jump(func); \
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func = tmp; \
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}
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