32x: implement standard/ssf2 mapper

cpu/sh2/compiler.c

@@ -2912,8 +2912,10 @@ end_op:
     tcache_id, blkid_main,
     tcache_ptr - tcache_bases[tcache_id], tcache_sizes[tcache_id],
     insns_compiled, host_insn_count, (float)host_insn_count / insns_compiled);
-  if ((sh2->pc & 0xc6000000) == 0x02000000) // ROM
+  if ((sh2->pc & 0xc6000000) == 0x02000000) { // ROM
     dbg(2, "  hash collisions %d/%d", hash_collisions, block_counts[tcache_id]);
+    Pico32x.emu_flags |= P32XF_DRC_ROM_C;
+  }
 /*
  printf("~~~\n");
  tcache_dsm_ptrs[tcache_id] = block_entry_ptr;
@@ -3292,6 +3294,7 @@ void sh2_drc_flush_all(void)
   flush_tcache(0);
   flush_tcache(1);
   flush_tcache(2);
+  Pico32x.emu_flags &= ~P32XF_DRC_ROM_C;
 }
 
 void sh2_drc_mem_setup(SH2 *sh2)

pico/32x/memory.c

@@ -47,7 +47,7 @@ static const char str_mars[] = "MARS";
 void *p32x_bios_g, *p32x_bios_m, *p32x_bios_s;
 struct Pico32xMem *Pico32xMem;
 
-static void bank_switch(int b);
+static void bank_switch_rom_68k(int b);
 
 // addressing byte in 16bit reg
 #define REG8IN16(ptr, offs) ((u8 *)ptr)[(offs) ^ 1]
@@ -276,7 +276,7 @@ static void p32x_reg_write8(u32 a, u32 d)
       d &= 3;
       if (r[0x04 / 2] != d) {
         r[0x04 / 2] = d;
-        bank_switch(d);
+        bank_switch_rom_68k(d);
       }
       return;
     case 0x06: // ignored, always 0
@@ -862,7 +862,7 @@ static void PicoWrite8_32x_on(u32 a, u32 d)
     else
       PicoWrite8_io(a, d);
     if (a == 0xa130f1)
-      bank_switch(Pico32x.regs[4 / 2]);
+      bank_switch_rom_68k(Pico32x.regs[4 / 2]);
     return;
   }
 
@@ -900,7 +900,7 @@ static void PicoWrite16_32x_on(u32 a, u32 d)
     else
       PicoWrite16_io(a, d);
     if (a == 0xa130f0)
-      bank_switch(Pico32x.regs[4 / 2]);
+      bank_switch_rom_68k(Pico32x.regs[4 / 2]);
     return;
   }
 
@@ -1145,9 +1145,9 @@ static void bank_map_handler(void)
   cpu68k_map_set(m68k_read16_map,  0x900000, 0x9fffff, PicoRead16_bank, 1);
 }
 
-static void bank_switch(int b)
+static void bank_switch_rom_68k(int b)
 {
-  unsigned int rs, bank;
+  unsigned int rs, bank, bank2;
 
   if (Pico.m.ncart_in)
     return;
@@ -1164,16 +1164,26 @@ static void bank_switch(int b)
     return;
   }
 
-  // 32X ROM (unbanked, XXX: consider mirroring?)
+  // 32X ROM (XXX: consider mirroring?)
   rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
+  if (!carthw_ssf2_active) {
     rs -= bank;
     if (rs > 0x100000)
       rs = 0x100000;
     cpu68k_map_set(m68k_read8_map,  0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
     cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
-
     elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
   }
+  else {
+    bank = bank >> 19;
+    bank2 = carthw_ssf2_banks[bank + 0] << 19;
+    cpu68k_map_set(m68k_read8_map,  0x900000, 0x97ffff, Pico.rom + bank2, 0);
+    cpu68k_map_set(m68k_read16_map, 0x900000, 0x97ffff, Pico.rom + bank2, 0);
+    bank2 = carthw_ssf2_banks[bank + 1] << 19;
+    cpu68k_map_set(m68k_read8_map,  0x980000, 0x9fffff, Pico.rom + bank2, 0);
+    cpu68k_map_set(m68k_read16_map, 0x980000, 0x9fffff, Pico.rom + bank2, 0);
+  }
+}
 
 // -----------------------------------------------------------------
 //                              SH2  
@@ -1234,6 +1244,13 @@ static u32 sh2_read8_da(u32 a, SH2 *sh2)
   return sh2->data_array[(a & 0xfff) ^ 1];
 }
 
+// for ssf2
+static u32 sh2_read8_rom(u32 a, SH2 *sh2)
+{
+  u32 bank = carthw_ssf2_banks[(a >> 19) & 7] << 19;
+  return Pico.rom[(bank + (a & 0x7ffff)) ^ 1];
+}
+
 // read16
 static u32 sh2_read16_unmapped(u32 a, SH2 *sh2)
 {
@@ -1284,6 +1301,12 @@ static u32 sh2_read16_da(u32 a, SH2 *sh2)
   return ((u16 *)sh2->data_array)[(a & 0xfff) / 2];
 }
 
+static u32 sh2_read16_rom(u32 a, SH2 *sh2)
+{
+  u32 bank = carthw_ssf2_banks[(a >> 19) & 7] << 19;
+  return *(u16 *)(Pico.rom + bank + (a & 0x7fffe));
+}
+
 // writes
 static void REGPARM(3) sh2_write_ignore(u32 a, u32 d, SH2 *sh2)
 {
@@ -1750,6 +1773,19 @@ void Pico32xSwapDRAM(int b)
   sh2_write16_map[0x04/2] = sh2_write16_map[0x24/2] = b ? sh2_write16_dram1 : sh2_write16_dram0;
 }
 
+static void bank_switch_rom_sh2(void)
+{
+  if (!carthw_ssf2_active) {
+    // easy
+    sh2_read8_map[0x02/2].addr  = sh2_read8_map[0x22/2].addr  =
+    sh2_read16_map[0x02/2].addr = sh2_read16_map[0x22/2].addr = MAP_MEMORY(Pico.rom);
+  }
+  else {
+    sh2_read8_map[0x02/2].addr  = sh2_read8_map[0x22/2].addr  = MAP_HANDLER(sh2_read8_rom);
+    sh2_read16_map[0x02/2].addr = sh2_read16_map[0x22/2].addr = MAP_HANDLER(sh2_read16_rom);
+  }
+}
+
 void PicoMemSetup32x(void)
 {
   unsigned int rs;
@@ -1784,15 +1820,9 @@ void PicoMemSetup32x(void)
     cpu68k_map_set(m68k_read16_map,  0x880000, 0x880000 + rs - 1, Pico.rom, 0);
     cpu68k_map_set(m68k_write8_map,  0x880000, 0x880000 + rs - 1, PicoWrite8_cart, 1);
     cpu68k_map_set(m68k_write16_map, 0x880000, 0x880000 + rs - 1, PicoWrite16_cart, 1);
-#ifdef EMU_F68K
-    // setup FAME fetchmap
-    PicoCpuFM68k.Fetch[0] = (uptr)Pico32xMem->m68k_rom;
-    for (rs = 0x88; rs < 0x90; rs++)
-      PicoCpuFM68k.Fetch[rs] = (uptr)Pico.rom - 0x880000;
-#endif
 
     // 32X ROM (banked)
-    bank_switch(0);
+    bank_switch_rom_68k(0);
     cpu68k_map_set(m68k_write8_map,  0x900000, 0x9fffff, PicoWrite8_bank, 1);
     cpu68k_map_set(m68k_write16_map, 0x900000, 0x9fffff, PicoWrite16_bank, 1);
   }
@@ -1827,8 +1857,7 @@ void PicoMemSetup32x(void)
   sh2_write8_map[0x00/2]  = sh2_write8_map[0x20/2]  = sh2_write8_cs0;
   sh2_write16_map[0x00/2] = sh2_write16_map[0x20/2] = sh2_write16_cs0;
   // CS1 - ROM
-  sh2_read8_map[0x02/2].addr  = sh2_read8_map[0x22/2].addr  =
+  bank_switch_rom_sh2();
-  sh2_read16_map[0x02/2].addr = sh2_read16_map[0x22/2].addr = MAP_MEMORY(Pico.rom);
   sh2_read8_map[0x02/2].mask  = sh2_read8_map[0x22/2].mask  =
   sh2_read16_map[0x02/2].mask = sh2_read16_map[0x22/2].mask = 0x3fffff; // FIXME
   // CS2 - DRAM - done by Pico32xSwapDRAM()
@@ -1868,9 +1897,17 @@ void PicoMemSetup32x(void)
   z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write_32x, 1);
 }
 
+void p32x_update_banks(void)
+{
+  bank_switch_rom_68k(Pico32x.regs[4 / 2]);
+  bank_switch_rom_sh2();
+  if (Pico32x.emu_flags & P32XF_DRC_ROM_C)
+    sh2_drc_flush_all();
+}
+
 void Pico32xMemStateLoaded(void)
 {
-  bank_switch(Pico32x.regs[4 / 2]);
+  bank_switch_rom_68k(Pico32x.regs[4 / 2]);
   Pico32xSwapDRAM((Pico32x.vdp_regs[0x0a / 2] & P32XV_FS) ^ P32XV_FS);
   memset(Pico32xMem->pwm, 0, sizeof(Pico32xMem->pwm));
   Pico32x.dirty_pal = 1;

pico/cart.c

@@ -778,7 +778,8 @@ static int is_expr(const char *expr, char **pr)
 
 #include "carthw_cfg.c"
 
-static void parse_carthw(const char *carthw_cfg, int *fill_sram)
+static void parse_carthw(const char *carthw_cfg, int *fill_sram,
+  int *hw_detected)
 {
   int line = 0, any_checks_passed = 0, skip_sect = 0;
   const char *s, *builtin = builtin_carthw_cfg;
@@ -902,6 +903,7 @@ static void parse_carthw(const char *carthw_cfg, int *fill_sram)
     if (is_expr("hw", &p)) {
       if (!any_checks_passed)
         goto no_checks;
+      *hw_detected = 1;
       rstrip(p);
 
       if      (strcmp(p, "svp") == 0)
@@ -925,6 +927,7 @@ static void parse_carthw(const char *carthw_cfg, int *fill_sram)
       else {
         elprintf(EL_STATUS, "carthw:%d: unsupported mapper: %s", line, p);
         skip_sect = 1;
+        *hw_detected = 0;
       }
       continue;
     }
@@ -1038,6 +1041,7 @@ no_checks:
  */
 static void PicoCartDetect(const char *carthw_cfg)
 {
+  int carthw_detected = 0;
   int fill_sram = 0;
 
   memset(&Pico.sv, 0, sizeof(Pico.sv));
@@ -1067,7 +1071,11 @@ static void PicoCartDetect(const char *carthw_cfg)
   Pico.sv.eeprom_bit_out= 0;
 
   if (carthw_cfg != NULL)
-    parse_carthw(carthw_cfg, &fill_sram);
+    parse_carthw(carthw_cfg, &fill_sram, &carthw_detected);
+
+  // assume the standard mapper for large roms
+  if (!carthw_detected && Pico.romsize > 0x400000)
+    carthw_ssf2_startup();
 
   if (Pico.sv.flags & SRF_ENABLED)
   {

pico/carthw/carthw.c

@@ -21,12 +21,13 @@ static int have_bank(u32 base)
   return 1;
 }
 
-/* The SSFII mapper */
+/* standard/ssf2 mapper */
-static unsigned char ssf2_banks[8];
+int carthw_ssf2_active;
+unsigned char carthw_ssf2_banks[8];
 
 static carthw_state_chunk carthw_ssf2_state[] =
 {
-	{ CHUNK_CARTHW, sizeof(ssf2_banks), &ssf2_banks },
+  { CHUNK_CARTHW, sizeof(carthw_ssf2_banks), &carthw_ssf2_banks },
   { 0,            0,                         NULL }
 };
 
@@ -42,15 +43,19 @@ static void carthw_ssf2_write8(u32 a, u32 d)
   a &= 0x0e;
   if (a == 0)
     return;
+  if (carthw_ssf2_banks[a >> 1] == d)
+    return;
 
-	ssf2_banks[a >> 1] = d;
   base = d << 19;
   target = a << 18;
   if (!have_bank(base))
     return;
+  carthw_ssf2_banks[a >> 1] = d;
 
   cpu68k_map_set(m68k_read8_map,  target, target + 0x80000 - 1, Pico.rom + base, 0);
   cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
+  if (PicoIn.AHW & PAHW_32X)
+    p32x_update_banks();
 }
 
 static void carthw_ssf2_mem_setup(void)
@@ -62,7 +67,13 @@ static void carthw_ssf2_statef(void)
 {
   int i;
   for (i = 1; i < 8; i++)
-		carthw_ssf2_write8(0xa130f0 | (i << 1), ssf2_banks[i]);
+    carthw_ssf2_write8(0xa130f0 | (i << 1), carthw_ssf2_banks[i]);
+}
+
+static void carthw_ssf2_unload(void)
+{
+  memset(carthw_ssf2_banks, 0, sizeof(carthw_ssf2_banks));
+  carthw_ssf2_active = 0;
 }
 
 void carthw_ssf2_startup(void)
@@ -73,11 +84,13 @@ void carthw_ssf2_startup(void)
 
   // default map
   for (i = 0; i < 8; i++)
-		ssf2_banks[i] = i;
+    carthw_ssf2_banks[i] = i;
 
   PicoCartMemSetup   = carthw_ssf2_mem_setup;
   PicoLoadStateHook  = carthw_ssf2_statef;
+  PicoCartUnloadHook = carthw_ssf2_unload;
   carthw_chunks      = carthw_ssf2_state;
+  carthw_ssf2_active = 1;
 }
 
 

pico/carthw/carthw.h

@@ -14,8 +14,12 @@ void PicoSVPInit(void);
 void PicoSVPStartup(void);
 void PicoSVPMemSetup(void);
 
-/* misc */
+/* standard/ssf2 mapper */
+extern int carthw_ssf2_active;
+extern unsigned char carthw_ssf2_banks[8];
 void carthw_ssf2_startup(void);
+
+/* misc */
 void carthw_Xin1_startup(void);
 void carthw_realtec_startup(void);
 void carthw_radica_startup(void);

pico/pico_int.h

@@ -546,6 +546,7 @@ typedef struct
 #define P32XF_68KCPOLL   (1 << 0)
 #define P32XF_68KVPOLL   (1 << 1)
 #define P32XF_Z80_32X_IO (1 << 7) // z80 does 32x io
+#define P32XF_DRC_ROM_C  (1 << 8) // cached code from ROM
 
 #define P32XI_VRES (1 << 14/2) // IRL/2
 #define P32XI_VINT (1 << 12/2)
@@ -914,6 +915,7 @@ void PicoWrite16_32x(unsigned int a, unsigned int d);
 void PicoMemSetup32x(void);
 void Pico32xSwapDRAM(int b);
 void Pico32xMemStateLoaded(void);
+void p32x_update_banks(void);
 void p32x_m68k_poll_event(unsigned int flags);
 void p32x_sh2_poll_event(SH2 *sh2, unsigned int flags, unsigned int m68k_cycles);