mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
32x: implement standard/ssf2 mapper
This commit is contained in:
notaz
parent
fda2f31020
commit
8b9dbcde38
6 changed files with 126 additions and 59 deletions
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@ -2912,8 +2912,10 @@ end_op:
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tcache_id, blkid_main,
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tcache_ptr - tcache_bases[tcache_id], tcache_sizes[tcache_id],
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insns_compiled, host_insn_count, (float)host_insn_count / insns_compiled);
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if ((sh2->pc & 0xc6000000) == 0x02000000) // ROM
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if ((sh2->pc & 0xc6000000) == 0x02000000) { // ROM
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dbg(2, " hash collisions %d/%d", hash_collisions, block_counts[tcache_id]);
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Pico32x.emu_flags |= P32XF_DRC_ROM_C;
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}
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/*
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printf("~~~\n");
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tcache_dsm_ptrs[tcache_id] = block_entry_ptr;
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@ -3292,6 +3294,7 @@ void sh2_drc_flush_all(void)
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flush_tcache(0);
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flush_tcache(1);
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flush_tcache(2);
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Pico32x.emu_flags &= ~P32XF_DRC_ROM_C;
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}
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void sh2_drc_mem_setup(SH2 *sh2)
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@ -47,7 +47,7 @@ static const char str_mars[] = "MARS";
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void *p32x_bios_g, *p32x_bios_m, *p32x_bios_s;
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struct Pico32xMem *Pico32xMem;
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static void bank_switch(int b);
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static void bank_switch_rom_68k(int b);
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// addressing byte in 16bit reg
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#define REG8IN16(ptr, offs) ((u8 *)ptr)[(offs) ^ 1]
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@ -276,7 +276,7 @@ static void p32x_reg_write8(u32 a, u32 d)
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d &= 3;
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if (r[0x04 / 2] != d) {
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r[0x04 / 2] = d;
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bank_switch(d);
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bank_switch_rom_68k(d);
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}
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return;
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case 0x06: // ignored, always 0
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@ -862,7 +862,7 @@ static void PicoWrite8_32x_on(u32 a, u32 d)
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else
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PicoWrite8_io(a, d);
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if (a == 0xa130f1)
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bank_switch(Pico32x.regs[4 / 2]);
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bank_switch_rom_68k(Pico32x.regs[4 / 2]);
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return;
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}
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@ -900,7 +900,7 @@ static void PicoWrite16_32x_on(u32 a, u32 d)
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else
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PicoWrite16_io(a, d);
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if (a == 0xa130f0)
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bank_switch(Pico32x.regs[4 / 2]);
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bank_switch_rom_68k(Pico32x.regs[4 / 2]);
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return;
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}
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@ -1145,9 +1145,9 @@ static void bank_map_handler(void)
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cpu68k_map_set(m68k_read16_map, 0x900000, 0x9fffff, PicoRead16_bank, 1);
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}
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static void bank_switch(int b)
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static void bank_switch_rom_68k(int b)
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{
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unsigned int rs, bank;
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unsigned int rs, bank, bank2;
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if (Pico.m.ncart_in)
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return;
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@ -1164,15 +1164,25 @@ static void bank_switch(int b)
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return;
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}
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// 32X ROM (unbanked, XXX: consider mirroring?)
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// 32X ROM (XXX: consider mirroring?)
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rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
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if (!carthw_ssf2_active) {
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rs -= bank;
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if (rs > 0x100000)
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rs = 0x100000;
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cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
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cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
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elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
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}
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else {
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bank = bank >> 19;
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bank2 = carthw_ssf2_banks[bank + 0] << 19;
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cpu68k_map_set(m68k_read8_map, 0x900000, 0x97ffff, Pico.rom + bank2, 0);
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cpu68k_map_set(m68k_read16_map, 0x900000, 0x97ffff, Pico.rom + bank2, 0);
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bank2 = carthw_ssf2_banks[bank + 1] << 19;
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cpu68k_map_set(m68k_read8_map, 0x980000, 0x9fffff, Pico.rom + bank2, 0);
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cpu68k_map_set(m68k_read16_map, 0x980000, 0x9fffff, Pico.rom + bank2, 0);
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}
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}
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// -----------------------------------------------------------------
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@ -1234,6 +1244,13 @@ static u32 sh2_read8_da(u32 a, SH2 *sh2)
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return sh2->data_array[(a & 0xfff) ^ 1];
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}
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// for ssf2
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static u32 sh2_read8_rom(u32 a, SH2 *sh2)
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{
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u32 bank = carthw_ssf2_banks[(a >> 19) & 7] << 19;
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return Pico.rom[(bank + (a & 0x7ffff)) ^ 1];
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}
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// read16
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static u32 sh2_read16_unmapped(u32 a, SH2 *sh2)
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{
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@ -1284,6 +1301,12 @@ static u32 sh2_read16_da(u32 a, SH2 *sh2)
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return ((u16 *)sh2->data_array)[(a & 0xfff) / 2];
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}
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static u32 sh2_read16_rom(u32 a, SH2 *sh2)
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{
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u32 bank = carthw_ssf2_banks[(a >> 19) & 7] << 19;
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return *(u16 *)(Pico.rom + bank + (a & 0x7fffe));
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}
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// writes
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static void REGPARM(3) sh2_write_ignore(u32 a, u32 d, SH2 *sh2)
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{
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@ -1750,6 +1773,19 @@ void Pico32xSwapDRAM(int b)
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sh2_write16_map[0x04/2] = sh2_write16_map[0x24/2] = b ? sh2_write16_dram1 : sh2_write16_dram0;
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}
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static void bank_switch_rom_sh2(void)
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{
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if (!carthw_ssf2_active) {
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// easy
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sh2_read8_map[0x02/2].addr = sh2_read8_map[0x22/2].addr =
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sh2_read16_map[0x02/2].addr = sh2_read16_map[0x22/2].addr = MAP_MEMORY(Pico.rom);
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}
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else {
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sh2_read8_map[0x02/2].addr = sh2_read8_map[0x22/2].addr = MAP_HANDLER(sh2_read8_rom);
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sh2_read16_map[0x02/2].addr = sh2_read16_map[0x22/2].addr = MAP_HANDLER(sh2_read16_rom);
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}
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}
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void PicoMemSetup32x(void)
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{
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unsigned int rs;
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@ -1784,15 +1820,9 @@ void PicoMemSetup32x(void)
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cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
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cpu68k_map_set(m68k_write8_map, 0x880000, 0x880000 + rs - 1, PicoWrite8_cart, 1);
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cpu68k_map_set(m68k_write16_map, 0x880000, 0x880000 + rs - 1, PicoWrite16_cart, 1);
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#ifdef EMU_F68K
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// setup FAME fetchmap
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PicoCpuFM68k.Fetch[0] = (uptr)Pico32xMem->m68k_rom;
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for (rs = 0x88; rs < 0x90; rs++)
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PicoCpuFM68k.Fetch[rs] = (uptr)Pico.rom - 0x880000;
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#endif
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// 32X ROM (banked)
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bank_switch(0);
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bank_switch_rom_68k(0);
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cpu68k_map_set(m68k_write8_map, 0x900000, 0x9fffff, PicoWrite8_bank, 1);
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cpu68k_map_set(m68k_write16_map, 0x900000, 0x9fffff, PicoWrite16_bank, 1);
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}
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@ -1827,8 +1857,7 @@ void PicoMemSetup32x(void)
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sh2_write8_map[0x00/2] = sh2_write8_map[0x20/2] = sh2_write8_cs0;
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sh2_write16_map[0x00/2] = sh2_write16_map[0x20/2] = sh2_write16_cs0;
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// CS1 - ROM
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sh2_read8_map[0x02/2].addr = sh2_read8_map[0x22/2].addr =
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sh2_read16_map[0x02/2].addr = sh2_read16_map[0x22/2].addr = MAP_MEMORY(Pico.rom);
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bank_switch_rom_sh2();
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sh2_read8_map[0x02/2].mask = sh2_read8_map[0x22/2].mask =
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sh2_read16_map[0x02/2].mask = sh2_read16_map[0x22/2].mask = 0x3fffff; // FIXME
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// CS2 - DRAM - done by Pico32xSwapDRAM()
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@ -1868,9 +1897,17 @@ void PicoMemSetup32x(void)
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z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write_32x, 1);
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}
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void p32x_update_banks(void)
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{
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bank_switch_rom_68k(Pico32x.regs[4 / 2]);
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bank_switch_rom_sh2();
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if (Pico32x.emu_flags & P32XF_DRC_ROM_C)
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sh2_drc_flush_all();
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}
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void Pico32xMemStateLoaded(void)
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{
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bank_switch(Pico32x.regs[4 / 2]);
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bank_switch_rom_68k(Pico32x.regs[4 / 2]);
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Pico32xSwapDRAM((Pico32x.vdp_regs[0x0a / 2] & P32XV_FS) ^ P32XV_FS);
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memset(Pico32xMem->pwm, 0, sizeof(Pico32xMem->pwm));
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Pico32x.dirty_pal = 1;
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12
pico/cart.c
12
pico/cart.c
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@ -778,7 +778,8 @@ static int is_expr(const char *expr, char **pr)
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#include "carthw_cfg.c"
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static void parse_carthw(const char *carthw_cfg, int *fill_sram)
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static void parse_carthw(const char *carthw_cfg, int *fill_sram,
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int *hw_detected)
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{
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int line = 0, any_checks_passed = 0, skip_sect = 0;
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const char *s, *builtin = builtin_carthw_cfg;
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@ -902,6 +903,7 @@ static void parse_carthw(const char *carthw_cfg, int *fill_sram)
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if (is_expr("hw", &p)) {
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if (!any_checks_passed)
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goto no_checks;
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*hw_detected = 1;
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rstrip(p);
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if (strcmp(p, "svp") == 0)
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@ -925,6 +927,7 @@ static void parse_carthw(const char *carthw_cfg, int *fill_sram)
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else {
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elprintf(EL_STATUS, "carthw:%d: unsupported mapper: %s", line, p);
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skip_sect = 1;
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*hw_detected = 0;
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}
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continue;
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}
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@ -1038,6 +1041,7 @@ no_checks:
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*/
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static void PicoCartDetect(const char *carthw_cfg)
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{
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int carthw_detected = 0;
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int fill_sram = 0;
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memset(&Pico.sv, 0, sizeof(Pico.sv));
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@ -1067,7 +1071,11 @@ static void PicoCartDetect(const char *carthw_cfg)
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Pico.sv.eeprom_bit_out= 0;
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if (carthw_cfg != NULL)
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parse_carthw(carthw_cfg, &fill_sram);
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parse_carthw(carthw_cfg, &fill_sram, &carthw_detected);
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// assume the standard mapper for large roms
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if (!carthw_detected && Pico.romsize > 0x400000)
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carthw_ssf2_startup();
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if (Pico.sv.flags & SRF_ENABLED)
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{
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@ -21,12 +21,13 @@ static int have_bank(u32 base)
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return 1;
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}
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/* The SSFII mapper */
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static unsigned char ssf2_banks[8];
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/* standard/ssf2 mapper */
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int carthw_ssf2_active;
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unsigned char carthw_ssf2_banks[8];
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static carthw_state_chunk carthw_ssf2_state[] =
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{
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{ CHUNK_CARTHW, sizeof(ssf2_banks), &ssf2_banks },
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{ CHUNK_CARTHW, sizeof(carthw_ssf2_banks), &carthw_ssf2_banks },
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{ 0, 0, NULL }
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};
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@ -42,15 +43,19 @@ static void carthw_ssf2_write8(u32 a, u32 d)
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a &= 0x0e;
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if (a == 0)
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return;
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if (carthw_ssf2_banks[a >> 1] == d)
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return;
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ssf2_banks[a >> 1] = d;
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base = d << 19;
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target = a << 18;
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if (!have_bank(base))
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return;
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carthw_ssf2_banks[a >> 1] = d;
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cpu68k_map_set(m68k_read8_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
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cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
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if (PicoIn.AHW & PAHW_32X)
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p32x_update_banks();
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}
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static void carthw_ssf2_mem_setup(void)
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@ -62,7 +67,13 @@ static void carthw_ssf2_statef(void)
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{
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int i;
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for (i = 1; i < 8; i++)
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carthw_ssf2_write8(0xa130f0 | (i << 1), ssf2_banks[i]);
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carthw_ssf2_write8(0xa130f0 | (i << 1), carthw_ssf2_banks[i]);
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}
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static void carthw_ssf2_unload(void)
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{
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memset(carthw_ssf2_banks, 0, sizeof(carthw_ssf2_banks));
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carthw_ssf2_active = 0;
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}
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void carthw_ssf2_startup(void)
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@ -73,11 +84,13 @@ void carthw_ssf2_startup(void)
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// default map
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for (i = 0; i < 8; i++)
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ssf2_banks[i] = i;
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carthw_ssf2_banks[i] = i;
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PicoCartMemSetup = carthw_ssf2_mem_setup;
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PicoLoadStateHook = carthw_ssf2_statef;
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PicoCartUnloadHook = carthw_ssf2_unload;
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carthw_chunks = carthw_ssf2_state;
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carthw_ssf2_active = 1;
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}
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@ -14,8 +14,12 @@ void PicoSVPInit(void);
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void PicoSVPStartup(void);
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void PicoSVPMemSetup(void);
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/* misc */
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/* standard/ssf2 mapper */
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extern int carthw_ssf2_active;
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extern unsigned char carthw_ssf2_banks[8];
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void carthw_ssf2_startup(void);
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/* misc */
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void carthw_Xin1_startup(void);
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void carthw_realtec_startup(void);
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void carthw_radica_startup(void);
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@ -546,6 +546,7 @@ typedef struct
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#define P32XF_68KCPOLL (1 << 0)
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#define P32XF_68KVPOLL (1 << 1)
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#define P32XF_Z80_32X_IO (1 << 7) // z80 does 32x io
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#define P32XF_DRC_ROM_C (1 << 8) // cached code from ROM
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#define P32XI_VRES (1 << 14/2) // IRL/2
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#define P32XI_VINT (1 << 12/2)
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@ -914,6 +915,7 @@ void PicoWrite16_32x(unsigned int a, unsigned int d);
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void PicoMemSetup32x(void);
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void Pico32xSwapDRAM(int b);
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void Pico32xMemStateLoaded(void);
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void p32x_update_banks(void);
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void p32x_m68k_poll_event(unsigned int flags);
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void p32x_sh2_poll_event(SH2 *sh2, unsigned int flags, unsigned int m68k_cycles);
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