mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-06 07:38:05 -04:00
mcd, some cleanup, fix Word-RAM in 2M mode
This commit is contained in:
kub
parent
02db230830
commit
8eeb342641
7 changed files with 227 additions and 75 deletions
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@ -91,31 +91,6 @@ PICO_INTERNAL int PicoResetMCD(void)
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return 0;
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}
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static void SekRunM68kOnce(void)
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{
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int cyc_do;
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pevt_log_m68k_o(EVT_RUN_START);
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if ((cyc_do = Pico.t.m68c_aim - Pico.t.m68c_cnt) > 0) {
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Pico.t.m68c_cnt += cyc_do;
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#if defined(EMU_C68K)
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PicoCpuCM68k.cycles = cyc_do;
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CycloneRun(&PicoCpuCM68k);
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Pico.t.m68c_cnt -= PicoCpuCM68k.cycles;
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#elif defined(EMU_M68K)
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Pico.t.m68c_cnt += m68k_execute(cyc_do) - cyc_do;
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#elif defined(EMU_F68K)
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Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, cyc_do, 0) - cyc_do;
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#endif
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}
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SekCyclesLeft = 0;
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SekTrace(0);
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pevt_log_m68k_o(EVT_RUN_END);
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}
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static void SekRunS68k(unsigned int to)
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{
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int cyc_do;
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@ -281,8 +256,7 @@ void pcd_irq_s68k(int irq, int state)
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{
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if (state) {
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SekInterruptS68k(irq);
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if (SekIsStoppedS68k())
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SekSetStopS68k(0);
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Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP);
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Pico_mcd->m.s68k_poll_cnt = 0;
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} else
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SekInterruptClearS68k(irq);
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@ -315,7 +289,7 @@ int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
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if (event_time_next && CYCLES_GT(target, event_time_next))
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target = event_time_next;
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if (SekIsStoppedS68k())
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if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP))
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SekCycleCntS68k = SekCycleAimS68k = target;
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else
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SekRunS68k(target);
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@ -331,40 +305,42 @@ int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
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#define pcd_run_cpus_normal pcd_run_cpus
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//#define pcd_run_cpus_lockstep pcd_run_cpus
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static void SekSyncM68k(void);
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static int SekSyncM68k(int once);
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void pcd_run_cpus_normal(int m68k_cycles)
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{
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Pico.t.m68c_aim += m68k_cycles;
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while (CYCLES_GT(Pico.t.m68c_aim, Pico.t.m68c_cnt)) {
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if (SekShouldInterrupt())
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if (SekShouldInterrupt()) {
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Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
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Pico_mcd->m.m68k_poll_cnt = 0;
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}
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#ifdef USE_POLL_DETECT
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if (Pico_mcd->m.m68k_poll_cnt >= 16) {
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if (Pico_mcd->m.state_flags & (PCD_ST_M68K_POLL|PCD_ST_M68K_SLEEP)) {
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int s68k_left;
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// main CPU is polling, (wake and) run sub only
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if (SekIsStoppedS68k()) {
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SekSetStopS68k(0);
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Pico_mcd->m.s68k_poll_cnt = 0;
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}
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Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP);
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Pico_mcd->m.s68k_poll_cnt = 0;
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s68k_left = pcd_sync_s68k(Pico.t.m68c_aim, 1);
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Pico.t.m68c_cnt = Pico.t.m68c_aim;
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if (s68k_left > 0)
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Pico.t.m68c_cnt -= ((long long)s68k_left * mcd_s68k_cycle_mult >> 16);
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if (SekIsStoppedS68k()) {
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if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) {
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// slave has stopped, wake master to avoid lockups
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Pico_mcd->m.state_flags &= ~(PCD_ST_M68K_POLL|PCD_ST_M68K_SLEEP);
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Pico_mcd->m.m68k_poll_cnt = 0;
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}
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elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
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Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
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} else
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#endif
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SekRunM68kOnce();
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if (Pico_mcd->m.need_sync) {
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Pico_mcd->m.need_sync = 0;
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SekSyncM68k(1);
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if (Pico_mcd->m.state_flags & PCD_ST_S68K_SYNC) {
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SYNC;
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pcd_sync_s68k(Pico.t.m68c_cnt, 0);
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}
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}
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@ -375,7 +351,7 @@ void pcd_run_cpus_lockstep(int m68k_cycles)
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unsigned int target = Pico.t.m68c_aim + m68k_cycles;
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do {
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Pico.t.m68c_aim += 8;
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SekSyncM68k();
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SekSyncM68k(0);
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pcd_sync_s68k(Pico.t.m68c_aim, 0);
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} while (CYCLES_GT(target, Pico.t.m68c_aim));
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@ -438,6 +414,11 @@ void pcd_state_loaded(void)
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if ((unsigned int)diff > 12500000/50)
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Pico_mcd->pcm.update_cycles = cycles;
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if (Pico_mcd->m.need_sync) {
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SYNC;
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Pico_mcd->m.need_sync = 0;
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}
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// reschedule
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event_time_next = 0;
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pcd_run_events(SekCycleCntS68k);
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135
pico/cd/memory.c
135
pico/cd/memory.c
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@ -71,11 +71,11 @@ void m68k_comm_check(u32 a)
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u32 cycles = SekCyclesDone();
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u32 clkdiff = cycles - Pico_mcd->m.m68k_poll_clk;
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pcd_sync_s68k(cycles, 0);
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if (a == 0x0e && !Pico_mcd->m.need_sync && (Pico_mcd->s68k_regs[3]&0x4)) {
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if (a == 0x0e && !(Pico_mcd->m.state_flags & PCD_ST_S68K_SYNC) && (Pico_mcd->s68k_regs[3]&0x4)) {
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// there are cases when slave updates comm and only switches RAM
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// over after that (mcd1 bios), so there must be a resync..
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SekEndRun(64);
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Pico_mcd->m.need_sync = 1;
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SYNC;
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}
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Pico_mcd->m.m68k_poll_clk = cycles;
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if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a || clkdiff > POLL_CYCLES || clkdiff <= 16) {
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@ -85,8 +85,11 @@ void m68k_comm_check(u32 a)
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return;
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}
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Pico_mcd->m.m68k_poll_cnt++;
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if(Pico_mcd->m.m68k_poll_cnt >= POLL_LIMIT)
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Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
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if (Pico_mcd->m.m68k_poll_cnt >= POLL_LIMIT) {
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Pico_mcd->m.state_flags |= PCD_ST_M68K_POLL;
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SekEndRun(8);
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}
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}
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#ifndef _ASM_CD_MEMORY_C
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@ -149,6 +152,7 @@ void m68k_reg_write8(u32 a, u32 d)
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u32 dold;
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a &= 0x3f;
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Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
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Pico_mcd->m.m68k_poll_cnt = 0;
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switch (a) {
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@ -208,6 +212,8 @@ void m68k_reg_write8(u32 a, u32 d)
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}
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else
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d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;
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if ((dold ^ d) & 0x1f)
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remap_word_ram(d);
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goto write_comm;
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case 6:
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@ -243,12 +249,10 @@ write_comm:
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// Delay slave a bit to make sure master can check before slave changes.
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SekCycleCntS68k += 24; // Silpheed
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}
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if (Pico_mcd->m.s68k_poll_a == (a & ~1))
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{
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if (SekIsStoppedS68k()) {
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if ((Pico_mcd->m.s68k_poll_a ^ a) & ~1) {
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if (Pico_mcd->m.state_flags & PCD_ST_S68K_POLL)
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elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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SekSetStopS68k(0);
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}
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
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Pico_mcd->m.s68k_poll_cnt = 0;
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}
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}
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@ -257,7 +261,7 @@ u32 s68k_poll_detect(u32 a, u32 d)
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{
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#ifdef USE_POLL_DETECT
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u32 cycles, cnt = 0;
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if (SekIsStoppedS68k())
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if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP))
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return d;
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SekEndRunS68k(8);
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@ -267,8 +271,9 @@ u32 s68k_poll_detect(u32 a, u32 d)
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if (clkdiff <= POLL_CYCLES) {
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cnt = Pico_mcd->m.s68k_poll_cnt + 1;
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//printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
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if (cnt > POLL_LIMIT) {
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SekSetStopS68k(1);
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Pico_mcd->m.state_flags |= PCD_ST_S68K_POLL;
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elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",
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SekPcS68k, a);
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}
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@ -376,9 +381,6 @@ void s68k_reg_write8(u32 a, u32 d)
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wram_2M_to_1M(Pico_mcd->word_ram2M);
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}
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if ((d ^ dold) & 0x1d)
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remap_word_ram(d);
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if ((d ^ dold) & 0x05)
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d &= ~2; // clear DMNA - swap complete
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}
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@ -387,10 +389,11 @@ void s68k_reg_write8(u32 a, u32 d)
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if (dold & 4) {
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elprintf(EL_CDREG3, "wram mode 1M->2M");
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wram_1M_to_2M(Pico_mcd->word_ram2M);
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remap_word_ram(d);
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}
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d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;
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}
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if ((dold ^ d) & 0x1f)
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remap_word_ram(d);
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goto write_comm;
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}
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case 4:
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@ -495,15 +498,18 @@ write_comm:
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return;
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Pico_mcd->s68k_regs[a] = (u8) d;
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if (Pico_mcd->m.m68k_poll_cnt)
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if ((Pico_mcd->m.m68k_poll_a ^ a) & ~1) {
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SekEndRunS68k(8);
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Pico_mcd->m.m68k_poll_cnt = 0;
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Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
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Pico_mcd->m.m68k_poll_cnt = 0;
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}
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}
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void s68k_reg_write16(u32 a, u32 d)
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{
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u8 *r = Pico_mcd->s68k_regs;
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
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Pico_mcd->m.s68k_poll_cnt = 0;
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if ((a & 0x1f0) == 0x20)
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@ -559,9 +565,11 @@ write_comm:
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r[a] = d >> 8;
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r[a + 1] = d;
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if (Pico_mcd->m.m68k_poll_cnt)
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if ((Pico_mcd->m.m68k_poll_a ^ a) & ~1) {
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SekEndRunS68k(8);
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Pico_mcd->m.m68k_poll_cnt = 0;
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Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
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Pico_mcd->m.m68k_poll_cnt = 0;
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}
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}
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// -----------------------------------------------------------------
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@ -1065,35 +1073,104 @@ static void remap_prg_window(u32 r1, u32 r3)
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}
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}
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// if main or sub CPU accesses Word-RAM while it is assigned to the other CPU
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// GA doesn't assert DTACK, which means the CPU is blocked until the Word_RAM
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// is reassigned to it (e.g. Mega Race).
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static u32 m68k_wordram_read8(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;
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SekEndRun(0);
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return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
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}
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static u32 m68k_wordram_read16(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;
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SekEndRun(0);
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return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
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}
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static void m68k_wordram_write8(u32 a, u32 d)
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{
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Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;
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SekEndRun(0);
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Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
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}
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static void m68k_wordram_write16(u32 a, u32 d)
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{
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Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;
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SekEndRun(0);
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((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;
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}
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static u32 s68k_wordram_read8(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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SekEndRunS68k(0);
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return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
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}
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static u32 s68k_wordram_read16(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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SekEndRunS68k(0);
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return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
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}
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static void s68k_wordram_write8(u32 a, u32 d)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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SekEndRunS68k(0);
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Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
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}
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static void s68k_wordram_write16(u32 a, u32 d)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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SekEndRunS68k(0);
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((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;
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}
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static void remap_word_ram(u32 r3)
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{
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void *bank;
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// WORD RAM
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if (!(r3 & 4)) {
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// 2M mode. XXX: allowing access in all cases for simplicity
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// 2M mode.
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bank = Pico_mcd->word_ram2M;
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cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
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cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
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if (r3 & 1) {
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Pico_mcd->m.state_flags &= ~PCD_ST_M68K_SLEEP;
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cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
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cpu68k_map_all_funcs(0x80000, 0xbffff,
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s68k_wordram_read8, s68k_wordram_read16,
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s68k_wordram_write8, s68k_wordram_write16, 1);
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} else {
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;
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cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
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cpu68k_map_all_funcs(0x200000, 0x23ffff,
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m68k_wordram_read8, m68k_wordram_read16,
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m68k_wordram_write8, m68k_wordram_write16, 0);
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}
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// TODO: handle 0x0c0000
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}
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else {
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int b0 = r3 & 1;
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int m = (r3 & 0x18) >> 3;
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Pico_mcd->m.state_flags &= ~(PCD_ST_M68K_SLEEP|PCD_ST_S68K_SLEEP);
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bank = Pico_mcd->word_ram1M[b0];
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cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
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bank = Pico_mcd->word_ram1M[b0 ^ 1];
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cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
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// "cell arrange" on m68k
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cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);
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cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);
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cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);
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cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);
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cpu68k_map_all_funcs(0x220000, 0x23ffff,
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m68k_cell_read8[b0], m68k_cell_read16[b0],
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m68k_cell_write8[b0], m68k_cell_write16[b0], 0);
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// "decode format" on s68k
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cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);
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cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);
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cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);
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||||
cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);
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cpu68k_map_all_funcs(0x80000, 0xbffff,
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||||
s68k_dec_read8[b0^1], s68k_dec_read16[b0^1],
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||||
s68k_dec_write8[b0^1][m], s68k_dec_write16[b0^1][m], 1);
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||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -181,6 +181,7 @@ m_m68k_read8_r02:
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|||
m_m68k_read8_r03:
|
||||
add r1, r1, #0x110000
|
||||
stmfd sp!, {r1, lr}
|
||||
bic r0, r0, #1
|
||||
bl m68k_comm_check
|
||||
ldmfd sp!, {r1, lr}
|
||||
ldrb r0, [r1, #3]
|
||||
|
|
@ -223,6 +224,7 @@ m_m68k_read8_hi:
|
|||
bxge lr
|
||||
add r1, r1, r0
|
||||
stmfd sp!, {r1, lr}
|
||||
bic r0, r0, #1
|
||||
bl m68k_comm_check
|
||||
ldmfd sp!, {r1, lr}
|
||||
ldrb r0, [r1]
|
||||
|
|
@ -378,10 +380,10 @@ m_m68k_write16_regs:
|
|||
beq m_m68k_write16_regs_spec
|
||||
and r3, r1, #0xff
|
||||
add r2, r0, #1
|
||||
stmfd sp!,{r2,r3,lr}
|
||||
stmfd sp!,{r2,r3,r12,lr}
|
||||
mov r1, r1, lsr #8
|
||||
bl m68k_reg_write8
|
||||
ldmfd sp!,{r0,r1,lr}
|
||||
ldmfd sp!,{r0,r1,r12,lr}
|
||||
b m68k_reg_write8
|
||||
|
||||
m_m68k_write16_regs_spec: @ special case
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue