32x: vints, dram read, hw divider. Doom runs, but fragile to timing

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@792 be3aeb3a-fb24-0410-a615-afba39da0efa

pico/32x/32x.c

@@ -92,6 +92,8 @@ static void p32x_start_blank(void)
     Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
   }
 
+  Pico32x.sh2irqs |= P32XI_VINT;
+  p32x_update_irls();
   p32x_poll_event(1);
 }
 
@@ -122,7 +124,7 @@ static __inline void SekRunM68k(int cyc)
 
 // ~1463.8, but due to cache misses and slow mem
 // it's much lower than that
-#define SH2_LINE_CYCLES 700
+#define SH2_LINE_CYCLES 735
 
 #define PICO_32X
 #define RUN_SH2S \

pico/32x/memory.c

@@ -156,6 +156,9 @@ static void p32x_reg_write8(u32 a, u32 d)
   u16 *r = Pico32x.regs;
   a &= 0x3f;
 
+  // for things like bset on comm port
+  m68k_poll.cnt = 0;
+
   if (a == 1 && !(r[0] & 1)) {
     r[0] |= 1;
     Pico32xStartup();
@@ -187,7 +190,7 @@ static void p32x_reg_write8(u32 a, u32 d)
       }
       break;
     case 7: // DREQ ctl
-      r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_RV));
+      r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_DMA|P32XS_RV));
       break;
   }
 }
@@ -197,6 +200,9 @@ static void p32x_reg_write16(u32 a, u32 d)
   u16 *r = Pico32x.regs;
   a &= 0x3e;
 
+  // for things like bset on comm port
+  m68k_poll.cnt = 0;
+
   switch (a) {
     case 0x00: // adapter ctl
       r[0] = (r[0] & 0x83) | (d & P32XS_FM);
@@ -361,20 +367,41 @@ static u32 sh2_peripheral_read(u32 a, int id)
 {
   u32 d;
   a &= 0x1fc;
-  d = Pico32xMem->sh2_peri_regs[0][a / 4];
+  d = Pico32xMem->sh2_peri_regs[id][a / 4];
 
-  elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
+  elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
   return d;
 }
 
 static void sh2_peripheral_write(u32 a, u32 d, int id)
 {
-  unsigned int *r = Pico32xMem->sh2_peri_regs[0];
+  unsigned int *r = Pico32xMem->sh2_peri_regs[id];
   elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
 
   a &= 0x1fc;
   r[a / 4] = d;
 
+  switch (a) {
+    // division unit:
+    case 0x104: // DVDNT: divident L, starts divide
+      elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]);
+      if (r[0x100 / 4]) {
+        r[0x118 / 4] = r[0x110 / 4] = d % r[0x100 / 4];
+        r[0x11c / 4] = r[0x114 / 4] = d / r[0x100 / 4];
+      }
+      break;
+    case 0x114:
+      elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x",
+        id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id));
+      if (r[0x100 / 4]) {
+        long long divident = (long long)r[0x110 / 4] << 32 | d;
+        // XXX: undocumented mirroring to 0x118,0x11c?
+        r[0x118 / 4] = r[0x110 / 4] = divident % r[0x100 / 4];
+        r[0x11c / 4] = r[0x114 / 4] = divident / r[0x100 / 4];
+      }
+      break;
+  }
+
   if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
     elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
       dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
@@ -597,6 +624,11 @@ u32 p32x_sh2_read8(u32 a, int id)
   if ((a & ~0xfff) == 0xc0000000)
     return Pico32xMem->data_array[id][(a & 0xfff) ^ 1];
 
+  if ((a & 0x0ffe0000) == 0x04000000) {
+    u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
+    return dram[(a & 0x1ffff) ^ 1];
+  }
+
   if ((a & 0x0fffff00) == 0x4000) {
     d = p32x_sh2reg_read16(a, id);
     goto out_16to8;
@@ -648,6 +680,9 @@ u32 p32x_sh2_read16(u32 a, int id)
   if ((a & ~0xfff) == 0xc0000000)
     return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2];
 
+  if ((a & 0x0ffe0000) == 0x04000000)
+    return Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2];
+
   if ((a & 0x0fffff00) == 0x4000) {
     d = p32x_sh2reg_read16(a, id);
     goto out;

pico/pico_int.h

@@ -406,6 +406,7 @@ typedef struct
 #define P32XS2_ADEN (1<< 9)
 #define P32XS_FULL  (1<< 7) // DREQ FIFO full
 #define P32XS_68S   (1<< 2)
+#define P32XS_DMA   (1<< 1)
 #define P32XS_RV    (1<< 0)
 
 #define P32XV_nPAL  (1<<15) // VDP