cyclone_debug fixed, minor adjustments

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@419 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz 2008-04-09 20:58:46 +00:00
parent 8527dc450a
commit 99464b6230
7 changed files with 44 additions and 39 deletions

View file

@ -1,7 +1,5 @@
#include "PicoInt.h" #include "PicoInt.h"
// note: set SPLIT_MOVEL_PD to 0
typedef unsigned char u8; typedef unsigned char u8;
static unsigned int pppc, ops=0; static unsigned int pppc, ops=0;
@ -14,13 +12,15 @@ int dbg_irq_level = 0, dbg_irq_level_sub = 0;
#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__) #define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)
#if defined(EMU_C68K) #if defined(EMU_C68K)
#define other_get_sr() CycloneGetSr(&PicoCpuCM68k) static struct Cyclone *currentC68k = NULL;
#define other_dar(i) PicoCpuCM68k.d[i] #define other_set_sub(s) currentC68k=(s)?&PicoCpuCS68k:&PicoCpuCM68k;
#define other_osp PicoCpuCM68k.osp #define other_get_sr() CycloneGetSr(currentC68k)
#define other_get_irq() PicoCpuCM68k.irq #define other_dar(i) currentC68k->d[i]
#define other_set_irq(irq) PicoCpuCM68k.irq=irq #define other_osp currentC68k->osp
#define other_is_stopped() (PicoCpuCM68k.state_flags&1) #define other_get_irq() currentC68k->irq
#define other_is_tracing() ((PicoCpuCM68k.state_flags&2)?1:0) #define other_set_irq(i) currentC68k->irq=i
#define other_is_stopped() (currentC68k->state_flags&1)
#define other_is_tracing() ((currentC68k->state_flags&2)?1:0)
#elif defined(EMU_F68K) #elif defined(EMU_F68K)
#define other_set_sub(s) g_m68kcontext=(s)?&PicoCpuFS68k:&PicoCpuFM68k; #define other_set_sub(s) g_m68kcontext=(s)?&PicoCpuFS68k:&PicoCpuFM68k;
#define other_get_sr() g_m68kcontext->sr #define other_get_sr() g_m68kcontext->sr
@ -37,9 +37,9 @@ int dbg_irq_level = 0, dbg_irq_level_sub = 0;
static int otherRun(void) static int otherRun(void)
{ {
#if defined(EMU_C68K) #if defined(EMU_C68K)
PicoCpuCM68k.cycles=1; currentC68k->cycles=1;
CycloneRun(&PicoCpuCM68k); CycloneRun(currentC68k);
return 1-PicoCpuCM68k.cycles; return 1-currentC68k->cycles;
#elif defined(EMU_F68K) #elif defined(EMU_F68K)
return fm68k_emulate(1, 0); return fm68k_emulate(1, 0);
#endif #endif
@ -79,7 +79,7 @@ int CM_compareRun(int cyc, int is_sub)
have_illegal = 0; have_illegal = 0;
m68ki_cpu.pc += 2; m68ki_cpu.pc += 2;
#ifdef EMU_C68K #ifdef EMU_C68K
PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.pc + 2); currentC68k->pc=currentC68k->checkpc(currentC68k->pc + 2);
#endif #endif
} }
// hacks for test_misc2 // hacks for test_misc2
@ -88,7 +88,7 @@ int CM_compareRun(int cyc, int is_sub)
// get out of "priviledge violation" loop // get out of "priviledge violation" loop
have_illegal = 1; have_illegal = 1;
//m68ki_cpu.s_flag = SFLAG_SET; //m68ki_cpu.s_flag = SFLAG_SET;
//PicoCpuCM68k.srh|=0x20; //currentC68k->srh|=0x20;
} }
pppc = is_sub ? SekPcS68k : SekPc; pppc = is_sub ? SekPcS68k : SekPc;
@ -102,7 +102,7 @@ int CM_compareRun(int cyc, int is_sub)
dprintf("---"); dprintf("---");
m68k_disassemble(buff, pppc, M68K_CPU_TYPE_68000); m68k_disassemble(buff, pppc, M68K_CPU_TYPE_68000);
dprintf("PC: %06x: %04x: %s", pppc, ppop, buff); dprintf("PC: %06x: %04x: %s", pppc, ppop, buff);
//dprintf("A7: %08x", PicoCpuCM68k.a[7]); //dprintf("A7: %08x", currentC68k->a[7]);
} }
#endif #endif
@ -115,6 +115,9 @@ int CM_compareRun(int cyc, int is_sub)
} }
cyc_other=otherRun(); cyc_other=otherRun();
// Musashi takes irq even if it hasn't got cycles left, let othercpu do it too
if (other_get_irq() && other_get_irq() > ((other_get_sr()>>8)&7))
cyc_other+=otherRun();
cyc_musashi=m68k_execute(1); cyc_musashi=m68k_execute(1);
if (cyc_other != cyc_musashi) { if (cyc_other != cyc_musashi) {
@ -197,17 +200,17 @@ int CM_compareRun(int cyc, int is_sub)
if(err) dumpPCandExit(is_sub); if(err) dumpPCandExit(is_sub);
#if 0 #if 0
if (PicoCpuCM68k.a[7] < 0x00ff0000 || PicoCpuCM68k.a[7] >= 0x01000000) if (m68ki_cpu.dar[15] < 0x00ff0000 || m68ki_cpu.dar[15] >= 0x01000000)
{ {
PicoCpuCM68k.a[7] = m68ki_cpu.dar[15] = 0xff8000; other_dar(15) = m68ki_cpu.dar[15] = 0xff8000;
} }
#endif #endif
#if 0 #if 0
m68k_set_reg(M68K_REG_SR, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000)); // broken m68k_set_reg(M68K_REG_SR, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000)); // broken
CycloneSetSr(&PicoCpuCM68k, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000)); CycloneSetSr(currentC68k, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000));
PicoCpuCM68k.stopped = m68ki_cpu.stopped = 0; currentC68k->stopped = m68ki_cpu.stopped = 0;
if(SekPc > 0x400 && (PicoCpuCM68k.a[7] < 0xff0000 || PicoCpuCM68k.a[7] > 0xffffff)) if(SekPc > 0x400 && (currentC68k->a[7] < 0xff0000 || currentC68k->a[7] > 0xffffff))
PicoCpuCM68k.a[7] = m68ki_cpu.dar[15] = 0xff8000; currentC68k->a[7] = m68ki_cpu.dar[15] = 0xff8000;
#endif #endif
cyc_done += cyc_other; cyc_done += cyc_other;

View file

@ -156,14 +156,17 @@ extern int SekCycleAimS68k;
#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k) #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)
#ifdef EMU_CORE_DEBUG #ifdef EMU_CORE_DEBUG
extern int dbg_irq_level;
#undef SekSetCyclesLeftNoMCD #undef SekSetCyclesLeftNoMCD
#undef SekSetCyclesLeft #undef SekSetCyclesLeft
#undef SekCyclesBurn #undef SekCyclesBurn
#undef SekEndRun #undef SekEndRun
#undef SekInterrupt
#define SekSetCyclesLeftNoMCD(c) #define SekSetCyclesLeftNoMCD(c)
#define SekSetCyclesLeft(c) #define SekSetCyclesLeft(c)
#define SekCyclesBurn(c) c #define SekCyclesBurn(c) c
#define SekEndRun(c) #define SekEndRun(c)
#define SekInterrupt(irq) dbg_irq_level=irq
#endif #endif
// ----------------------- Z80 CPU ----------------------- // ----------------------- Z80 CPU -----------------------

View file

@ -153,6 +153,7 @@ PICO_INTERNAL int SekReset()
m68ki_cpu.sp[0]=0; m68ki_cpu.sp[0]=0;
m68k_set_irq(0); m68k_set_irq(0);
m68k_pulse_reset(); m68k_pulse_reset();
REG_USP = 0; // ?
#endif #endif
#ifdef EMU_F68K #ifdef EMU_F68K
{ {

View file

@ -405,7 +405,7 @@ PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)
} }
return; return;
update_irq: update_irq:;
#ifndef EMU_CORE_DEBUG #ifndef EMU_CORE_DEBUG
// update IRQ level (Lemmings, Wiz 'n' Liz intro, ... ) // update IRQ level (Lemmings, Wiz 'n' Liz intro, ... )
// may break if done improperly: // may break if done improperly:

View file

@ -41,13 +41,13 @@ SekRunPS:
@ update aims @ update aims
ldr r8, =SekCycleAim ldr r8, =SekCycleAim
ldr r9, =SekCycleAimS68k ldr r10,=SekCycleAimS68k
ldr r2, [r8] ldr r2, [r8]
ldr r3, [r9] ldr r3, [r10]
add r2, r2, r0 add r2, r2, r0
add r3, r3, r1 add r3, r3, r1
str r2, [r8] str r2, [r8]
str r3, [r9] str r3, [r10]
ldr r1, =SekCycleCnt ldr r1, =SekCycleCnt
ldr r0, =((488<<16)-PS_STEP_M68K) ldr r0, =((488<<16)-PS_STEP_M68K)
@ -70,19 +70,19 @@ CycloneEnd_M68k:
ldr r0, [sp,#4] @ run_cycle_cnt ldr r0, [sp,#4] @ run_cycle_cnt
ldr r1, [r3] ldr r1, [r3]
str r4, [r7,#0x40] ;@ Save Current PC + Memory Base str r4, [r7,#0x40] ;@ Save Current PC + Memory Base
strb r9, [r7,#0x46] ;@ Save Flags (NZCV) strb r10,[r7,#0x46] ;@ Save Flags (NZCV)
sub r0, r0, r5 @ subtract leftover cycles (which should be negative) sub r0, r0, r5 @ subtract leftover cycles (which should be negative)
add r0, r0, r1 add r0, r0, r1
str r0, [r3] str r0, [r3]
schedule_s68k: schedule_s68k:
ldr r8, =SekCycleCntS68k ldr r8, =SekCycleCntS68k
ldr r9, =SekCycleAimS68k ldr r10,=SekCycleAimS68k
ldr r3, [sp] ldr r3, [sp]
ldr r8, [r8] ldr r8, [r8]
ldr r9, [r9] ldr r10,[r10]
sub r0, r9, r8 sub r0, r10, r8
mov r2, r3 mov r2, r3
add r3, r3, r2, asr #1 add r3, r3, r2, asr #1
add r3, r3, r2, asr #3 @ cycn_s68k = (cycn + cycn/2 + cycn/8) add r3, r3, r2, asr #3 @ cycn_s68k = (cycn + cycn/2 + cycn/8)
@ -101,7 +101,7 @@ CycloneEnd_S68k:
ldr r0, [sp,#4] @ run_cycle_cnt ldr r0, [sp,#4] @ run_cycle_cnt
ldr r1, [r3] ldr r1, [r3]
str r4, [r7,#0x40] ;@ Save Current PC + Memory Base str r4, [r7,#0x40] ;@ Save Current PC + Memory Base
strb r9, [r7,#0x46] ;@ Save Flags (NZCV) strb r10,[r7,#0x46] ;@ Save Flags (NZCV)
sub r0, r0, r5 @ subtract leftover cycles (should be negative) sub r0, r0, r5 @ subtract leftover cycles (should be negative)
add r0, r0, r1 add r0, r0, r1
str r0, [r3] str r0, [r3]
@ -110,14 +110,14 @@ schedule_m68k:
ldr r1, =PS_STEP_M68K ldr r1, =PS_STEP_M68K
ldr r3, [sp] @ main_cycle_cnt ldr r3, [sp] @ main_cycle_cnt
ldr r8, =SekCycleCnt ldr r8, =SekCycleCnt
ldr r9, =SekCycleAim ldr r10,=SekCycleAim
subs r3, r3, r1 subs r3, r3, r1
bmi SekRunPS_end bmi SekRunPS_end
ldr r8, [r8] ldr r8, [r8]
ldr r9, [r9] ldr r10,[r10]
str r3, [sp] @ update main_cycle_cnt str r3, [sp] @ update main_cycle_cnt
sub r0, r9, r8 sub r0, r10, r8
subs r5, r0, r3, asr #16 subs r5, r0, r3, asr #16
ble schedule_s68k @ m68k has not enough cycles ble schedule_s68k @ m68k has not enough cycles
@ -147,10 +147,9 @@ CycloneRunLocal:
;@ r6 = Opcode Jump table ;@ r6 = Opcode Jump table
;@ r7 = Pointer to Cpu Context ;@ r7 = Pointer to Cpu Context
;@ r8 = Current Opcode ;@ r8 = Current Opcode
ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV) ldrb r10,[r7,#0x46];@ r10 = Flags (NZCV)
ldr r1,[r7,#0x44] ;@ get SR high and IRQ level ldr r1,[r7,#0x44] ;@ get SR high and IRQ level
orr r9,r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format orr r10,r10,r10,lsl #28 ;@ r10 = Flags 0xf0000000, cpsr format
;@ r10 = Source value / Memory Base
;@ CheckInterrupt: ;@ CheckInterrupt:
movs r0,r1,lsr #24 ;@ Get IRQ level movs r0,r1,lsr #24 ;@ Get IRQ level
@ -166,7 +165,7 @@ NoIntsLocal:
ldr r0,[r7,#0x58] ;@ state_flags ldr r0,[r7,#0x58] ;@ state_flags
ldrh r8,[r4],#2 ;@ Fetch first opcode ldrh r8,[r4],#2 ;@ Fetch first opcode
tst r0,#0x03 ;@ special state? tst r0,#0x03 ;@ special state?
andeq r9,r9,#0xf0000000 andeq r10,r10,#0xf0000000
ldreq pc,[r6,r8,asl #2] ;@ Jump to opcode handler ldreq pc,[r6,r8,asl #2] ;@ Jump to opcode handler
CycloneSpecial2: CycloneSpecial2:

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@ -118,7 +118,6 @@ static void custom_write(FILE *f, const menu_entry *me, int no_def)
case 1: str = "hw horizontal"; break; case 1: str = "hw horizontal"; break;
case 2: str = "hw horiz. + vert."; break; case 2: str = "hw horiz. + vert."; break;
case 3: str = "sw horizontal"; break; case 3: str = "sw horizontal"; break;
case 1: str = "ON"; break;
} }
fprintf(f, "Scaling = %s", str); fprintf(f, "Scaling = %s", str);
#endif #endif

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@ -117,7 +117,7 @@ OBJS += ../../zlib/gzio.o ../../zlib/inffast.o ../../zlib/inflate.o ../../zlib/i
OBJS += ../../unzip/unzip.o ../../unzip/unzip_stream.o OBJS += ../../unzip/unzip.o ../../unzip/unzip_stream.o
# debug # debug
ifeq "$(debug_cyclone)" "1" ifeq "$(debug_cyclone)" "1"
OBJS += ../../Pico/_cyclone_debug.o ../../cpu/musashi/m68kdasm.o OBJS += ../../Pico/Debug.o ../../cpu/musashi/m68kdasm.o
endif endif
# CPU cores # CPU cores
ifeq "$(use_musashi)" "1" ifeq "$(use_musashi)" "1"