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https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
cyclone_debug fixed, minor adjustments
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@419 be3aeb3a-fb24-0410-a615-afba39da0efa
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7 changed files with 44 additions and 39 deletions
45
Pico/Debug.c
45
Pico/Debug.c
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@ -1,7 +1,5 @@
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#include "PicoInt.h"
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// note: set SPLIT_MOVEL_PD to 0
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typedef unsigned char u8;
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static unsigned int pppc, ops=0;
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@ -14,13 +12,15 @@ int dbg_irq_level = 0, dbg_irq_level_sub = 0;
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#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)
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#if defined(EMU_C68K)
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#define other_get_sr() CycloneGetSr(&PicoCpuCM68k)
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#define other_dar(i) PicoCpuCM68k.d[i]
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#define other_osp PicoCpuCM68k.osp
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#define other_get_irq() PicoCpuCM68k.irq
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#define other_set_irq(irq) PicoCpuCM68k.irq=irq
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#define other_is_stopped() (PicoCpuCM68k.state_flags&1)
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#define other_is_tracing() ((PicoCpuCM68k.state_flags&2)?1:0)
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static struct Cyclone *currentC68k = NULL;
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#define other_set_sub(s) currentC68k=(s)?&PicoCpuCS68k:&PicoCpuCM68k;
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#define other_get_sr() CycloneGetSr(currentC68k)
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#define other_dar(i) currentC68k->d[i]
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#define other_osp currentC68k->osp
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#define other_get_irq() currentC68k->irq
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#define other_set_irq(i) currentC68k->irq=i
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#define other_is_stopped() (currentC68k->state_flags&1)
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#define other_is_tracing() ((currentC68k->state_flags&2)?1:0)
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#elif defined(EMU_F68K)
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#define other_set_sub(s) g_m68kcontext=(s)?&PicoCpuFS68k:&PicoCpuFM68k;
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#define other_get_sr() g_m68kcontext->sr
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@ -37,9 +37,9 @@ int dbg_irq_level = 0, dbg_irq_level_sub = 0;
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static int otherRun(void)
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{
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#if defined(EMU_C68K)
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PicoCpuCM68k.cycles=1;
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CycloneRun(&PicoCpuCM68k);
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return 1-PicoCpuCM68k.cycles;
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currentC68k->cycles=1;
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CycloneRun(currentC68k);
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return 1-currentC68k->cycles;
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#elif defined(EMU_F68K)
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return fm68k_emulate(1, 0);
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#endif
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@ -79,7 +79,7 @@ int CM_compareRun(int cyc, int is_sub)
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have_illegal = 0;
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m68ki_cpu.pc += 2;
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#ifdef EMU_C68K
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PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.pc + 2);
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currentC68k->pc=currentC68k->checkpc(currentC68k->pc + 2);
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#endif
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}
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// hacks for test_misc2
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@ -88,7 +88,7 @@ int CM_compareRun(int cyc, int is_sub)
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// get out of "priviledge violation" loop
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have_illegal = 1;
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//m68ki_cpu.s_flag = SFLAG_SET;
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//PicoCpuCM68k.srh|=0x20;
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//currentC68k->srh|=0x20;
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}
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pppc = is_sub ? SekPcS68k : SekPc;
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@ -102,7 +102,7 @@ int CM_compareRun(int cyc, int is_sub)
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dprintf("---");
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m68k_disassemble(buff, pppc, M68K_CPU_TYPE_68000);
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dprintf("PC: %06x: %04x: %s", pppc, ppop, buff);
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//dprintf("A7: %08x", PicoCpuCM68k.a[7]);
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//dprintf("A7: %08x", currentC68k->a[7]);
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}
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#endif
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@ -115,6 +115,9 @@ int CM_compareRun(int cyc, int is_sub)
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}
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cyc_other=otherRun();
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// Musashi takes irq even if it hasn't got cycles left, let othercpu do it too
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if (other_get_irq() && other_get_irq() > ((other_get_sr()>>8)&7))
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cyc_other+=otherRun();
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cyc_musashi=m68k_execute(1);
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if (cyc_other != cyc_musashi) {
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@ -197,17 +200,17 @@ int CM_compareRun(int cyc, int is_sub)
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if(err) dumpPCandExit(is_sub);
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#if 0
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if (PicoCpuCM68k.a[7] < 0x00ff0000 || PicoCpuCM68k.a[7] >= 0x01000000)
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if (m68ki_cpu.dar[15] < 0x00ff0000 || m68ki_cpu.dar[15] >= 0x01000000)
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{
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PicoCpuCM68k.a[7] = m68ki_cpu.dar[15] = 0xff8000;
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other_dar(15) = m68ki_cpu.dar[15] = 0xff8000;
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}
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#endif
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#if 0
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m68k_set_reg(M68K_REG_SR, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000)); // broken
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CycloneSetSr(&PicoCpuCM68k, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000));
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PicoCpuCM68k.stopped = m68ki_cpu.stopped = 0;
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if(SekPc > 0x400 && (PicoCpuCM68k.a[7] < 0xff0000 || PicoCpuCM68k.a[7] > 0xffffff))
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PicoCpuCM68k.a[7] = m68ki_cpu.dar[15] = 0xff8000;
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CycloneSetSr(currentC68k, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000));
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currentC68k->stopped = m68ki_cpu.stopped = 0;
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if(SekPc > 0x400 && (currentC68k->a[7] < 0xff0000 || currentC68k->a[7] > 0xffffff))
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currentC68k->a[7] = m68ki_cpu.dar[15] = 0xff8000;
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#endif
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cyc_done += cyc_other;
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@ -156,14 +156,17 @@ extern int SekCycleAimS68k;
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#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)
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#ifdef EMU_CORE_DEBUG
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extern int dbg_irq_level;
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#undef SekSetCyclesLeftNoMCD
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#undef SekSetCyclesLeft
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#undef SekCyclesBurn
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#undef SekEndRun
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#undef SekInterrupt
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#define SekSetCyclesLeftNoMCD(c)
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#define SekSetCyclesLeft(c)
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#define SekCyclesBurn(c) c
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#define SekEndRun(c)
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#define SekInterrupt(irq) dbg_irq_level=irq
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#endif
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// ----------------------- Z80 CPU -----------------------
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@ -153,6 +153,7 @@ PICO_INTERNAL int SekReset()
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m68ki_cpu.sp[0]=0;
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m68k_set_irq(0);
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m68k_pulse_reset();
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REG_USP = 0; // ?
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#endif
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#ifdef EMU_F68K
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{
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@ -405,7 +405,7 @@ PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)
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}
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return;
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update_irq:
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update_irq:;
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#ifndef EMU_CORE_DEBUG
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// update IRQ level (Lemmings, Wiz 'n' Liz intro, ... )
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// may break if done improperly:
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@ -41,13 +41,13 @@ SekRunPS:
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@ update aims
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ldr r8, =SekCycleAim
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ldr r9, =SekCycleAimS68k
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ldr r10,=SekCycleAimS68k
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ldr r2, [r8]
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ldr r3, [r9]
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ldr r3, [r10]
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add r2, r2, r0
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add r3, r3, r1
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str r2, [r8]
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str r3, [r9]
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str r3, [r10]
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ldr r1, =SekCycleCnt
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ldr r0, =((488<<16)-PS_STEP_M68K)
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@ -70,19 +70,19 @@ CycloneEnd_M68k:
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ldr r0, [sp,#4] @ run_cycle_cnt
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ldr r1, [r3]
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str r4, [r7,#0x40] ;@ Save Current PC + Memory Base
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strb r9, [r7,#0x46] ;@ Save Flags (NZCV)
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strb r10,[r7,#0x46] ;@ Save Flags (NZCV)
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sub r0, r0, r5 @ subtract leftover cycles (which should be negative)
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add r0, r0, r1
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str r0, [r3]
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schedule_s68k:
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ldr r8, =SekCycleCntS68k
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ldr r9, =SekCycleAimS68k
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ldr r10,=SekCycleAimS68k
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ldr r3, [sp]
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ldr r8, [r8]
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ldr r9, [r9]
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ldr r10,[r10]
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sub r0, r9, r8
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sub r0, r10, r8
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mov r2, r3
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add r3, r3, r2, asr #1
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add r3, r3, r2, asr #3 @ cycn_s68k = (cycn + cycn/2 + cycn/8)
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@ -101,7 +101,7 @@ CycloneEnd_S68k:
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ldr r0, [sp,#4] @ run_cycle_cnt
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ldr r1, [r3]
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str r4, [r7,#0x40] ;@ Save Current PC + Memory Base
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strb r9, [r7,#0x46] ;@ Save Flags (NZCV)
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strb r10,[r7,#0x46] ;@ Save Flags (NZCV)
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sub r0, r0, r5 @ subtract leftover cycles (should be negative)
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add r0, r0, r1
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str r0, [r3]
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@ -110,14 +110,14 @@ schedule_m68k:
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ldr r1, =PS_STEP_M68K
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ldr r3, [sp] @ main_cycle_cnt
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ldr r8, =SekCycleCnt
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ldr r9, =SekCycleAim
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ldr r10,=SekCycleAim
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subs r3, r3, r1
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bmi SekRunPS_end
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ldr r8, [r8]
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ldr r9, [r9]
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ldr r10,[r10]
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str r3, [sp] @ update main_cycle_cnt
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sub r0, r9, r8
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sub r0, r10, r8
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subs r5, r0, r3, asr #16
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ble schedule_s68k @ m68k has not enough cycles
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@ -147,10 +147,9 @@ CycloneRunLocal:
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;@ r6 = Opcode Jump table
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;@ r7 = Pointer to Cpu Context
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;@ r8 = Current Opcode
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ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)
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ldrb r10,[r7,#0x46];@ r10 = Flags (NZCV)
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ldr r1,[r7,#0x44] ;@ get SR high and IRQ level
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orr r9,r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format
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;@ r10 = Source value / Memory Base
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orr r10,r10,r10,lsl #28 ;@ r10 = Flags 0xf0000000, cpsr format
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;@ CheckInterrupt:
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movs r0,r1,lsr #24 ;@ Get IRQ level
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@ -166,7 +165,7 @@ NoIntsLocal:
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ldr r0,[r7,#0x58] ;@ state_flags
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ldrh r8,[r4],#2 ;@ Fetch first opcode
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tst r0,#0x03 ;@ special state?
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andeq r9,r9,#0xf0000000
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andeq r10,r10,#0xf0000000
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ldreq pc,[r6,r8,asl #2] ;@ Jump to opcode handler
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CycloneSpecial2:
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@ -118,7 +118,6 @@ static void custom_write(FILE *f, const menu_entry *me, int no_def)
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case 1: str = "hw horizontal"; break;
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case 2: str = "hw horiz. + vert."; break;
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case 3: str = "sw horizontal"; break;
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case 1: str = "ON"; break;
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}
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fprintf(f, "Scaling = %s", str);
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#endif
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@ -117,7 +117,7 @@ OBJS += ../../zlib/gzio.o ../../zlib/inffast.o ../../zlib/inflate.o ../../zlib/i
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OBJS += ../../unzip/unzip.o ../../unzip/unzip_stream.o
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# debug
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ifeq "$(debug_cyclone)" "1"
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OBJS += ../../Pico/_cyclone_debug.o ../../cpu/musashi/m68kdasm.o
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OBJS += ../../Pico/Debug.o ../../cpu/musashi/m68kdasm.o
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endif
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# CPU cores
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ifeq "$(use_musashi)" "1"
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