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general timing hacks

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This commit is contained in:
notaz 2013-09-04 02:31:27 +03:00
parent cc5ffc3cbe
commit a4dfdb6de1
3 changed files with 5 additions and 6 deletions
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7
pico/pico.c
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@ -231,19 +231,20 @@ void PicoLoopPrepare(void)
// same for Outrunners (92-121, when active is set to 24)
// 96 is VR hack
static const int dma_timings[] = {
96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy
167, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy
102, 205, 204, 102, // vblank: 40cell:
16, 16, 15, 8, // active: 32cell:
24, 18, 17, 9 // ...
};
static const int dma_bsycles[] = {
(488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,
(488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,
(488<<8)/167, (488<<8)/167, (488<<8)/166, (488<<8)/83,
(488<<8)/102, (488<<8)/233, (488<<8)/204, (488<<8)/102,
(488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,
(488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9
};
// grossly inaccurate.. FIXME FIXXXMEE
PICO_INTERNAL int CheckDMA(void)
{
int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes

2
pico/pico_cmn.c
View file

@ -203,6 +203,7 @@ static int PicoFrameHints(void)
// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
// also delay between last H-int and V-int (Golden Axe 3)
line_base_cycles = SekCyclesDone();
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_VINT_LAG);
if (pv->reg[1]&0x20) {
@ -234,7 +235,6 @@ static int PicoFrameHints(void)
}
// Run scanline:
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD);
if (PicoLineHook) PicoLineHook();

2
pico/pico_int.h
View file

@ -134,8 +134,6 @@ extern unsigned int SekCycleAim;
#define SekCyclesBurn(c) SekCycleCnt += c
#define SekCyclesBurnRun(c) { \
SekCyclesLeft -= c; \
if (SekCyclesLeft < 0) \
SekCyclesLeft = 0; \
}
// note: sometimes may extend timeslice to delay an irq