mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
32x: rework scheduling/timing
- don't run in line quantity - decouple from 68k - some things to tune..
This commit is contained in:
notaz
parent
ed4402a7df
commit
a8fd6e3761
9 changed files with 325 additions and 130 deletions
2
Makefile
2
Makefile
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@ -155,7 +155,7 @@ tools/textfilter: tools/textfilter.c
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pico/carthw/svp/compiler.o : cpu/drc/emit_$(ARCH).c
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cpu/sh2/compiler.o : cpu/drc/emit_$(ARCH).c
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cpu/sh2/mame/sh2pico.o : cpu/sh2/mame/sh2.c
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pico/pico.o pico/cd/pico.o : pico/pico_cmn.c pico/pico_int.h
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pico/pico.o pico/cd/pico.o pico/32x/32x.o : pico/pico_cmn.c pico/pico_int.h
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pico/memory.o pico/cd/memory.o : pico/pico_int.h pico/memory.h
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cpu/fame/famec.o: cpu/fame/famec.c cpu/fame/famec_opcodes.h
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@ -63,23 +63,27 @@ void sh2_do_irq(SH2 *sh2, int level, int vector)
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// sh2->icount -= 13;
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}
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void sh2_irl_irq(SH2 *sh2, int level, int nested_call)
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int sh2_irl_irq(SH2 *sh2, int level, int nested_call)
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{
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int taken;
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sh2->pending_irl = level;
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if (level < sh2->pending_int_irq)
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level = sh2->pending_int_irq;
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sh2->pending_level = level;
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if (!nested_call) {
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// not in memhandler, so handle this now (recompiler friendly)
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// do this to avoid missing irqs that other SH2 might clear
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if (level > ((sh2->sr >> 4) & 0x0f)) {
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taken = (level > ((sh2->sr >> 4) & 0x0f));
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if (taken) {
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if (!nested_call) {
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// not in memhandler, so handle this now (recompiler friendly)
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// do this to avoid missing irqs that other SH2 might clear
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int vector = sh2->irq_callback(sh2, level);
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sh2_do_irq(sh2, level, vector);
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}
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else
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sh2->test_irq = 1;
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}
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else
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sh2->test_irq = 1;
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return taken;
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}
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void sh2_internal_irq(SH2 *sh2, int level, int vector)
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@ -71,7 +71,7 @@ extern SH2 *sh2; // active sh2. XXX: consider removing
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int sh2_init(SH2 *sh2, int is_slave);
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void sh2_finish(SH2 *sh2);
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void sh2_reset(SH2 *sh2);
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void sh2_irl_irq(SH2 *sh2, int level, int nested_call);
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int sh2_irl_irq(SH2 *sh2, int level, int nested_call);
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void sh2_internal_irq(SH2 *sh2, int level, int vector);
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void sh2_do_irq(SH2 *sh2, int level, int vector);
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void sh2_pack(const SH2 *sh2, unsigned char *buff);
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166
pico/32x/32x.c
166
pico/32x/32x.c
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@ -26,9 +26,11 @@ static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
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}
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}
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// if !nested_call, must sync CPUs before calling this
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void p32x_update_irls(int nested_call)
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{
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int irqs, mlvl = 0, slvl = 0;
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int mrun, srun;
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// msh2
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irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
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@ -42,12 +44,10 @@ void p32x_update_irls(int nested_call)
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slvl++;
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slvl *= 2;
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elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
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sh2_irl_irq(&msh2, mlvl, nested_call);
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sh2_irl_irq(&ssh2, slvl, nested_call);
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mlvl = mlvl ? 1 : 0;
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slvl = slvl ? 1 : 0;
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p32x_poll_event(mlvl | (slvl << 1), 0);
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mrun = sh2_irl_irq(&msh2, mlvl, nested_call);
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srun = sh2_irl_irq(&ssh2, slvl, nested_call);
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p32x_poll_event(mrun | (srun << 1), 0);
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elprintf(EL_32X, "update_irls: m %d/%d, s %d/%d", mlvl, mrun, slvl, srun);
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}
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void Pico32xStartup(void)
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@ -62,6 +62,7 @@ void Pico32xStartup(void)
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ssh2.irq_callback = sh2_irq_cb;
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PicoMemSetup32x();
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p32x_timers_recalc();
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if (!Pico.m.pal)
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Pico32x.vdp_regs[0] |= P32XV_nPAL;
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@ -158,6 +159,7 @@ void PicoReset32x(void)
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Pico32x.sh2irqs |= P32XI_VRES;
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p32x_update_irls(0);
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p32x_poll_event(3, 0);
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p32x_timers_recalc();
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}
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}
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@ -205,50 +207,158 @@ static void p32x_start_blank(void)
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p32x_poll_event(3, 1);
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}
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/* events */
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static void pwm_irq_event(unsigned int now)
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{
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Pico32x.emu_flags &= ~P32XF_PWM_PEND;
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p32x_pwm_schedule(now);
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Pico32x.sh2irqs |= P32XI_PWM;
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p32x_update_irls(0);
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}
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static void fillend_event(unsigned int now)
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{
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Pico32x.vdp_regs[0x0a/2] &= ~P32XV_nFEN;
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p32x_poll_event(3, 1);
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}
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typedef void (event_cb)(unsigned int now);
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static unsigned int event_times[P32X_EVENT_COUNT];
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static unsigned int event_time_next;
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static event_cb *event_cbs[] = {
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[P32X_EVENT_PWM] = pwm_irq_event,
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[P32X_EVENT_FILLEND] = fillend_event,
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};
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// schedule event at some time (in m68k clocks)
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void p32x_event_schedule(enum p32x_event event, unsigned int now, int after)
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{
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unsigned int when = (now + after) | 1;
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elprintf(EL_32X, "new event #%u %u->%u", event, now, when);
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event_times[event] = when;
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if (event_time_next == 0 || (int)(event_time_next - now) > after)
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event_time_next = when;
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}
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static void run_events(unsigned int until)
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{
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int oldest, oldest_diff, time;
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int i, diff;
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while (1) {
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oldest = -1, oldest_diff = 0x7fffffff;
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for (i = 0; i < P32X_EVENT_COUNT; i++) {
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if (event_times[i]) {
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diff = event_times[i] - until;
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if (diff < oldest_diff) {
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oldest_diff = diff;
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oldest = i;
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}
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}
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}
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if (oldest_diff <= 0) {
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time = event_times[oldest];
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event_times[oldest] = 0;
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elprintf(EL_32X, "run event #%d %u", oldest, time);
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event_cbs[oldest](time);
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}
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else if (oldest_diff < 0x7fffffff) {
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event_time_next = event_times[oldest];
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break;
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}
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else {
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event_time_next = 0;
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break;
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}
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}
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if (oldest != -1)
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elprintf(EL_32X, "next event #%d at %u", oldest, event_time_next);
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}
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// compare cycles, handling overflows
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// check if a > b
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#define CYCLES_GT(a, b) \
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((int)((a) - (b)) > 0)
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// check if a >= b
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#define CYCLES_GE(a, b) \
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((int)((a) - (b)) >= 0)
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#define sync_sh2s_normal p32x_sync_sh2s
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//#define sync_sh2s_lockstep p32x_sync_sh2s
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/* most timing is in 68k clock */
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void sync_sh2s_normal(unsigned int m68k_target)
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{
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unsigned int target = m68k_target;
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int msh2_cycles, ssh2_cycles;
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int done;
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unsigned int now, target, timer_cycles;
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int cycles, done;
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elprintf(EL_32X, "sh2 sync to %u (%u)", m68k_target, SekCycleCnt);
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elprintf(EL_32X, "sh2 sync to %u", m68k_target);
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if (!(Pico32x.regs[0] & P32XS_nRES))
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return; // rare
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{
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msh2_cycles = C_M68K_TO_SH2(msh2, target - msh2.m68krcycles_done);
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ssh2_cycles = C_M68K_TO_SH2(ssh2, target - ssh2.m68krcycles_done);
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now = msh2.m68krcycles_done;
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if (CYCLES_GT(now, ssh2.m68krcycles_done))
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now = ssh2.m68krcycles_done;
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timer_cycles = now;
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while (msh2_cycles > 0 || ssh2_cycles > 0) {
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elprintf(EL_32X, "sh2 exec %u,%u->%u",
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msh2.m68krcycles_done, ssh2.m68krcycles_done, target);
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while (CYCLES_GT(m68k_target, now))
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{
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if (event_time_next && CYCLES_GE(now, event_time_next))
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run_events(now);
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target = m68k_target;
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if (event_time_next && CYCLES_GT(target, event_time_next))
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target = event_time_next;
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while (CYCLES_GT(target, now))
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{
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elprintf(EL_32X, "sh2 exec to %u %d,%d/%d, flags %x", target,
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target - msh2.m68krcycles_done, target - ssh2.m68krcycles_done,
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m68k_target - now, Pico32x.emu_flags);
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if (Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL)) {
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ssh2.m68krcycles_done = target;
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ssh2_cycles = 0;
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}
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else if (ssh2_cycles > 0) {
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done = sh2_execute(&ssh2, ssh2_cycles);
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ssh2.m68krcycles_done += C_SH2_TO_M68K(ssh2, done);
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else {
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cycles = target - ssh2.m68krcycles_done;
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if (cycles > 0) {
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done = sh2_execute(&ssh2, C_M68K_TO_SH2(ssh2, cycles));
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ssh2.m68krcycles_done += C_SH2_TO_M68K(ssh2, done);
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ssh2_cycles = C_M68K_TO_SH2(ssh2, target - ssh2.m68krcycles_done);
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if (event_time_next && CYCLES_GT(target, event_time_next))
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target = event_time_next;
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}
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}
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if (Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL)) {
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msh2.m68krcycles_done = target;
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msh2_cycles = 0;
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}
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else if (msh2_cycles > 0) {
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done = sh2_execute(&msh2, msh2_cycles);
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msh2.m68krcycles_done += C_SH2_TO_M68K(msh2, done);
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else {
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cycles = target - msh2.m68krcycles_done;
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if (cycles > 0) {
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done = sh2_execute(&msh2, C_M68K_TO_SH2(msh2, cycles));
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msh2.m68krcycles_done += C_SH2_TO_M68K(msh2, done);
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msh2_cycles = C_M68K_TO_SH2(msh2, target - msh2.m68krcycles_done);
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if (event_time_next && CYCLES_GT(target, event_time_next))
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target = event_time_next;
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}
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}
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now = msh2.m68krcycles_done;
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if (CYCLES_GT(now, ssh2.m68krcycles_done))
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now = ssh2.m68krcycles_done;
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}
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p32x_timers_do(now - timer_cycles);
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timer_cycles = now;
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}
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}
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@ -270,7 +380,7 @@ void sync_sh2s_lockstep(unsigned int m68k_target)
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#define CPUS_RUN(m68k_cycles,s68k_cycles) do { \
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SekRunM68k(m68k_cycles); \
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if (SekIsStoppedM68k()) \
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if (Pico32x.emu_flags & P32XF_68KPOLL) \
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p32x_sync_sh2s(SekCycleCntT + SekCycleCnt); \
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} while (0)
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@ -279,8 +389,6 @@ void sync_sh2s_lockstep(unsigned int m68k_target)
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void PicoFrame32x(void)
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{
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pwm_frame_smp_cnt = 0;
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Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
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if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
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Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
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@ -183,30 +183,44 @@ static u32 p32x_reg_read16(u32 a)
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{
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a &= 0x3e;
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if (a == 2) // INTM, INTS
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return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3);
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#if 0
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if ((a & 0x30) == 0x20)
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return sh2_comm_faker(a);
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#else
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if ((a & 0x30) == 0x20) {
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// evil X-Men proto polls in a dbra loop and expects it to expire..
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static u32 dr2 = 0;
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unsigned int cycles = SekCyclesDoneT();
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int comreg = 1 << (a & 0x0f) / 2;
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// evil X-Men proto polls in a dbra loop and expects it to expire..
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if (SekDar(2) != dr2)
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m68k_poll.cnt = 0;
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dr2 = SekDar(2);
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if (p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) {
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if (cycles - msh2.m68krcycles_done > 500)
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p32x_sync_sh2s(cycles);
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if (Pico32x.comm_dirty_sh2 & comreg)
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Pico32x.comm_dirty_sh2 &= ~comreg;
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else if (p32x_poll_detect(&m68k_poll, a, cycles, 0)) {
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SekSetStop(1);
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SekEndTimeslice(16);
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}
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dr2 = SekDar(2);
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goto out;
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}
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#endif
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if (a == 2) { // INTM, INTS
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unsigned int cycles = SekCyclesDoneT();
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if (cycles - msh2.m68krcycles_done > 64)
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p32x_sync_sh2s(cycles);
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return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3);
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}
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if ((a & 0x30) == 0x30)
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return p32x_pwm_read16(a);
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out:
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return Pico32x.regs[a / 2];
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}
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@ -229,14 +243,14 @@ static void p32x_reg_write8(u32 a, u32 d)
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return;
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case 3: // irq ctl
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if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
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p32x_sync_sh2s(SekCyclesDoneT());
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Pico32x.sh2irqi[0] |= P32XI_CMD;
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p32x_update_irls(0);
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SekEndRun(16);
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}
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if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
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p32x_sync_sh2s(SekCyclesDoneT());
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Pico32x.sh2irqi[1] |= P32XI_CMD;
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p32x_update_irls(0);
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SekEndRun(16);
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}
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return;
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case 5: // bank
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@ -256,12 +270,23 @@ static void p32x_reg_write8(u32 a, u32 d)
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if ((a & 0x30) == 0x20) {
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u8 *r8 = (u8 *)r;
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int cycles = SekCyclesDoneT();
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int comreg;
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if (r8[a ^ 1] == d)
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return;
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comreg = 1 << (a & 0x0f) / 2;
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if (Pico32x.comm_dirty_68k & comreg)
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p32x_sync_sh2s(cycles);
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r8[a ^ 1] = d;
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p32x_poll_undetect(&sh2_poll[0], 0);
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p32x_poll_undetect(&sh2_poll[1], 0);
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// if some SH2 is busy waiting, it needs to see the result ASAP
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if (SekCyclesLeftNoMCD > 32)
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SekEndRun(32);
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Pico32x.comm_dirty_68k |= comreg;
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if (cycles - (int)msh2.m68krcycles_done > 120)
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p32x_sync_sh2s(cycles);
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return;
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}
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}
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@ -304,13 +329,24 @@ static void p32x_reg_write16(u32 a, u32 d)
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return;
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}
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// comm port
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else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
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else if ((a & 0x30) == 0x20) {
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int cycles = SekCyclesDoneT();
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int comreg;
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||||
if (r[a / 2] == d)
|
||||
return;
|
||||
|
||||
comreg = 1 << (a & 0x0f) / 2;
|
||||
if (Pico32x.comm_dirty_68k & comreg)
|
||||
p32x_sync_sh2s(cycles);
|
||||
|
||||
r[a / 2] = d;
|
||||
p32x_poll_undetect(&sh2_poll[0], 0);
|
||||
p32x_poll_undetect(&sh2_poll[1], 0);
|
||||
// same as for w8
|
||||
if (SekCyclesLeftNoMCD > 32)
|
||||
SekEndRun(32);
|
||||
Pico32x.comm_dirty_68k |= comreg;
|
||||
|
||||
if (cycles - (int)msh2.m68krcycles_done > 120)
|
||||
p32x_sync_sh2s(cycles);
|
||||
return;
|
||||
}
|
||||
// PWM
|
||||
|
|
@ -366,7 +402,7 @@ static void p32x_vdp_write8(u32 a, u32 d)
|
|||
}
|
||||
}
|
||||
|
||||
static void p32x_vdp_write16(u32 a, u32 d)
|
||||
static void p32x_vdp_write16(u32 a, u32 d, u32 cycles)
|
||||
{
|
||||
a &= 0x0e;
|
||||
if (a == 6) { // fill start
|
||||
|
|
@ -376,13 +412,18 @@ static void p32x_vdp_write16(u32 a, u32 d)
|
|||
if (a == 8) { // fill data
|
||||
u16 *dram = Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
|
||||
int len = Pico32x.vdp_regs[4 / 2] + 1;
|
||||
int len1 = len;
|
||||
a = Pico32x.vdp_regs[6 / 2];
|
||||
while (len--) {
|
||||
while (len1--) {
|
||||
dram[a] = d;
|
||||
a = (a & 0xff00) | ((a + 1) & 0xff);
|
||||
}
|
||||
Pico32x.vdp_regs[6 / 2] = a;
|
||||
Pico32x.vdp_regs[8 / 2] = d;
|
||||
Pico32x.vdp_regs[0x06 / 2] = a;
|
||||
Pico32x.vdp_regs[0x08 / 2] = d;
|
||||
if (cycles > 0) {
|
||||
Pico32x.vdp_regs[0x0a / 2] |= P32XV_nFEN;
|
||||
p32x_event_schedule(P32X_EVENT_FILLEND, cycles, len);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -413,7 +454,10 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid)
|
|||
return r[a / 2];
|
||||
// comm port
|
||||
if ((a & 0x30) == 0x20) {
|
||||
if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
|
||||
int comreg = 1 << (a & 0x0f) / 2;
|
||||
if (Pico32x.comm_dirty_68k & comreg)
|
||||
Pico32x.comm_dirty_68k &= ~comreg;
|
||||
else if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
|
||||
ash2_end_run(8);
|
||||
return r[a / 2];
|
||||
}
|
||||
|
|
@ -437,6 +481,8 @@ static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
|
|||
Pico32x.sh2irq_mask[cpuid] = d & 0x8f;
|
||||
Pico32x.sh2_regs[0] &= ~0x80;
|
||||
Pico32x.sh2_regs[0] |= d & 0x80;
|
||||
if (d & 1)
|
||||
p32x_pwm_schedule(sh2s[cpuid].m68krcycles_done); // XXX: timing?
|
||||
p32x_update_irls(1);
|
||||
return;
|
||||
case 5: // H count
|
||||
|
|
@ -447,10 +493,16 @@ static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
|
|||
|
||||
if ((a & 0x30) == 0x20) {
|
||||
u8 *r8 = (u8 *)Pico32x.regs;
|
||||
int comreg;
|
||||
if (r8[a ^ 1] == d)
|
||||
return;
|
||||
|
||||
r8[a ^ 1] = d;
|
||||
if (p32x_poll_undetect(&m68k_poll, 0))
|
||||
SekSetStop(0);
|
||||
p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
|
||||
comreg = 1 << (a & 0x0f) / 2;
|
||||
Pico32x.comm_dirty_sh2 |= comreg;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
|
@ -460,11 +512,17 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
|
|||
a &= 0xfe;
|
||||
|
||||
// comm
|
||||
if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
|
||||
if ((a & 0x30) == 0x20) {
|
||||
int comreg;
|
||||
if (Pico32x.regs[a / 2] == d)
|
||||
return;
|
||||
|
||||
Pico32x.regs[a / 2] = d;
|
||||
if (p32x_poll_undetect(&m68k_poll, 0))
|
||||
SekSetStop(0);
|
||||
p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
|
||||
comreg = 1 << (a & 0x0f) / 2;
|
||||
Pico32x.comm_dirty_sh2 |= comreg;
|
||||
return;
|
||||
}
|
||||
// PWM
|
||||
|
|
@ -484,7 +542,8 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
|
|||
case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
|
||||
case 0x1c:
|
||||
Pico32x.sh2irqs &= ~P32XI_PWM;
|
||||
p32x_timers_do(0);
|
||||
if (!(Pico32x.emu_flags & P32XF_PWM_PEND))
|
||||
p32x_pwm_schedule(sh2s[cpuid].m68krcycles_done); // timing?
|
||||
goto irls;
|
||||
}
|
||||
|
||||
|
|
@ -760,7 +819,7 @@ static void PicoWrite16_32x_on(u32 a, u32 d)
|
|||
}
|
||||
|
||||
if ((a & 0xfff0) == 0x5180) { // a15180
|
||||
p32x_vdp_write16(a, d);
|
||||
p32x_vdp_write16(a, d, 0); // FIXME?
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -1117,7 +1176,7 @@ static int REGPARM(3) sh2_write16_cs0(u32 a, u32 d, int id)
|
|||
|
||||
if ((a & 0x3ff00) == 0x4100) {
|
||||
sh2_poll[id].cnt = 0; // for poll before VDP accesses
|
||||
p32x_vdp_write16(a, d);
|
||||
p32x_vdp_write16(a, d, sh2s[id].m68krcycles_done);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1553,6 +1612,7 @@ void Pico32xStateLoaded(void)
|
|||
p32x_poll_event(3, 0);
|
||||
Pico32x.dirty_pal = 1;
|
||||
memset(Pico32xMem->pwm, 0, sizeof(Pico32xMem->pwm));
|
||||
p32x_timers_recalc();
|
||||
#ifdef DRC_SH2
|
||||
sh2_drc_flush_all();
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -7,19 +7,21 @@
|
|||
*/
|
||||
#include "../pico_int.h"
|
||||
|
||||
static int pwm_line_samples;
|
||||
static int pwm_cycle_counter;
|
||||
static int pwm_cycles;
|
||||
static int pwm_mult;
|
||||
static int pwm_ptr;
|
||||
int pwm_frame_smp_cnt;
|
||||
|
||||
static int timer_line_ticks[2];
|
||||
static int pwm_smp_cnt;
|
||||
static int pwm_smp_expect;
|
||||
|
||||
static int timer_cycles[2];
|
||||
static int timer_tick_cycles[2];
|
||||
|
||||
// timers. This includes PWM timer in 32x and internal SH2 timers
|
||||
void p32x_timers_recalc(void)
|
||||
{
|
||||
int cycles = Pico32x.regs[0x32 / 2];
|
||||
int frame_samples;
|
||||
int tmp, i;
|
||||
|
||||
cycles = (cycles - 1) & 0x0fff;
|
||||
|
|
@ -29,12 +31,6 @@ void p32x_timers_recalc(void)
|
|||
}
|
||||
pwm_cycles = cycles;
|
||||
pwm_mult = 0x10000 / cycles;
|
||||
if (Pico.m.pal)
|
||||
frame_samples = OSC_PAL / 7 * 3 / 50 / cycles;
|
||||
else
|
||||
frame_samples = OSC_NTSC / 7 * 3 / 60 / cycles;
|
||||
|
||||
pwm_line_samples = (frame_samples << 16) / scanlines_total;
|
||||
|
||||
// SH2 timer step
|
||||
for (i = 0; i < 2; i++) {
|
||||
|
|
@ -44,58 +40,68 @@ void p32x_timers_recalc(void)
|
|||
cycles = 0x20 << tmp;
|
||||
else
|
||||
cycles = 2;
|
||||
if (Pico.m.pal)
|
||||
tmp = OSC_PAL / 7 * 3 / 50 / scanlines_total;
|
||||
else
|
||||
tmp = OSC_NTSC / 7 * 3 / 60 / scanlines_total;
|
||||
timer_line_ticks[i] = (tmp << 16) / cycles;
|
||||
elprintf(EL_32X, "timer_line_ticks[%d] = %.3f", i, (double)timer_line_ticks[i] / 0x10000);
|
||||
timer_tick_cycles[i] = cycles;
|
||||
elprintf(EL_32X, "WDT cycles[%d] = %d", i, cycles);
|
||||
}
|
||||
}
|
||||
|
||||
// PWM irq for every tm samples
|
||||
void p32x_timers_do(int line_call)
|
||||
void p32x_timers_do(unsigned int cycles)
|
||||
{
|
||||
int tm, cnt, i;
|
||||
int cnt, i;
|
||||
|
||||
if (PicoOpt & POPT_EN_PWM)
|
||||
{
|
||||
tm = (Pico32x.regs[0x30 / 2] & 0x0f00) >> 8;
|
||||
if (tm != 0) {
|
||||
if (line_call)
|
||||
Pico32x.pwm_irq_sample_cnt += pwm_line_samples;
|
||||
if (Pico32x.pwm_irq_sample_cnt >= (tm << 16)) {
|
||||
Pico32x.pwm_irq_sample_cnt -= tm << 16;
|
||||
Pico32x.sh2irqs |= P32XI_PWM;
|
||||
p32x_update_irls(!line_call);
|
||||
}
|
||||
}
|
||||
cycles *= 3;
|
||||
|
||||
pwm_cycle_counter += cycles;
|
||||
while (pwm_cycle_counter > pwm_cycles) {
|
||||
pwm_cycle_counter -= pwm_cycles;
|
||||
pwm_smp_expect++;
|
||||
}
|
||||
|
||||
if (!line_call)
|
||||
return;
|
||||
|
||||
// WDT timers
|
||||
for (i = 0; i < 2; i++) {
|
||||
void *pregs = Pico32xMem->sh2_peri_regs[i];
|
||||
if (PREG8(pregs, 0x80) & 0x20) { // TME
|
||||
timer_cycles[i] += cycles;
|
||||
cnt = PREG8(pregs, 0x81);
|
||||
cnt += timer_line_ticks[i];
|
||||
while (timer_cycles[i] >= timer_tick_cycles[i]) {
|
||||
timer_cycles[i] -= timer_tick_cycles[i];
|
||||
cnt++;
|
||||
}
|
||||
if (cnt >= 0x100) {
|
||||
int level = PREG8(pregs, 0xe3) >> 4;
|
||||
int vector = PREG8(pregs, 0xe4) & 0x7f;
|
||||
elprintf(EL_32X, "%csh2 WDT irq (%d, %d)", i ? 's' : 'm', level, vector);
|
||||
elprintf(EL_32X, "%csh2 WDT irq (%d, %d)",
|
||||
i ? 's' : 'm', level, vector);
|
||||
sh2_internal_irq(&sh2s[i], level, vector);
|
||||
cnt &= 0xff;
|
||||
}
|
||||
cnt &= 0xff;
|
||||
PREG8(pregs, 0x81) = cnt;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void p32x_pwm_schedule(unsigned int now)
|
||||
{
|
||||
int tm;
|
||||
|
||||
if (Pico32x.emu_flags & P32XF_PWM_PEND)
|
||||
return; // already scheduled
|
||||
if (Pico32x.sh2irqs & P32XI_PWM)
|
||||
return; // previous not acked
|
||||
if (!((Pico32x.sh2irq_mask[0] | Pico32x.sh2irq_mask[1]) & 1))
|
||||
return; // masked by everyone
|
||||
|
||||
tm = (Pico32x.regs[0x30 / 2] & 0x0f00) >> 8;
|
||||
tm = ((tm - 1) & 0x0f) + 1;
|
||||
p32x_event_schedule(P32X_EVENT_PWM, now, pwm_cycles * tm / 3);
|
||||
Pico32x.emu_flags |= P32XF_PWM_PEND;
|
||||
}
|
||||
|
||||
unsigned int p32x_pwm_read16(unsigned int a)
|
||||
{
|
||||
unsigned int d = 0;
|
||||
int predict;
|
||||
int diff;
|
||||
|
||||
a &= 0x0e;
|
||||
switch (a) {
|
||||
|
|
@ -106,12 +112,12 @@ unsigned int p32x_pwm_read16(unsigned int a)
|
|||
case 4: // L ch
|
||||
case 6: // R ch
|
||||
case 8: // MONO
|
||||
predict = (pwm_line_samples * Pico.m.scanline) >> 16;
|
||||
elprintf(EL_PWM, "pwm: read status: ptr %d/%d, predict %d",
|
||||
pwm_frame_smp_cnt, (pwm_line_samples * scanlines_total) >> 16, predict);
|
||||
if (pwm_frame_smp_cnt > predict + 3)
|
||||
diff = pwm_smp_cnt - pwm_smp_expect;
|
||||
elprintf(EL_PWM, "pwm: read status: ptr %d/%d %d",
|
||||
pwm_smp_cnt, pwm_smp_expect, diff);
|
||||
if (diff > 3)
|
||||
d |= P32XP_FULL;
|
||||
else if (pwm_frame_smp_cnt == 0 || pwm_frame_smp_cnt < predict - 1)
|
||||
else if (diff < 0)
|
||||
d |= P32XP_EMPTY;
|
||||
break;
|
||||
}
|
||||
|
|
@ -143,9 +149,10 @@ void p32x_pwm_write16(unsigned int a, unsigned int d)
|
|||
Pico32xMem->pwm[pwm_ptr * 2] = Pico32xMem->pwm[pwm_ptr * 2 + 1] = d;
|
||||
|
||||
if (a >= 6) { // R or MONO
|
||||
pwm_frame_smp_cnt++;
|
||||
pwm_smp_cnt++;
|
||||
pwm_ptr = (pwm_ptr + 1) & (PWM_BUFF_LEN - 1);
|
||||
elprintf(EL_PWM, "pwm: smp_cnt %d, ptr %d, smp %x", pwm_frame_smp_cnt, pwm_ptr, d);
|
||||
elprintf(EL_PWM, "pwm: smp_cnt %d, ptr %d, smp %x",
|
||||
pwm_smp_cnt, pwm_ptr, d);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -190,3 +197,4 @@ void p32x_pwm_update(int *buf32, int length, int stereo)
|
|||
pwm_ptr = 0;
|
||||
}
|
||||
|
||||
// vim:shiftwidth=2:ts=2:expandtab
|
||||
|
|
|
|||
|
|
@ -219,9 +219,6 @@ void PicoLoopPrepare(void)
|
|||
|
||||
Pico.m.dirtyPal = 1;
|
||||
rendstatus_old = -1;
|
||||
|
||||
if (PicoAHW & PAHW_32X)
|
||||
p32x_timers_recalc();
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -111,9 +111,6 @@ static int PicoFrameHints(void)
|
|||
#ifdef PICO_CD
|
||||
check_cd_dma();
|
||||
#endif
|
||||
#ifdef PICO_32X
|
||||
p32x_timers_do(1);
|
||||
#endif
|
||||
|
||||
// H-Interrupts:
|
||||
if (--hint < 0) // y <= lines_vis: Comix Zone, Golden Axe
|
||||
|
|
@ -146,6 +143,9 @@ static int PicoFrameHints(void)
|
|||
PicoSyncZ80(SekCycleCnt);
|
||||
if (ym2612.dacen && PsndDacLine <= y)
|
||||
PsndDoDAC(y);
|
||||
#ifdef PICO_32X
|
||||
p32x_sync_sh2s(SekCycleCntT + SekCycleCnt);
|
||||
#endif
|
||||
PsndGetSamples(y);
|
||||
}
|
||||
|
||||
|
|
@ -183,9 +183,6 @@ static int PicoFrameHints(void)
|
|||
#ifdef PICO_CD
|
||||
check_cd_dma();
|
||||
#endif
|
||||
#ifdef PICO_32X
|
||||
p32x_timers_do(1);
|
||||
#endif
|
||||
|
||||
// Last H-Int:
|
||||
if (--hint < 0)
|
||||
|
|
@ -199,10 +196,6 @@ static int PicoFrameHints(void)
|
|||
pv->status|=0x08; // go into vblank
|
||||
pv->pending_ints|=0x20;
|
||||
|
||||
#ifdef PICO_32X
|
||||
p32x_start_blank();
|
||||
#endif
|
||||
|
||||
// the following SekRun is there for several reasons:
|
||||
// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
|
||||
// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
|
||||
|
|
@ -219,6 +212,11 @@ static int PicoFrameHints(void)
|
|||
z80_int();
|
||||
}
|
||||
|
||||
#ifdef PICO_32X
|
||||
p32x_sync_sh2s(SekCycleCntT + SekCycleCnt);
|
||||
p32x_start_blank();
|
||||
#endif
|
||||
|
||||
// get samples from sound chips
|
||||
if (y == 224 && PsndOut)
|
||||
{
|
||||
|
|
@ -254,9 +252,6 @@ static int PicoFrameHints(void)
|
|||
#ifdef PICO_CD
|
||||
check_cd_dma();
|
||||
#endif
|
||||
#ifdef PICO_32X
|
||||
p32x_timers_do(1);
|
||||
#endif
|
||||
|
||||
// Run scanline:
|
||||
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
|
||||
|
|
@ -275,6 +270,9 @@ static int PicoFrameHints(void)
|
|||
if (PsndOut && ym2612.dacen && PsndDacLine <= lines-1)
|
||||
PsndDoDAC(lines-1);
|
||||
|
||||
#ifdef PICO_32X
|
||||
p32x_sync_sh2s(SekCycleCntT + SekCycleCnt);
|
||||
#endif
|
||||
timers_cycle();
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -237,13 +237,22 @@ extern SH2 sh2s[2];
|
|||
#define ssh2 sh2s[1]
|
||||
|
||||
#ifndef DRC_SH2
|
||||
# define ash2_end_run(after) if (sh2->icount > (after)) sh2->icount = after
|
||||
# define ash2_end_run(after) do { \
|
||||
if (sh2->icount > (after)) { \
|
||||
sh2->cycles_timeslice -= sh2->icount; \
|
||||
sh2->icount = after; \
|
||||
} \
|
||||
} while (0)
|
||||
# define ash2_cycles_done() (sh2->cycles_timeslice - sh2->icount)
|
||||
#else
|
||||
# define ash2_end_run(after) { \
|
||||
if ((sh2->sr >> 12) > (after)) \
|
||||
{ sh2->sr &= 0xfff; sh2->sr |= (after) << 12; } \
|
||||
}
|
||||
# define ash2_end_run(after) do { \
|
||||
int left = sh2->sr >> 12; \
|
||||
if (left > (after)) { \
|
||||
sh2->cycles_timeslice -= left; \
|
||||
sh2->sr &= 0xfff; \
|
||||
sh2->sr |= (after) << 12; \
|
||||
} \
|
||||
} while (0)
|
||||
# define ash2_cycles_done() (sh2->cycles_timeslice - (sh2->sr >> 12))
|
||||
#endif
|
||||
|
||||
|
|
@ -460,6 +469,7 @@ typedef struct
|
|||
#define P32XF_68KVPOLL (1 << 3)
|
||||
#define P32XF_MSH2VPOLL (1 << 4)
|
||||
#define P32XF_SSH2VPOLL (1 << 5)
|
||||
#define P32XF_PWM_PEND (1 << 6)
|
||||
|
||||
#define P32XI_VRES (1 << 14/2) // IRL/2
|
||||
#define P32XI_VINT (1 << 12/2)
|
||||
|
|
@ -493,7 +503,10 @@ struct Pico32x
|
|||
unsigned short dmac_fifo[DMAC_FIFO_LEN];
|
||||
unsigned int dmac_ptr;
|
||||
unsigned int pwm_irq_sample_cnt;
|
||||
unsigned int reserved[9];
|
||||
unsigned char comm_dirty_68k;
|
||||
unsigned char comm_dirty_sh2;
|
||||
unsigned short pad;
|
||||
unsigned int reserved[8];
|
||||
};
|
||||
|
||||
struct Pico32xMem
|
||||
|
|
@ -719,6 +732,13 @@ void p32x_sync_sh2s(unsigned int m68k_target);
|
|||
void p32x_update_irls(int nested_call);
|
||||
void p32x_reset_sh2s(void);
|
||||
|
||||
enum p32x_event {
|
||||
P32X_EVENT_PWM,
|
||||
P32X_EVENT_FILLEND,
|
||||
P32X_EVENT_COUNT,
|
||||
};
|
||||
void p32x_event_schedule(enum p32x_event event, unsigned int now, int after);
|
||||
|
||||
// 32x/memory.c
|
||||
struct Pico32xMem *Pico32xMem;
|
||||
unsigned int PicoRead8_32x(unsigned int a);
|
||||
|
|
@ -747,9 +767,9 @@ extern int Pico32xDrawMode;
|
|||
unsigned int p32x_pwm_read16(unsigned int a);
|
||||
void p32x_pwm_write16(unsigned int a, unsigned int d);
|
||||
void p32x_pwm_update(int *buf32, int length, int stereo);
|
||||
void p32x_timers_do(int line_call);
|
||||
void p32x_timers_do(unsigned int cycles);
|
||||
void p32x_timers_recalc(void);
|
||||
extern int pwm_frame_smp_cnt;
|
||||
void p32x_pwm_schedule(unsigned int now);
|
||||
#else
|
||||
#define Pico32xInit()
|
||||
#define PicoPower32x()
|
||||
|
|
@ -805,10 +825,10 @@ static __inline int isspace_(int c)
|
|||
|
||||
#if EL_LOGMASK
|
||||
#define elprintf(w,f,...) \
|
||||
{ \
|
||||
do { \
|
||||
if ((w) & EL_LOGMASK) \
|
||||
lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \
|
||||
}
|
||||
} while (0)
|
||||
#elif defined(_MSC_VER)
|
||||
#define elprintf
|
||||
#else
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue