mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
32x: rework scheduling/timing
- don't run in line quantity - decouple from 68k - some things to tune..
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parent
ed4402a7df
commit
a8fd6e3761
9 changed files with 325 additions and 130 deletions
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@ -183,30 +183,44 @@ static u32 p32x_reg_read16(u32 a)
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{
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a &= 0x3e;
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if (a == 2) // INTM, INTS
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return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3);
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#if 0
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if ((a & 0x30) == 0x20)
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return sh2_comm_faker(a);
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#else
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if ((a & 0x30) == 0x20) {
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// evil X-Men proto polls in a dbra loop and expects it to expire..
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static u32 dr2 = 0;
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unsigned int cycles = SekCyclesDoneT();
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int comreg = 1 << (a & 0x0f) / 2;
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// evil X-Men proto polls in a dbra loop and expects it to expire..
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if (SekDar(2) != dr2)
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m68k_poll.cnt = 0;
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dr2 = SekDar(2);
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if (p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) {
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if (cycles - msh2.m68krcycles_done > 500)
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p32x_sync_sh2s(cycles);
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if (Pico32x.comm_dirty_sh2 & comreg)
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Pico32x.comm_dirty_sh2 &= ~comreg;
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else if (p32x_poll_detect(&m68k_poll, a, cycles, 0)) {
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SekSetStop(1);
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SekEndTimeslice(16);
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}
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dr2 = SekDar(2);
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goto out;
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}
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#endif
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if (a == 2) { // INTM, INTS
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unsigned int cycles = SekCyclesDoneT();
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if (cycles - msh2.m68krcycles_done > 64)
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p32x_sync_sh2s(cycles);
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return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3);
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}
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if ((a & 0x30) == 0x30)
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return p32x_pwm_read16(a);
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out:
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return Pico32x.regs[a / 2];
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}
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@ -229,14 +243,14 @@ static void p32x_reg_write8(u32 a, u32 d)
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return;
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case 3: // irq ctl
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if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
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p32x_sync_sh2s(SekCyclesDoneT());
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Pico32x.sh2irqi[0] |= P32XI_CMD;
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p32x_update_irls(0);
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SekEndRun(16);
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}
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if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
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p32x_sync_sh2s(SekCyclesDoneT());
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Pico32x.sh2irqi[1] |= P32XI_CMD;
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p32x_update_irls(0);
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SekEndRun(16);
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}
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return;
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case 5: // bank
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@ -256,12 +270,23 @@ static void p32x_reg_write8(u32 a, u32 d)
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if ((a & 0x30) == 0x20) {
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u8 *r8 = (u8 *)r;
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int cycles = SekCyclesDoneT();
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int comreg;
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if (r8[a ^ 1] == d)
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return;
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comreg = 1 << (a & 0x0f) / 2;
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if (Pico32x.comm_dirty_68k & comreg)
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p32x_sync_sh2s(cycles);
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r8[a ^ 1] = d;
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p32x_poll_undetect(&sh2_poll[0], 0);
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p32x_poll_undetect(&sh2_poll[1], 0);
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// if some SH2 is busy waiting, it needs to see the result ASAP
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if (SekCyclesLeftNoMCD > 32)
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SekEndRun(32);
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Pico32x.comm_dirty_68k |= comreg;
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if (cycles - (int)msh2.m68krcycles_done > 120)
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p32x_sync_sh2s(cycles);
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return;
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}
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}
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@ -304,13 +329,24 @@ static void p32x_reg_write16(u32 a, u32 d)
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return;
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}
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// comm port
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else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
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else if ((a & 0x30) == 0x20) {
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int cycles = SekCyclesDoneT();
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int comreg;
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if (r[a / 2] == d)
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return;
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comreg = 1 << (a & 0x0f) / 2;
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if (Pico32x.comm_dirty_68k & comreg)
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p32x_sync_sh2s(cycles);
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r[a / 2] = d;
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p32x_poll_undetect(&sh2_poll[0], 0);
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p32x_poll_undetect(&sh2_poll[1], 0);
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// same as for w8
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if (SekCyclesLeftNoMCD > 32)
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SekEndRun(32);
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Pico32x.comm_dirty_68k |= comreg;
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if (cycles - (int)msh2.m68krcycles_done > 120)
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p32x_sync_sh2s(cycles);
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return;
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}
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// PWM
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@ -366,7 +402,7 @@ static void p32x_vdp_write8(u32 a, u32 d)
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}
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}
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static void p32x_vdp_write16(u32 a, u32 d)
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static void p32x_vdp_write16(u32 a, u32 d, u32 cycles)
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{
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a &= 0x0e;
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if (a == 6) { // fill start
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@ -376,13 +412,18 @@ static void p32x_vdp_write16(u32 a, u32 d)
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if (a == 8) { // fill data
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u16 *dram = Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
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int len = Pico32x.vdp_regs[4 / 2] + 1;
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int len1 = len;
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a = Pico32x.vdp_regs[6 / 2];
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while (len--) {
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while (len1--) {
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dram[a] = d;
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a = (a & 0xff00) | ((a + 1) & 0xff);
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}
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Pico32x.vdp_regs[6 / 2] = a;
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Pico32x.vdp_regs[8 / 2] = d;
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Pico32x.vdp_regs[0x06 / 2] = a;
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Pico32x.vdp_regs[0x08 / 2] = d;
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if (cycles > 0) {
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Pico32x.vdp_regs[0x0a / 2] |= P32XV_nFEN;
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p32x_event_schedule(P32X_EVENT_FILLEND, cycles, len);
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}
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return;
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}
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@ -413,7 +454,10 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid)
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return r[a / 2];
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// comm port
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if ((a & 0x30) == 0x20) {
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if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
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int comreg = 1 << (a & 0x0f) / 2;
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if (Pico32x.comm_dirty_68k & comreg)
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Pico32x.comm_dirty_68k &= ~comreg;
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else if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
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ash2_end_run(8);
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return r[a / 2];
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}
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@ -437,6 +481,8 @@ static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
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Pico32x.sh2irq_mask[cpuid] = d & 0x8f;
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Pico32x.sh2_regs[0] &= ~0x80;
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Pico32x.sh2_regs[0] |= d & 0x80;
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if (d & 1)
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p32x_pwm_schedule(sh2s[cpuid].m68krcycles_done); // XXX: timing?
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p32x_update_irls(1);
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return;
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case 5: // H count
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@ -447,10 +493,16 @@ static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
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if ((a & 0x30) == 0x20) {
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u8 *r8 = (u8 *)Pico32x.regs;
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int comreg;
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if (r8[a ^ 1] == d)
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return;
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r8[a ^ 1] = d;
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if (p32x_poll_undetect(&m68k_poll, 0))
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SekSetStop(0);
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p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
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comreg = 1 << (a & 0x0f) / 2;
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Pico32x.comm_dirty_sh2 |= comreg;
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return;
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}
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}
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@ -460,11 +512,17 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
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a &= 0xfe;
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// comm
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if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
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if ((a & 0x30) == 0x20) {
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int comreg;
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if (Pico32x.regs[a / 2] == d)
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return;
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Pico32x.regs[a / 2] = d;
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if (p32x_poll_undetect(&m68k_poll, 0))
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SekSetStop(0);
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p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
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comreg = 1 << (a & 0x0f) / 2;
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Pico32x.comm_dirty_sh2 |= comreg;
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return;
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}
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// PWM
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@ -484,7 +542,8 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
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case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
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case 0x1c:
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Pico32x.sh2irqs &= ~P32XI_PWM;
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p32x_timers_do(0);
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if (!(Pico32x.emu_flags & P32XF_PWM_PEND))
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p32x_pwm_schedule(sh2s[cpuid].m68krcycles_done); // timing?
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goto irls;
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}
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@ -760,7 +819,7 @@ static void PicoWrite16_32x_on(u32 a, u32 d)
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}
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if ((a & 0xfff0) == 0x5180) { // a15180
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p32x_vdp_write16(a, d);
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p32x_vdp_write16(a, d, 0); // FIXME?
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return;
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}
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@ -1117,7 +1176,7 @@ static int REGPARM(3) sh2_write16_cs0(u32 a, u32 d, int id)
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if ((a & 0x3ff00) == 0x4100) {
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sh2_poll[id].cnt = 0; // for poll before VDP accesses
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p32x_vdp_write16(a, d);
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p32x_vdp_write16(a, d, sh2s[id].m68krcycles_done);
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return 0;
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}
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@ -1553,6 +1612,7 @@ void Pico32xStateLoaded(void)
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p32x_poll_event(3, 0);
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Pico32x.dirty_pal = 1;
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memset(Pico32xMem->pwm, 0, sizeof(Pico32xMem->pwm));
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p32x_timers_recalc();
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#ifdef DRC_SH2
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sh2_drc_flush_all();
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#endif
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