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sh2 drc, make B/W read functions signed (reduces generated code size)
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ed7e915078
commit
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7 changed files with 85 additions and 60 deletions
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@ -795,6 +795,8 @@ static inline void emith_pool_check(void)
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emith_read_r_r_offs_c(cond, r, rs, offs)
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#define emith_read_r_r_r_c(cond, r, rs, rm) \
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EOP_LDR_REG_LSL(cond, r, rs, rm, 0)
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#define emith_read_r_r_offs(r, rs, offs) \
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emith_read_r_r_offs_c(A_COND_AL, r, rs, offs)
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#define emith_read_r_r_r(r, rs, rm) \
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EOP_LDR_REG_LSL(A_COND_AL, r, rs, rm, 0)
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@ -802,28 +804,37 @@ static inline void emith_pool_check(void)
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EOP_LDRB_IMM2(cond, r, rs, offs)
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#define emith_read8_r_r_r_c(cond, r, rs, rm) \
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EOP_LDRB_REG_LSL(cond, r, rs, rm, 0)
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#define emith_read8_r_r_offs(r, rs, offs) \
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emith_read8_r_r_offs_c(A_COND_AL, r, rs, offs)
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#define emith_read8_r_r_r(r, rs, rm) \
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EOP_LDRB_REG_LSL(A_COND_AL, r, rs, rm, 0)
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emith_read8_r_r_r_c(A_COND_AL, r, rs, rm)
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#define emith_read16_r_r_offs_c(cond, r, rs, offs) \
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EOP_LDRH_IMM2(cond, r, rs, offs)
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#define emith_read16_r_r_r_c(cond, r, rs, rm) \
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EOP_LDRH_REG2(cond, r, rs, rm)
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#define emith_read16_r_r_r(r, rs, rm) \
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EOP_LDRH_REG2(A_COND_AL, r, rs, rm)
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#define emith_read_r_r_offs(r, rs, offs) \
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emith_read_r_r_offs_c(A_COND_AL, r, rs, offs)
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#define emith_read8s_r_r_offs(r, rs, offs) \
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EOP_LDRSB_IMM2(A_COND_AL, r, rs, offs)
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#define emith_read8_r_r_offs(r, rs, offs) \
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emith_read8_r_r_offs_c(A_COND_AL, r, rs, offs)
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#define emith_read16s_r_r_offs(r, rs, offs) \
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EOP_LDRSH_IMM2(A_COND_AL, r, rs, offs)
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#define emith_read16_r_r_offs(r, rs, offs) \
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emith_read16_r_r_offs_c(A_COND_AL, r, rs, offs)
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#define emith_read16_r_r_r(r, rs, rm) \
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emith_read16_r_r_r_c(A_COND_AL, r, rs, rm)
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#define emith_read8s_r_r_offs_c(cond, r, rs, offs) \
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EOP_LDRSB_IMM2(cond, r, rs, offs)
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#define emith_read8s_r_r_r_c(cond, r, rs, rm) \
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EOP_LDRSB_REG2(cond, r, rs, rm)
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#define emith_read8s_r_r_offs(r, rs, offs) \
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emith_read8s_r_r_offs_c(A_COND_AL, r, rs, offs)
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#define emith_read8s_r_r_r(r, rs, rm) \
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emith_read8s_r_r_r_c(A_COND_AL, r, rs, rm)
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#define emith_read16s_r_r_offs_c(cond, r, rs, offs) \
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EOP_LDRSH_IMM2(cond, r, rs, offs)
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#define emith_read16s_r_r_r_c(cond, r, rs, rm) \
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EOP_LDRSH_REG2(cond, r, rs, rm)
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#define emith_read16s_r_r_offs(r, rs, offs) \
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emith_read16s_r_r_offs_c(A_COND_AL, r, rs, offs)
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#define emith_read16s_r_r_r(r, rs, rm) \
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emith_read16s_r_r_r_c(A_COND_AL, r, rs, rm)
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#define emith_write_r_r_offs_c(cond, r, rs, offs) \
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EOP_STR_IMM2(cond, r, rs, offs)
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@ -945,6 +956,11 @@ static inline void emith_pool_check(void)
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#define emith_call(target) \
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emith_call_cond(A_COND_AL, target)
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#define emith_call_reg(r) { \
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emith_move_r_r(14, 15); \
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EOP_C_BX(A_COND_AL, r); \
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}
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#define emith_call_ctx(offs) { \
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emith_move_r_r(14, 15); \
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emith_jump_ctx(offs); \
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@ -1091,9 +1107,7 @@ static inline void emith_pool_check(void)
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} while (0)
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/* mh:ml += rn*rm, does saturation if required by S bit. rn, rm must be TEMP */
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#define emith_sh2_macw(ml, mh, rn, rm, sr) do { \
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emith_sext(rn, rn, 16); \
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emith_sext(rm, rm, 16); \
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#define emith_sh2_macw(ml, mh, rn, rm, sr) do { \
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emith_tst_r_imm(sr, S); \
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EMITH_SJMP2_START(DCOND_NE); \
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emith_mula_s64_c(DCOND_EQ, ml, mh, rn, rm); \
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@ -397,8 +397,12 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_read8_r_r_r_c(cond, r, rs, rm) \
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emith_read8_r_r_r(r, rs, rm)
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#define emith_read8s_r_r_r_c(cond, r, rs, rm) \
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emith_read8s_r_r_r(r, rs, rm)
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#define emith_read16_r_r_r_c(cond, r, rs, rm) \
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emith_read16_r_r_r(r, rs, rm)
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#define emith_read16s_r_r_r_c(cond, r, rs, rm) \
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emith_read16s_r_r_r(r, rs, rm)
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#define emith_read_r_r_r_c(cond, r, rs, rm) \
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emith_read_r_r_r(r, rs, rm)
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@ -684,12 +688,24 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
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} while (0)
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#define emith_read8s_r_r_r(r, rs, rm) do { \
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EMIT(0x0f, u8); \
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EMIT_OP_MODRM(0xbe, 0, r, 4); \
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EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
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} while (0)
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#define emith_read16_r_r_r(r, rs, rm) do { \
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EMIT(0x0f, u8); \
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EMIT_OP_MODRM(0xb7, 0, r, 4); \
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EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
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} while (0)
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#define emith_read16s_r_r_r(r, rs, rm) do { \
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EMIT(0x0f, u8); \
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EMIT_OP_MODRM(0xbf, 0, r, 4); \
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EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
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} while (0)
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#define emith_read_r_r_r(r, rs, rm) do { \
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EMIT_OP_MODRM(0x8b, 0, r, 4); \
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EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
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@ -785,9 +801,11 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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EMIT(offs, u32); \
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} while (0)
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#define emith_push_ret()
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#define emith_push_ret() \
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emith_push(xSI); /* to align */
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#define emith_pop_and_ret() \
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emith_pop(xSI); \
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emith_ret()
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#define EMITH_JMP_START(cond) { \
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@ -1080,8 +1098,6 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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/* mh:ml += rn*rm, does saturation if required by S bit. rn, rm must be TEMP */
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#define emith_sh2_macw(ml, mh, rn, rm, sr) do { \
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emith_sext(rn, rn, 16); \
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emith_sext(rm, rm, 16); \
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emith_tst_r_imm(sr, S); \
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EMITH_SJMP_START(DCOND_EQ); \
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/* XXX: MACH should be untouched when S is set? */ \
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