mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-06 23:58:04 -04:00
some audio problems fixed, missing files added
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@31 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
parent
7a93adeb29
commit
abe0ea43b5
9 changed files with 583 additions and 288 deletions
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@ -1,8 +1,13 @@
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.global code940
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@ vim:filetype=armasm:
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.equ mmsp2_regs, (0xc0000000-0x02000000) @ assume we live @ 0x2000000 bank
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.equ shared_ctl, 0x00200000 @ this is where shared_ctl struncture is located
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code940: @ interrupt table:
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@ exception table:
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.global code940
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code940:
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b .b_reset @ reset
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b .b_undef @ undefined instructions
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b .b_swi @ software interrupt
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@ -32,19 +37,23 @@ code940: @ interrupt table:
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mov r12, #5
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b .Begin
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.b_irq:
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mov r12, #6
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mov sp, #0x100000 @ reset stack
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sub sp, sp, #4
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mov r1, #mmsp2_regs
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orr r2, r1, #0x3B00
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orr r2, r2, #0x0046
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mvn r3, #0
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strh r3, [r2] @ clear any pending interrupts from the DUALCPU unit
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orr r2, r1, #0x4500
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str r3, [r2] @ clear all pending interrupts in irq controller's SRCPND register
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orr r2, r2, #0x0010
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str r3, [r2] @ clear all pending interrupts in irq controller's INTPND register
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b .Enter
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mov r0, #shared_ctl @ remember where we were when interrupt happened
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add r0, r0, #0x20
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str lr, [r0]
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mov r0, #shared_ctl @ increment exception counter (for debug)
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add r0, r0, #(6*4)
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ldr r1, [r0]
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add r1, r1, #1
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str r1, [r0]
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bl Main940
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@ we should never get here
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b .b_reserved
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.b_fiq:
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mov r12, #7
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b .Begin
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@ -81,8 +90,13 @@ code940: @ interrupt table:
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mcr p15, 0, r0, c6, c4, 0
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mcr p15, 0, r0, c6, c4, 1
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@ set regions 1 and 4 to be cacheable (so the first 2M and mp3 area will be cacheable)
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mov r0, #(1<<1)|(1<<4)
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@ region 5: 4K 0x00000000-0x00001000 (boot code protection region)
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mov r0, #(0x0b<<1)|1
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mcr p15, 0, r0, c6, c5, 0
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mcr p15, 0, r0, c6, c5, 1
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@ set regions 1, 4 and 5 to be cacheable (so the first 2M and mp3 area will be cacheable)
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mov r0, #(1<<1)|(1<<4)|(1<<5)
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mcr p15, 0, r0, c2, c0, 0
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mcr p15, 0, r0, c2, c0, 1
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@ -90,10 +104,13 @@ code940: @ interrupt table:
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mov r0, #(1<<1)
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mcr p15, 0, r0, c3, c0, 0
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@ set protection, allow access only to regions 1 and 2
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mov r0, #(3<<8)|(3<<6)|(3<<4)|(3<<2)|(0) @ data: [full, full, full, full, no access] for regions [4 3 2 1 0]
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@ set access protection
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@ data: [no, full, full, full, full, no access] for regions [5 4 3 2 1 0]
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mov r0, #(0<<10)|(3<<8)|(3<<6)|(3<<4)|(3<<2)|(0)
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mcr p15, 0, r0, c5, c0, 0
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mov r0, #(0<<8)|(0<<6)|(0<<4)|(3<<2)|(0) @ instructions: [no access, no, no, full, no]
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@ instructions: [full, no access, no, no, full, no]
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mov r0, #(0<< 6)|(0<<4)|(3<<2)|(0)
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orr r0, r0, #(3<<10)|(0<<8)
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mcr p15, 0, r0, c5, c0, 1
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mrc p15, 0, r0, c1, c0, 0 @ fetch current control reg
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@ -109,19 +126,74 @@ code940: @ interrupt table:
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mov r0, #0
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mcr p15, 0, r0, c7, c6, 0
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.Enter:
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mov r0, r12
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mov r1, lr
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bl Main940
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@ remember which exception vector we came from (increment counter for debug)
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mov r0, #shared_ctl
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add r0, r0, r12, lsl #2
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ldr r1, [r0]
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add r1, r1, #1
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str r1, [r0]
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@ remember last lr (for debug)
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mov r0, #shared_ctl
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add r0, r0, #0x20
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str lr, [r0]
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@ we should never get here
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@.b_deadloop:
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@ b .b_deadloop
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b .b_reserved
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@ ready to take first job-interrupt
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wait_for_irq:
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mrs r0, cpsr
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bic r0, r0, #0x80
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msr cpsr_c, r0 @ enable interrupts
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mov r0, #0
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mcr p15, 0, r0, c7, c0, 4 @ wait for IRQ
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@ mcr p15, 0, r0, c15, c8, 2
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nop
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nop
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b .b_reserved
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@ so asm utils are also defined here:
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@ next job getter
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.global wait_get_job @ int oldjob
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wait_get_job:
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mov r3, #mmsp2_regs
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orr r2, r3, #0x3B00
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orr r2, r2, #0x0046 @ DUALPEND940 register
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ldrh r12,[r2]
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tst r0, r0
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beq wgj_no_old
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sub r0, r0, #1
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mov r1, #1
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mov r1, r1, lsl r0
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strh r1, [r2] @ clear finished job's pending bit
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bic r12,r12,r1
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wgj_no_old:
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tst r12,r12
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beq wgj_no_jobs
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mov r0, #0
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wgj_loop:
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add r0, r0, #1
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movs r12,r12,lsr #1
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bxcs lr
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b wgj_loop
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wgj_no_jobs:
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mvn r0, #0
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orr r2, r3, #0x4500
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str r0, [r2] @ clear all pending interrupts in irq controller's SRCPND register
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orr r2, r2, #0x0010
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str r0, [r2] @ clear all pending interrupts in irq controller's INTPND register
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b wait_for_irq
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.pool
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@ some asm utils are also defined here:
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.global spend_cycles @ c
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spend_cycles:
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@ -135,16 +207,16 @@ spend_cycles:
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@ clean-flush function from ARM940T technical reference manual
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.global cache_clean_flush
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.global dcache_clean_flush
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cache_clean_flush:
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dcache_clean_flush:
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mov r1, #0 @ init line counter
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ccf_outer_loop:
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mov r0, #0 @ segment counter
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ccf_inner_loop:
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orr r2, r1, r0 @ make segment and line address
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mcr p15, 0, r2, c7, c14, 2 @ clean and flush that line
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add r0, r0, #0x10 @ incremet secment counter
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add r0, r0, #0x10 @ incremet segment counter
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cmp r0, #0x40 @ complete all 4 segments?
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bne ccf_inner_loop
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add r1, r1, #0x04000000 @ increment line counter
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@ -153,17 +225,18 @@ ccf_inner_loop:
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bx lr
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@ clean-only version
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.global cache_clean
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cache_clean:
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@ clean-only version
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.global dcache_clean
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dcache_clean:
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mov r1, #0 @ init line counter
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cf_outer_loop:
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mov r0, #0 @ segment counter
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cf_inner_loop:
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orr r2, r1, r0 @ make segment and line address
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mcr p15, 0, r2, c7, c10, 2 @ clean that line
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add r0, r0, #0x10 @ incremet secment counter
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add r0, r0, #0x10 @ incremet segment counter
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cmp r0, #0x40 @ complete all 4 segments?
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bne cf_inner_loop
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add r1, r1, #0x04000000 @ increment line counter
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@ -172,31 +245,13 @@ cf_inner_loop:
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bx lr
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.global wait_irq
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wait_irq:
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mov r0, #mmsp2_regs
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orr r0, r0, #0x3B00
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orr r1, r0, #0x0042
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mov r3, #0
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strh r3, [r1] @ disable interrupts
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orr r2, r0, #0x003E
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strh r3, [r2] @ remove busy flag
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mov r3, #1
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strh r3, [r1] @ enable interrupts
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mrs r0, cpsr
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bic r0, r0, #0x80
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msr cpsr_c, r0 @ enable interrupts
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@ drain write buffer
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.global drain_wb
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drain_wb:
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mov r0, #0
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mcr p15, 0, r0, c7, c0, 4 @ wait for IRQ
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@ mcr p15, 0, r0, c15, c8, 2
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nop
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nop
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b .b_reserved
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.pool
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mcr p15, 0, r0, c7, c10, 4
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bx lr
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.global set_if_not_changed @ int *val, int oldval, int newval
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@ -208,4 +263,10 @@ set_if_not_changed:
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strne r3, [r0] @ restore value which was changed there by other core
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bx lr
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@ vim:filetype=armasm:
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@ pad the protected region.
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.rept 1024
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.long 0
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.endr
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