mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-06 07:38:05 -04:00
new timing for main and cd
This commit is contained in:
notaz
parent
75a30842c4
commit
ae214f1c37
19 changed files with 507 additions and 474 deletions
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@ -166,7 +166,7 @@ void p32x_reset_sh2s(void)
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// program will set S_OK
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}
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msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT();
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msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDone();
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}
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void Pico32xInit(void)
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@ -200,8 +200,8 @@ void PicoUnload32x(void)
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void PicoReset32x(void)
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{
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if (PicoAHW & PAHW_32X) {
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msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT();
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p32x_trigger_irq(NULL, SekCyclesDoneT2(), P32XI_VRES);
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msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDone();
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p32x_trigger_irq(NULL, SekCyclesDone(), P32XI_VRES);
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p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0);
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p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, 0);
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p32x_pwm_ctl_changed();
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@ -248,7 +248,7 @@ static void p32x_start_blank(void)
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Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
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}
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p32x_trigger_irq(NULL, SekCyclesDoneT2(), P32XI_VINT);
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p32x_trigger_irq(NULL, SekCyclesDone(), P32XI_VINT);
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p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
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p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
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}
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@ -272,14 +272,6 @@ void p32x_schedule_hint(SH2 *sh2, int m68k_cycles)
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p32x_event_schedule(m68k_cycles, P32X_EVENT_HINT, after);
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}
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// compare cycles, handling overflows
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// check if a > b
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#define CYCLES_GT(a, b) \
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((int)((a) - (b)) > 0)
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// check if a >= b
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#define CYCLES_GE(a, b) \
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((int)((a) - (b)) >= 0)
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/* events */
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static void fillend_event(unsigned int now)
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{
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@ -296,9 +288,10 @@ static void hint_event(unsigned int now)
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typedef void (event_cb)(unsigned int now);
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unsigned int event_times[P32X_EVENT_COUNT];
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/* times are in m68k (7.6MHz) cycles */
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unsigned int p32x_event_times[P32X_EVENT_COUNT];
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static unsigned int event_time_next;
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static event_cb *event_cbs[] = {
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static event_cb *p32x_event_cbs[P32X_EVENT_COUNT] = {
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[P32X_EVENT_PWM] = p32x_pwm_irq_event,
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[P32X_EVENT_FILLEND] = fillend_event,
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[P32X_EVENT_HINT] = hint_event,
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@ -311,8 +304,8 @@ void p32x_event_schedule(unsigned int now, enum p32x_event event, int after)
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when = (now + after) | 1;
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elprintf(EL_32X, "new event #%u %u->%u", event, now, when);
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event_times[event] = when;
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elprintf(EL_32X, "32x: new event #%u %u->%u", event, now, when);
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p32x_event_times[event] = when;
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if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
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event_time_next = when;
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@ -329,7 +322,7 @@ void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after)
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sh2_end_run(sh2, left_to_next);
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}
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static void run_events(unsigned int until)
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static void p32x_run_events(unsigned int until)
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{
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int oldest, oldest_diff, time;
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int i, diff;
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@ -338,8 +331,8 @@ static void run_events(unsigned int until)
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oldest = -1, oldest_diff = 0x7fffffff;
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for (i = 0; i < P32X_EVENT_COUNT; i++) {
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if (event_times[i]) {
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diff = event_times[i] - until;
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if (p32x_event_times[i]) {
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diff = p32x_event_times[i] - until;
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if (diff < oldest_diff) {
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oldest_diff = diff;
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oldest = i;
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@ -348,13 +341,13 @@ static void run_events(unsigned int until)
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}
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if (oldest_diff <= 0) {
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time = event_times[oldest];
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event_times[oldest] = 0;
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elprintf(EL_32X, "run event #%d %u", oldest, time);
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event_cbs[oldest](time);
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time = p32x_event_times[oldest];
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p32x_event_times[oldest] = 0;
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elprintf(EL_32X, "32x: run event #%d %u", oldest, time);
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p32x_event_cbs[oldest](time);
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}
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else if (oldest_diff < 0x7fffffff) {
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event_time_next = event_times[oldest];
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event_time_next = p32x_event_times[oldest];
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break;
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}
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else {
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@ -364,7 +357,8 @@ static void run_events(unsigned int until)
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}
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if (oldest != -1)
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elprintf(EL_32X, "next event #%d at %u", oldest, event_time_next);
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elprintf(EL_32X, "32x: next event #%d at %u",
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oldest, event_time_next);
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}
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static inline void run_sh2(SH2 *sh2, int m68k_cycles)
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@ -447,7 +441,7 @@ void sync_sh2s_normal(unsigned int m68k_target)
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while (CYCLES_GT(m68k_target, now))
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{
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if (event_time_next && CYCLES_GE(now, event_time_next))
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run_events(now);
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p32x_run_events(now);
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target = m68k_target;
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if (event_time_next && CYCLES_GT(target, event_time_next))
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@ -521,12 +515,13 @@ void sync_sh2s_lockstep(unsigned int m68k_target)
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}
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}
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#define CPUS_RUN(m68k_cycles,s68k_cycles) do { \
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#define CPUS_RUN(m68k_cycles) do { \
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SekRunM68k(m68k_cycles); \
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if (Pico32x.emu_flags & P32XF_Z80_32X_IO) \
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PicoSyncZ80(SekCycleCnt); \
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if ((Pico32x.emu_flags & P32XF_Z80_32X_IO) && Pico.m.z80Run \
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&& !Pico.m.z80_reset && (PicoOpt & POPT_EN_Z80)) \
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PicoSyncZ80(SekCyclesDone()); \
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if (Pico32x.emu_flags & (P32XF_68KCPOLL|P32XF_68KVPOLL)) \
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p32x_sync_sh2s(SekCyclesDoneT2()); \
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p32x_sync_sh2s(SekCyclesDone()); \
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} while (0)
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#define PICO_32X
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@ -541,7 +536,7 @@ void PicoFrame32x(void)
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Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
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if (!(Pico32x.sh2_regs[0] & 0x80))
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p32x_schedule_hint(NULL, SekCyclesDoneT2());
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p32x_schedule_hint(NULL, SekCyclesDone());
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p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
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p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
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@ -576,11 +571,10 @@ void Pico32xStateLoaded(int is_early)
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return;
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}
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SekCycleCnt = 0;
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sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCycleCntT;
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p32x_update_irls(NULL, SekCycleCntT);
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sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCyclesDone();
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p32x_update_irls(NULL, SekCyclesDone());
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p32x_pwm_state_loaded();
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run_events(SekCycleCntT);
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p32x_run_events(SekCyclesDone());
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}
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// vim:shiftwidth=2:ts=2:expandtab
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@ -187,7 +187,7 @@ static u32 p32x_reg_read16(u32 a)
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#else
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if ((a & 0x30) == 0x20) {
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static u32 dr2 = 0;
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unsigned int cycles = SekCyclesDoneT();
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unsigned int cycles = SekCyclesDone();
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int comreg = 1 << (a & 0x0f) / 2;
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// evil X-Men proto polls in a dbra loop and expects it to expire..
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@ -211,14 +211,14 @@ static u32 p32x_reg_read16(u32 a)
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#endif
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if (a == 2) { // INTM, INTS
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unsigned int cycles = SekCyclesDoneT();
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unsigned int cycles = SekCyclesDone();
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if (cycles - msh2.m68krcycles_done > 64)
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p32x_sync_sh2s(cycles);
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goto out;
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}
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if ((a & 0x30) == 0x30)
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return p32x_pwm_read16(a, NULL, SekCyclesDoneT());
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return p32x_pwm_read16(a, NULL, SekCyclesDone());
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out:
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return Pico32x.regs[a / 2];
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@ -241,7 +241,7 @@ static void dreq0_write(u16 *r, u32 d)
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r[6 / 2] &= ~P32XS_68S;
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if ((Pico32x.dmac0_fifo_ptr & 3) == 0) {
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p32x_sync_sh2s(SekCyclesDoneT());
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p32x_sync_sh2s(SekCyclesDone());
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p32x_dreq0_trigger();
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}
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}
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@ -272,7 +272,7 @@ static void p32x_reg_write8(u32 a, u32 d)
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return;
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case 0x03: // irq ctl
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if ((d ^ r[0x02 / 2]) & 3) {
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int cycles = SekCyclesDoneT();
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int cycles = SekCyclesDone();
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p32x_sync_sh2s(cycles);
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r[0x02 / 2] = d & 3;
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p32x_update_cmd_irq(NULL, cycles);
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@ -383,12 +383,12 @@ static void p32x_reg_write8(u32 a, u32 d)
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case 0x3f:
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return;
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pwm_write:
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p32x_pwm_write16(a & ~1, d, NULL, SekCyclesDoneT());
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p32x_pwm_write16(a & ~1, d, NULL, SekCyclesDone());
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return;
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}
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if ((a & 0x30) == 0x20) {
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int cycles = SekCyclesDoneT();
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int cycles = SekCyclesDone();
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int comreg;
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if (REG8IN16(r, a) == d)
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@ -448,13 +448,13 @@ static void p32x_reg_write16(u32 a, u32 d)
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case 0x30: // PWM control
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d = (r[a / 2] & ~0x0f) | (d & 0x0f);
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r[a / 2] = d;
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p32x_pwm_write16(a, d, NULL, SekCyclesDoneT());
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p32x_pwm_write16(a, d, NULL, SekCyclesDone());
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return;
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}
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// comm port
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if ((a & 0x30) == 0x20) {
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int cycles = SekCyclesDoneT();
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int cycles = SekCyclesDone();
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int comreg;
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if (r[a / 2] == d)
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@ -475,7 +475,7 @@ static void p32x_reg_write16(u32 a, u32 d)
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}
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// PWM
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else if ((a & 0x30) == 0x30) {
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p32x_pwm_write16(a, d, NULL, SekCyclesDoneT());
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p32x_pwm_write16(a, d, NULL, SekCyclesDone());
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return;
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}
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@ -247,7 +247,7 @@ void p32x_pwm_update(int *buf32, int length, int stereo)
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int p = 0;
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int xmd;
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consume_fifo(NULL, SekCyclesDoneT2());
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consume_fifo(NULL, SekCyclesDone());
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xmd = Pico32x.regs[0x30 / 2] & 0x0f;
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if (xmd == 0 || xmd == 0x06 || xmd == 0x09 || xmd == 0x0f)
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@ -326,11 +326,11 @@ void p32x_pwm_state_loaded(void)
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p32x_pwm_ctl_changed();
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// for old savestates
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cycles_diff_sh2 = SekCycleCntT * 3 - Pico32x.pwm_cycle_p;
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cycles_diff_sh2 = SekCycleCnt * 3 - Pico32x.pwm_cycle_p;
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if (cycles_diff_sh2 >= pwm_cycles || cycles_diff_sh2 < 0) {
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Pico32x.pwm_irq_cnt = pwm_irq_reload;
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Pico32x.pwm_cycle_p = SekCycleCntT * 3;
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p32x_pwm_schedule(SekCycleCntT);
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Pico32x.pwm_cycle_p = SekCycleCnt * 3;
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p32x_pwm_schedule(SekCycleCnt);
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}
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}
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@ -73,7 +73,7 @@ static void dmac_transfer_complete(SH2 *sh2, struct dma_chan *chan)
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{
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chan->chcr |= DMA_TE; // DMA has ended normally
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p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDoneT());
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p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDone());
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if (chan->chcr & DMA_IE)
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dmac_te_irq(sh2, chan);
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}
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