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new timing for main and cd

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This commit is contained in:
notaz 2013-08-26 00:32:31 +03:00
parent 75a30842c4
commit ae214f1c37
19 changed files with 507 additions and 474 deletions
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19
pico/cd/LC89510.c
View file

@ -68,7 +68,7 @@ PICO_INTERNAL void Update_CDC_TRansfer(int which)
unsigned short *dest;
unsigned char *src;
if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))
if (1) //Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))
{
length = (Pico_mcd->cdc.DBC.N + 1) >> 1;
Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer
@ -80,7 +80,7 @@ PICO_INTERNAL void Update_CDC_TRansfer(int which)
{
Pico_mcd->cdc.IFSTAT &= ~0x40;
if (Pico_mcd->s68k_regs[0x33] & (1<<5))
if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN5)
{
elprintf(EL_INTS, "cdc DTE irq 5");
SekInterruptS68k(5);
@ -430,6 +430,19 @@ PICO_INTERNAL void CDC_Write_Reg(unsigned char Data)
cdprintf("************** Starting Data Transfer ***********");
cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,
Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]);
// tmp
{
int ddx = Pico_mcd->s68k_regs[4] & 7;
if (ddx < 2) break; // invalid
if (ddx < 4) {
Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
break;
}
if (ddx == 6) break; // invalid
pcd_event_schedule_s68k(PCD_EVENT_DMA, Pico_mcd->cdc.DBC.N / 2);
}
}
break;
@ -504,7 +517,7 @@ PICO_INTERNAL void CDD_Export_Status(void)
Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control
if (Pico_mcd->s68k_regs[0x33] & (1<<4))
if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4)
{
elprintf(EL_INTS, "cdd export irq 4");
SekInterruptS68k(4);

172
pico/cd/gfx_cd.c
View file

@ -12,33 +12,21 @@
#define _rot_comp Pico_mcd->rot_comp
static const int Table_Rot_Time[] =
{
0x00054000, 0x00048000, 0x00040000, 0x00036000, //; 008-032 ; briefing - sprite
0x0002E000, 0x00028000, 0x00024000, 0x00022000, //; 036-064 ; arbre souvent
0x00021000, 0x00020000, 0x0001E000, 0x0001B800, //; 068-096 ; map thunderstrike
0x00019800, 0x00017A00, 0x00015C00, 0x00013E00, //; 100-128 ; logo défoncé
0x00012000, 0x00011800, 0x00011000, 0x00010800, //; 132-160 ; briefing - map
0x00010000, 0x0000F800, 0x0000F000, 0x0000E800, //; 164-192
0x0000E000, 0x0000D800, 0x0000D000, 0x0000C800, //; 196-224
0x0000C000, 0x0000B800, 0x0000B000, 0x0000A800, //; 228-256 ; batman visage
0x0000A000, 0x00009F00, 0x00009E00, 0x00009D00, //; 260-288
0x00009C00, 0x00009B00, 0x00009A00, 0x00009900, //; 292-320
0x00009800, 0x00009700, 0x00009600, 0x00009500, //; 324-352
0x00009400, 0x00009300, 0x00009200, 0x00009100, //; 356-384
0x00009000, 0x00008F00, 0x00008E00, 0x00008D00, //; 388-416
0x00008C00, 0x00008B00, 0x00008A00, 0x00008900, //; 420-448
0x00008800, 0x00008700, 0x00008600, 0x00008500, //; 452-476
0x00008400, 0x00008300, 0x00008200, 0x00008100, //; 480-512
};
static void gfx_do_line(unsigned int func, unsigned short *stamp_base,
unsigned int H_Dot);
static void gfx_cd_start(void)
{
int upd_len;
int w, h;
w = _rot_comp.Reg_62;
h = _rot_comp.Reg_64;
if (w == 0 || h == 0) {
elprintf(EL_CD|EL_ANOMALY, "gfx_cd_start with %ux%u", w, h);
_rot_comp.Reg_64 = 0;
// irq?
return;
}
// _rot_comp.XD_Mul = ((_rot_comp.Reg_5C & 0x1f) + 1) * 4; // unused
_rot_comp.Function = (_rot_comp.Reg_58 & 7) | (Pico_mcd->s68k_regs[3] & 0x18); // Jmp_Adr
@ -46,12 +34,10 @@ static void gfx_cd_start(void)
_rot_comp.YD = (_rot_comp.Reg_60 >> 3) & 7;
_rot_comp.Vector_Adr = (_rot_comp.Reg_66 & 0xfffe) << 2;
upd_len = (_rot_comp.Reg_62 >> 3) & 0x3f;
upd_len = Table_Rot_Time[upd_len];
_rot_comp.Draw_Speed = _rot_comp.Float_Part = upd_len;
_rot_comp.Reg_58 |= 0x8000; // Stamp_Size, we start a new GFX operation
pcd_event_schedule_s68k(PCD_EVENT_GFX, 5 * w * h);
switch (_rot_comp.Reg_58 & 6) // Scr_16?
{
case 0: // ?
@ -68,25 +54,46 @@ static void gfx_cd_start(void)
break;
}
dprintf("gfx_cd_start, stamp_map_addr=%06x", _rot_comp.Stamp_Map_Adr);
gfx_cd_update();
}
static void gfx_completed(void)
{
_rot_comp.Reg_58 &= 0x7fff; // Stamp_Size
_rot_comp.Reg_64 = 0;
if (Pico_mcd->s68k_regs[0x33] & (1<<1))
if (PicoOpt & POPT_EN_MCD_GFX)
{
elprintf(EL_INTS, "gfx_cd irq 1");
SekInterruptS68k(1);
unsigned int func = _rot_comp.Function;
unsigned short *stamp_base = (unsigned short *) (Pico_mcd->word_ram2M + _rot_comp.Stamp_Map_Adr);
while (h--)
gfx_do_line(func, stamp_base, w);
}
}
static void gfx_do(unsigned int func, unsigned short *stamp_base, unsigned int H_Dot)
PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a)
{
unsigned int d = 0;
switch (a) {
case 0x58: d = _rot_comp.Reg_58; break;
case 0x5A: d = _rot_comp.Reg_5A; break;
case 0x5C: d = _rot_comp.Reg_5C; break;
case 0x5E: d = _rot_comp.Reg_5E; break;
case 0x60: d = _rot_comp.Reg_60; break;
case 0x62: d = _rot_comp.Reg_62; break;
case 0x64:
d = _rot_comp.Reg_64;
if (_rot_comp.Reg_64 > 1)
// fudge..
_rot_comp.Reg_64--;
break;
case 0x66: break;
default: dprintf("gfx_cd_read FIXME: unexpected address: %02x", a); break;
}
dprintf("gfx_cd_read(%02x) = %04x", a, d);
return d;
}
static void gfx_do_line(unsigned int func, unsigned short *stamp_base,
unsigned int H_Dot)
{
unsigned int eax, ebx, ecx, edx, esi, edi, pixel;
unsigned int XD, Buffer_Adr;
@ -291,88 +298,13 @@ Next_Pixel:
}
PICO_INTERNAL void gfx_cd_update(void)
{
int V_Dot = _rot_comp.Reg_64 & 0xff;
int jobs;
dprintf("gfx_cd_update, Reg_64 = %04x", _rot_comp.Reg_64);
if (!V_Dot)
{
gfx_completed();
return;
}
jobs = _rot_comp.Float_Part >> 16;
if (!jobs)
{
_rot_comp.Float_Part += _rot_comp.Draw_Speed;
return;
}
_rot_comp.Float_Part &= 0xffff;
_rot_comp.Float_Part += _rot_comp.Draw_Speed;
if (PicoOpt & POPT_EN_MCD_GFX)
{
unsigned int func = _rot_comp.Function;
unsigned int H_Dot = _rot_comp.Reg_62 & 0x1ff;
unsigned short *stamp_base = (unsigned short *) (Pico_mcd->word_ram2M + _rot_comp.Stamp_Map_Adr);
while (jobs--)
{
gfx_do(func, stamp_base, H_Dot); // jmp [Jmp_Adr]:
V_Dot--; // dec byte [V_Dot]
if (V_Dot == 0)
{
// GFX_Completed:
gfx_completed();
return;
}
}
}
else
{
if (jobs >= V_Dot)
{
gfx_completed();
return;
}
V_Dot -= jobs;
}
_rot_comp.Reg_64 = V_Dot;
}
PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a)
{
unsigned int d = 0;
switch (a) {
case 0x58: d = _rot_comp.Reg_58; break;
case 0x5A: d = _rot_comp.Reg_5A; break;
case 0x5C: d = _rot_comp.Reg_5C; break;
case 0x5E: d = _rot_comp.Reg_5E; break;
case 0x60: d = _rot_comp.Reg_60; break;
case 0x62: d = _rot_comp.Reg_62; break;
case 0x64: d = _rot_comp.Reg_64; break;
case 0x66: break;
default: dprintf("gfx_cd_read FIXME: unexpected address: %02x", a); break;
}
dprintf("gfx_cd_read(%02x) = %04x", a, d);
return d;
}
PICO_INTERNAL_ASM void gfx_cd_write16(unsigned int a, unsigned int d)
{
dprintf("gfx_cd_write16(%x, %04x)", a, d);
if (_rot_comp.Reg_58 & 0x8000)
elprintf(EL_CD|EL_ANOMALY, "cd: busy gfx reg write %02x %04x", a, d);
switch (a) {
case 0x58: // .Reg_Stamp_Size
_rot_comp.Reg_58 = d & 7;

2
pico/cd/gfx_cd.h
View file

@ -24,8 +24,6 @@ typedef struct
} Rot_Comp;
PICO_INTERNAL void gfx_cd_update(void);
PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a);
PICO_INTERNAL_ASM void gfx_cd_write16(unsigned int a, unsigned int d);

40
pico/cd/memory.c
View file

@ -99,8 +99,11 @@ static u32 m68k_reg_read16(u32 a)
case 0xA:
elprintf(EL_UIO, "m68k FIXME: reserved read");
goto end;
case 0xC:
d = Pico_mcd->m.timer_stopwatch >> 16;
case 0xC: // 384 cycle stopwatch timer
// ugh..
d = pcd_cycles_m68k_to_s68k(SekCyclesDone());
d = (d - Pico_mcd->m.stopwatch_base_c) / 384;
d &= 0x0fff;
elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
goto end;
}
@ -273,7 +276,9 @@ u32 s68k_reg_read16(u32 a)
case 8:
return Read_CDC_Host(1); // Gens returns 0 here on byte reads
case 0xC:
d = Pico_mcd->m.timer_stopwatch >> 16;
d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;
d /= 384;
d &= 0x0fff;
elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
return d;
case 0x30:
@ -363,21 +368,29 @@ void s68k_reg_write8(u32 a, u32 d)
elprintf(EL_CDREGS, "s68k set CDC dma addr");
break;
case 0xc:
case 0xd:
elprintf(EL_CDREGS, "s68k set stopwatch timer");
Pico_mcd->m.timer_stopwatch = 0;
case 0xd: // 384 cycle stopwatch timer
elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);
// does this also reset internal 384 cycle counter?
Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
return;
case 0xe:
Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
return;
case 0x31:
elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);
Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
case 0x31: // 384 cycle int3 timer
d &= 0xff;
elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
Pico_mcd->s68k_regs[a] = (u8) d;
if (d) // d or d+1??
pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);
else
pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);
break;
case 0x33: // IRQ mask
elprintf(EL_CDREGS, "s68k irq mask: %02x", d);
if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
CDD_Export_Status();
elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);
d &= 0x7e;
if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {
if (Pico_mcd->s68k_regs[0x37] & 4)
CDD_Export_Status();
}
break;
case 0x34: // fader
@ -978,7 +991,7 @@ static void remap_word_ram(int r3)
#endif
}
void PicoMemStateLoaded(void)
void pcd_state_loaded_mem(void)
{
int r3 = Pico_mcd->s68k_regs[3];
@ -1147,3 +1160,4 @@ static void m68k_mem_setup_cd(void)
}
#endif // EMU_M68K
// vim:shiftwidth=2:ts=2:expandtab

302
pico/cd/pico.c
View file

@ -1,6 +1,6 @@
/*
* PicoDrive
* (C) notaz, 2007
* (C) notaz, 2007,2013
*
* This work is licensed under the terms of MAME license.
* See COPYING file in the top-level directory.
@ -10,7 +10,8 @@
#include "../sound/ym2612.h"
extern unsigned char formatted_bram[4*0x10];
extern unsigned int s68k_poll_adclk;
static unsigned int m68k_cycle_mult;
void (*PicoMCDopenTray)(void) = NULL;
void (*PicoMCDcloseTray)(void) = NULL;
@ -65,149 +66,191 @@ PICO_INTERNAL int PicoResetMCD(void)
}
SRam.start = SRam.end = 0; // unused
pcd_event_schedule(0, PCD_EVENT_CDC, 12500000/75);
return 0;
}
static __inline void SekRunS68k(int cyc)
static __inline void SekRunS68k(unsigned int to)
{
int cyc_do;
SekCycleAimS68k+=cyc;
if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
#if defined(EMU_CORE_DEBUG)
SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
#elif defined(EMU_C68K)
PicoCpuCS68k.cycles=cyc_do;
SekCycleAimS68k = to;
if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
return;
SekCycleCntS68k += cyc_do;
#if defined(EMU_C68K)
PicoCpuCS68k.cycles = cyc_do;
CycloneRun(&PicoCpuCS68k);
SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
SekCycleCntS68k -= PicoCpuCS68k.cycles;
#elif defined(EMU_M68K)
m68k_set_context(&PicoCpuMS68k);
SekCycleCntS68k+=m68k_execute(cyc_do);
SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
m68k_set_context(&PicoCpuMM68k);
#elif defined(EMU_F68K)
g_m68kcontext=&PicoCpuFS68k;
SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0);
g_m68kcontext=&PicoCpuFM68k;
g_m68kcontext = &PicoCpuFS68k;
SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do;
g_m68kcontext = &PicoCpuFM68k;
#endif
}
#define PS_STEP_M68K ((488<<16)/20) // ~24
//#define PS_STEP_S68K 13
#if defined(_ASM_CD_PICO_C)
extern void SekRunPS(int cyc_m68k, int cyc_s68k);
#elif defined(EMU_F68K)
static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
{
SekCycleAim+=cyc_m68k;
SekCycleAimS68k+=cyc_s68k;
fm68k_emulate(0, 1, 0);
return (long long)c * m68k_cycle_mult >> 16;
}
#else
static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
/* events */
static void pcd_cdc_event(unsigned int now)
{
int cycn, cycn_s68k, cyc_do;
SekCycleAim+=cyc_m68k;
SekCycleAimS68k+=cyc_s68k;
// 75Hz CDC update
Check_CD_Command();
pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
}
// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
static void pcd_int3_timer_event(unsigned int now)
{
if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
SekInterruptS68k(3);
}
/* loop 488 downto 0 in steps of PS_STEP */
for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
{
cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
#if defined(EMU_C68K)
PicoCpuCM68k.cycles = cyc_do;
CycloneRun(&PicoCpuCM68k);
SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
#elif defined(EMU_M68K)
m68k_set_context(&PicoCpuMM68k);
SekCycleCnt += m68k_execute(cyc_do);
#elif defined(EMU_F68K)
g_m68kcontext = &PicoCpuFM68k;
SekCycleCnt += fm68k_emulate(cyc_do, 0, 0);
#endif
}
if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
#if defined(EMU_C68K)
PicoCpuCS68k.cycles = cyc_do;
CycloneRun(&PicoCpuCS68k);
SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
#elif defined(EMU_M68K)
m68k_set_context(&PicoCpuMS68k);
SekCycleCntS68k += m68k_execute(cyc_do);
#elif defined(EMU_F68K)
g_m68kcontext = &PicoCpuFS68k;
SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0);
#endif
if (Pico_mcd->s68k_regs[0x31] != 0)
pcd_event_schedule(now, PCD_EVENT_TIMER3,
Pico_mcd->s68k_regs[0x31] * 384);
}
static void pcd_gfx_event(unsigned int now)
{
// update gfx chip
if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
Pico_mcd->rot_comp.Reg_64 = 0;
if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) {
elprintf(EL_INTS |EL_CD, "s68k: gfx_cd irq 1");
SekInterruptS68k(1);
}
}
}
#endif
static __inline void check_cd_dma(void)
static void pcd_dma_event(unsigned int now)
{
int ddx;
if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
ddx = Pico_mcd->s68k_regs[4] & 7;
if (ddx < 2) return; // invalid
if (ddx < 4) {
Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
return;
}
if (ddx == 6) return; // invalid
Update_CDC_TRansfer(ddx); // now go and do the actual transfer
int ddx = Pico_mcd->s68k_regs[4] & 7;
Update_CDC_TRansfer(ddx);
}
static __inline void update_chips(void)
typedef void (event_cb)(unsigned int now);
/* times are in s68k (12.5MHz) cycles */
unsigned int pcd_event_times[PCD_EVENT_COUNT];
static unsigned int event_time_next;
static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
[PCD_EVENT_CDC] = pcd_cdc_event,
[PCD_EVENT_TIMER3] = pcd_int3_timer_event,
[PCD_EVENT_GFX] = pcd_gfx_event,
[PCD_EVENT_DMA] = pcd_dma_event,
};
void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
{
int counter_timer, int3_set;
int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
unsigned int when;
// 75Hz CDC update
if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
Pico_mcd->m.counter75hz -= counter75hz_lim;
Check_CD_Command();
}
when = now + after;
if (when == 0) {
// event cancelled
pcd_event_times[event] = 0;
return;
}
// update timers
counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
Pico_mcd->m.timer_stopwatch += counter_timer;
if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
Pico_mcd->m.timer_int3 -= counter_timer;
if (Pico_mcd->m.timer_int3 < 0) {
if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
elprintf(EL_INTS, "s68k: timer irq 3");
SekInterruptS68k(3);
Pico_mcd->m.timer_int3 += int3_set << 16;
}
// is this really what happens if irq3 is masked out?
Pico_mcd->m.timer_int3 &= 0xffffff;
}
}
when |= 1;
// update gfx chip
if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
gfx_cd_update();
elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
pcd_event_times[event] = when;
if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
event_time_next = when;
}
void pcd_event_schedule_s68k(enum pcd_event event, int after)
{
if (SekCyclesLeftS68k > after)
SekEndRunS68k(after);
pcd_event_schedule(SekCyclesDoneS68k(), event, after);
}
static void pcd_run_events(unsigned int until)
{
int oldest, oldest_diff, time;
int i, diff;
while (1) {
oldest = -1, oldest_diff = 0x7fffffff;
for (i = 0; i < PCD_EVENT_COUNT; i++) {
if (pcd_event_times[i]) {
diff = pcd_event_times[i] - until;
if (diff < oldest_diff) {
oldest_diff = diff;
oldest = i;
}
}
}
if (oldest_diff <= 0) {
time = pcd_event_times[oldest];
pcd_event_times[oldest] = 0;
elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
pcd_event_cbs[oldest](time);
}
else if (oldest_diff < 0x7fffffff) {
event_time_next = pcd_event_times[oldest];
break;
}
else {
event_time_next = 0;
break;
}
}
if (oldest != -1)
elprintf(EL_CD, "cd: next event #%d at %u",
oldest, event_time_next);
}
static void pcd_sync_s68k(unsigned int m68k_target)
{
#define now SekCycleCntS68k
unsigned int s68k_target =
(unsigned long long)m68k_target * m68k_cycle_mult >> 16;
unsigned int target;
elprintf(EL_CD, "s68k sync to %u/%u", m68k_target, s68k_target);
if ((Pico_mcd->m.busreq & 3) != 1) { /* busreq/reset */
SekCycleCntS68k = SekCycleAimS68k = s68k_target;
pcd_run_events(m68k_target);
return;
}
while (CYCLES_GT(s68k_target, now)) {
if (event_time_next && CYCLES_GE(now, event_time_next))
pcd_run_events(now);
target = s68k_target;
if (event_time_next && CYCLES_GT(target, event_time_next))
target = event_time_next;
SekRunS68k(target);
}
#undef now
}
#define PICO_CD
#define CPUS_RUN(m68k_cycles,s68k_cycles) \
{ \
if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \
SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \
} else { \
SekRunM68k(m68k_cycles); \
if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \
SekRunS68k(s68k_cycles); \
} \
}
#define CPUS_RUN(m68k_cycles) \
SekRunM68k(m68k_cycles)
#include "../pico_cmn.c"
@ -216,7 +259,44 @@ PICO_INTERNAL void PicoFrameMCD(void)
if (!(PicoOpt&POPT_ALT_RENDERER))
PicoFrameStart();
// ~1.63 for NTSC, ~1.645 for PAL
if (Pico.m.pal)
m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
else
m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
PicoFrameHints();
}
void pcd_state_loaded(void)
{
unsigned int cycles;
int diff;
pcd_state_loaded_mem();
// old savestates..
cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
diff = cycles - SekCycleAimS68k;
if (diff < -1000 || diff > 1000) {
SekCycleCntS68k = SekCycleAimS68k = cycles;
}
if (pcd_event_times[PCD_EVENT_CDC] == 0) {
pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
if (Pico_mcd->s68k_regs[0x31])
pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
Pico_mcd->s68k_regs[0x31] * 384);
if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
Pico_mcd->rot_comp.Reg_64 = 0;
if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1)
SekInterruptS68k(1);
}
if (Pico_mcd->scd.Status_CDC & 0x08)
Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7);
}
}
// vim:shiftwidth=2:ts=2:expandtab

4
pico/cd/sek.c
View file

@ -9,8 +9,8 @@
#include "../pico_int.h"
int SekCycleCntS68k=0; // cycles done in this frame
int SekCycleAimS68k=0; // cycle aim
unsigned int SekCycleCntS68k;
unsigned int SekCycleAimS68k;
/* context */