32x and sms savestates. Core-independent z80 state. SS bugfixing/refactoring.

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@868 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz 2010-01-27 16:30:41 +00:00
parent a736af3ecf
commit b4db550e41
19 changed files with 1116 additions and 848 deletions

View file

@ -394,8 +394,8 @@ void Cz80_Set_Reg(cz80_struc *CPU, INT32 regnum, UINT32 val)
case CZ80_R: zR = val; break;
case CZ80_I: zI = val; break;
case CZ80_IM: zIM = val; break;
case CZ80_IFF1: zIFF1 = val; break;
case CZ80_IFF2: zIFF2 = val; break;
case CZ80_IFF1: zIFF1 = val ? (1 << 2) : 0; break;
case CZ80_IFF2: zIFF2 = val ? (1 << 2) : 0; break;
case CZ80_HALT: CPU->HaltState = val; break;
case CZ80_IRQ: CPU->IRQState = val; break;
default: break;