mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-06 15:48:05 -04:00
optimizations, fixes, hacks, psp, ...
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@295 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
8022f53da6
commit
b542be4686
37 changed files with 928 additions and 548 deletions
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@ -1,7 +1,7 @@
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// This is part of Pico Library
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// (c) Copyright 2004 Dave, All rights reserved.
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// (c) Copyright 2006 notaz, All rights reserved.
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// (c) Copyright 2006,2007 notaz, All rights reserved.
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// Free for non-commercial use.
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// For commercial use, separate licencing terms must be obtained.
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@ -11,14 +11,6 @@
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#include "ym2612.h"
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#include "sn76496.h"
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#if defined(_USE_MZ80)
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#include "../../cpu/mz80/mz80.h"
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#elif defined(_USE_DRZ80)
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#include "../../cpu/DrZ80/drz80.h"
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#elif defined(_USE_CZ80)
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#include "../../cpu/cz80/cz80.h"
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#endif
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#include "../PicoInt.h"
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#include "../cd/pcm.h"
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#include "mix.h"
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@ -36,11 +28,6 @@ int PsndLen_exc_add=0; // this is for non-integer sample counts per line, eg. 22
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int PsndLen_exc_cnt=0;
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short *PsndOut=NULL; // PCM data buffer
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// from ym2612.c
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extern int *ym2612_dacen;
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extern INT32 *ym2612_dacout;
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void YM2612TimerHandler(int c,int cnt);
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// sn76496
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extern int *sn76496_regs;
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@ -306,9 +293,16 @@ static struct z80PortWrite mz80_io_write[]={
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{(UINT16) -1,(UINT16) -1,NULL}
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};
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int mz80_run(int cycles)
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{
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int ticks_pre = mz80GetElapsedTicks(0);
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mz80exec(cycles);
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return mz80GetElapsedTicks(0) - ticks_pre;
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}
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#elif defined(_USE_DRZ80)
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static struct DrZ80 drZ80;
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struct DrZ80 drZ80;
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static unsigned int DrZ80_rebasePC(unsigned short a)
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{
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@ -379,7 +373,7 @@ PICO_INTERNAL void z80_init(void)
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Cz80_Init(&CZ80);
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Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM
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Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram - 0x2000); // mirror
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Cz80_Set_ReadB(&CZ80, (UINT8 (*)(UINT32 address))z80_read);
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Cz80_Set_ReadB(&CZ80, (UINT8 (*)(UINT32 address))z80_read); // unused (hacked in)
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Cz80_Set_WriteB(&CZ80, z80_write);
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Cz80_Set_INPort(&CZ80, z80_in);
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Cz80_Set_OUTPort(&CZ80, z80_out);
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@ -405,40 +399,6 @@ PICO_INTERNAL void z80_reset(void)
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Pico.m.z80_fakeval = 0; // for faking when Z80 is disabled
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}
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PICO_INTERNAL void z80_resetCycles(void)
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{
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#if defined(_USE_MZ80)
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mz80GetElapsedTicks(1);
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#endif
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}
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PICO_INTERNAL void z80_int(void)
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{
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#if defined(_USE_MZ80)
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mz80int(0);
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#elif defined(_USE_DRZ80)
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drZ80.z80irqvector = 0xFF; // default IRQ vector RST opcode
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drZ80.Z80_IRQ = 1;
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#elif defined(_USE_CZ80)
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Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE);
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#endif
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}
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// returns number of cycles actually executed
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PICO_INTERNAL int z80_run(int cycles)
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{
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#if defined(_USE_MZ80)
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int ticks_pre = mz80GetElapsedTicks(0);
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mz80exec(cycles);
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return mz80GetElapsedTicks(0) - ticks_pre;
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#elif defined(_USE_DRZ80)
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return cycles - DrZ80Run(&drZ80, cycles);
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#elif defined(_USE_CZ80)
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return Cz80_Exec(&CZ80, cycles);
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#else
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return cycles;
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#endif
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}
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PICO_INTERNAL void z80_pack(unsigned char *data)
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{
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@ -553,20 +553,21 @@ INLINE void set_timers( int v )
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}
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INLINE void FM_KEYON(FM_CH *CH , int s )
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INLINE void FM_KEYON(int c , int s )
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{
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FM_SLOT *SLOT = &CH->SLOT[s];
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FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];
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if( !SLOT->key )
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{
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SLOT->key = 1;
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SLOT->phase = 0; /* restart Phase Generator */
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SLOT->state = EG_ATT; /* phase -> Attack */
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ym2612.slot_mask |= (1<<s) << (c*4);
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}
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}
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INLINE void FM_KEYOFF(FM_CH *CH , int s )
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INLINE void FM_KEYOFF(int c , int s )
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{
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FM_SLOT *SLOT = &CH->SLOT[s];
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FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];
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if( SLOT->key )
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{
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SLOT->key = 0;
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@ -844,6 +845,9 @@ typedef struct
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UINT32 pack; // 4c: stereo, lastchan, disabled, lfo_enabled | pan_r, pan_l, ams[2] | AMmasks[4] | FB[4] | lfo_ampm[16]
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UINT32 algo; /* 50: algo[3], was_update */
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INT32 op1_out;
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#ifdef _MIPS_ARCH_ALLEGREX
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UINT32 pad1[3+8];
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#endif
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} chan_rend_context;
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@ -905,16 +909,6 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length)
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switch( ct->CH->ALGO )
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{
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#if 0
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case 0: smp = upd_algo0(ct); break;
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case 1: smp = upd_algo1(ct); break;
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case 2: smp = upd_algo2(ct); break;
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case 3: smp = upd_algo3(ct); break;
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case 4: smp = upd_algo4(ct); break;
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case 5: smp = upd_algo5(ct); break;
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case 6: smp = upd_algo6(ct); break;
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case 7: smp = upd_algo7(ct); break;
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#else
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case 0:
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{
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/* M1---C1---MEM---M2---C2---OUT */
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@ -1064,7 +1058,6 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length)
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}
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break;
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}
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#endif
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}
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/* done calculating channel sample */
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@ -1092,55 +1085,54 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length)
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void chan_render_loop(chan_rend_context *ct, int *buffer, unsigned short length);
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#endif
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static chan_rend_context __attribute__((aligned(64))) crct;
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static int chan_render(int *buffer, int length, FM_CH *CH, UINT32 flags) // flags: stereo, lastchan, disabled, ?, pan_r, pan_l
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static int chan_render(int *buffer, int length, int c, UINT32 flags) // flags: stereo, ?, disabled, ?, pan_r, pan_l
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{
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chan_rend_context ct;
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crct.CH = &ym2612.CH[c];
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crct.mem = crct.CH->mem_value; /* one sample delay memory */
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crct.lfo_cnt = ym2612.OPN.lfo_cnt;
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crct.lfo_inc = ym2612.OPN.lfo_inc;
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ct.CH = CH;
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ct.mem = CH->mem_value; /* one sample delay memory */
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ct.lfo_cnt = ym2612.OPN.lfo_cnt;
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ct.lfo_inc = ym2612.OPN.lfo_inc;
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flags &= 0x35;
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flags &= 0x37;
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if (ct.lfo_inc) {
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if (crct.lfo_inc) {
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flags |= 8;
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flags |= g_lfo_ampm << 16;
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flags |= CH->AMmasks << 8;
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if (CH->ams == 8) // no ams
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flags &= ~0xf00;
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else flags |= (CH->ams&3)<<6;
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flags |= crct.CH->AMmasks << 8;
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if (crct.CH->ams == 8) // no ams
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flags &= ~0xf00;
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else flags |= (crct.CH->ams&3)<<6;
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}
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flags |= (CH->FB&0xf)<<12; /* feedback shift */
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ct.pack = flags;
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flags |= (crct.CH->FB&0xf)<<12; /* feedback shift */
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crct.pack = flags;
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ct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */
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ct.eg_timer = ym2612.OPN.eg_timer;
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ct.eg_timer_add = ym2612.OPN.eg_timer_add;
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crct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */
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crct.eg_timer = ym2612.OPN.eg_timer;
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crct.eg_timer_add = ym2612.OPN.eg_timer_add;
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/* precalculate phase modulation incr */
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ct.phase1 = CH->SLOT[SLOT1].phase;
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ct.phase2 = CH->SLOT[SLOT2].phase;
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ct.phase3 = CH->SLOT[SLOT3].phase;
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ct.phase4 = CH->SLOT[SLOT4].phase;
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crct.phase1 = crct.CH->SLOT[SLOT1].phase;
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crct.phase2 = crct.CH->SLOT[SLOT2].phase;
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crct.phase3 = crct.CH->SLOT[SLOT3].phase;
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crct.phase4 = crct.CH->SLOT[SLOT4].phase;
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/* current output from EG circuit (without AM from LFO) */
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ct.vol_out1 = CH->SLOT[SLOT1].tl + ((UINT32)CH->SLOT[SLOT1].volume);
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ct.vol_out2 = CH->SLOT[SLOT2].tl + ((UINT32)CH->SLOT[SLOT2].volume);
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ct.vol_out3 = CH->SLOT[SLOT3].tl + ((UINT32)CH->SLOT[SLOT3].volume);
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ct.vol_out4 = CH->SLOT[SLOT4].tl + ((UINT32)CH->SLOT[SLOT4].volume);
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crct.vol_out1 = crct.CH->SLOT[SLOT1].tl + ((UINT32)crct.CH->SLOT[SLOT1].volume);
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crct.vol_out2 = crct.CH->SLOT[SLOT2].tl + ((UINT32)crct.CH->SLOT[SLOT2].volume);
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crct.vol_out3 = crct.CH->SLOT[SLOT3].tl + ((UINT32)crct.CH->SLOT[SLOT3].volume);
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crct.vol_out4 = crct.CH->SLOT[SLOT4].tl + ((UINT32)crct.CH->SLOT[SLOT4].volume);
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ct.op1_out = CH->op1_out;
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ct.algo = CH->ALGO & 7;
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crct.op1_out = crct.CH->op1_out;
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crct.algo = crct.CH->ALGO & 7;
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if(CH->pms)
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if(crct.CH->pms)
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{
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/* add support for 3 slot mode */
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UINT32 block_fnum = CH->block_fnum;
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UINT32 block_fnum = crct.CH->block_fnum;
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UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8;
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INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + CH->pms + ((ct.pack>>16)&0xff) ];
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INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + crct.CH->pms + ((crct.pack>>16)&0xff) ];
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if (lfo_fn_table_index_offset) /* LFO phase modulation active */
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{
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@ -1158,45 +1150,51 @@ static int chan_render(int *buffer, int length, FM_CH *CH, UINT32 flags) // flag
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/* phase increment counter */
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fc = fn_table[fn]>>(7-blk);
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ct.incr1 = ((fc+CH->SLOT[SLOT1].DT[kc])*CH->SLOT[SLOT1].mul) >> 1;
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ct.incr2 = ((fc+CH->SLOT[SLOT2].DT[kc])*CH->SLOT[SLOT2].mul) >> 1;
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ct.incr3 = ((fc+CH->SLOT[SLOT3].DT[kc])*CH->SLOT[SLOT3].mul) >> 1;
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ct.incr4 = ((fc+CH->SLOT[SLOT4].DT[kc])*CH->SLOT[SLOT4].mul) >> 1;
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crct.incr1 = ((fc+crct.CH->SLOT[SLOT1].DT[kc])*crct.CH->SLOT[SLOT1].mul) >> 1;
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crct.incr2 = ((fc+crct.CH->SLOT[SLOT2].DT[kc])*crct.CH->SLOT[SLOT2].mul) >> 1;
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crct.incr3 = ((fc+crct.CH->SLOT[SLOT3].DT[kc])*crct.CH->SLOT[SLOT3].mul) >> 1;
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crct.incr4 = ((fc+crct.CH->SLOT[SLOT4].DT[kc])*crct.CH->SLOT[SLOT4].mul) >> 1;
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}
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else /* LFO phase modulation = zero */
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{
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ct.incr1 = CH->SLOT[SLOT1].Incr;
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ct.incr2 = CH->SLOT[SLOT2].Incr;
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ct.incr3 = CH->SLOT[SLOT3].Incr;
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ct.incr4 = CH->SLOT[SLOT4].Incr;
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crct.incr1 = crct.CH->SLOT[SLOT1].Incr;
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crct.incr2 = crct.CH->SLOT[SLOT2].Incr;
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crct.incr3 = crct.CH->SLOT[SLOT3].Incr;
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crct.incr4 = crct.CH->SLOT[SLOT4].Incr;
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}
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}
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else /* no LFO phase modulation */
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{
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ct.incr1 = CH->SLOT[SLOT1].Incr;
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ct.incr2 = CH->SLOT[SLOT2].Incr;
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ct.incr3 = CH->SLOT[SLOT3].Incr;
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ct.incr4 = CH->SLOT[SLOT4].Incr;
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crct.incr1 = crct.CH->SLOT[SLOT1].Incr;
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crct.incr2 = crct.CH->SLOT[SLOT2].Incr;
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crct.incr3 = crct.CH->SLOT[SLOT3].Incr;
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crct.incr4 = crct.CH->SLOT[SLOT4].Incr;
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}
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chan_render_loop(&ct, buffer, length);
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chan_render_loop(&crct, buffer, length);
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// write back persistent stuff:
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if (flags & 2) { /* last channel */
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ym2612.OPN.eg_cnt = ct.eg_cnt;
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ym2612.OPN.eg_timer = ct.eg_timer;
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g_lfo_ampm = ct.pack >> 16;
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ym2612.OPN.lfo_cnt = ct.lfo_cnt;
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crct.CH->op1_out = crct.op1_out;
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crct.CH->mem_value = crct.mem;
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if (crct.CH->SLOT[SLOT1].state | crct.CH->SLOT[SLOT2].state | crct.CH->SLOT[SLOT3].state | crct.CH->SLOT[SLOT4].state)
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{
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crct.CH->SLOT[SLOT1].phase = crct.phase1;
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crct.CH->SLOT[SLOT2].phase = crct.phase2;
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crct.CH->SLOT[SLOT3].phase = crct.phase3;
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crct.CH->SLOT[SLOT4].phase = crct.phase4;
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}
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else
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ym2612.slot_mask &= ~(0xf << (c*4));
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// if this the last call, write back persistent stuff:
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if ((ym2612.slot_mask >> ((c+1)*4)) == 0)
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{
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ym2612.OPN.eg_cnt = crct.eg_cnt;
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ym2612.OPN.eg_timer = crct.eg_timer;
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g_lfo_ampm = crct.pack >> 16;
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ym2612.OPN.lfo_cnt = crct.lfo_cnt;
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}
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CH->op1_out = ct.op1_out;
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CH->SLOT[SLOT1].phase = ct.phase1;
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CH->SLOT[SLOT2].phase = ct.phase2;
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CH->SLOT[SLOT3].phase = ct.phase3;
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CH->SLOT[SLOT4].phase = ct.phase4;
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CH->mem_value = ct.mem;
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return (ct.algo & 8) >> 3; // had output
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return (crct.algo & 8) >> 3; // had output
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}
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/* update phase increment and envelope generator */
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@ -1274,7 +1272,7 @@ static void init_timetables(const UINT8 *dttable)
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}
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static void reset_channels(FM_CH *CH, int num)
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static void reset_channels(FM_CH *CH)
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{
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int c,s;
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@ -1284,7 +1282,7 @@ static void reset_channels(FM_CH *CH, int num)
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ym2612.OPN.ST.TB = 0;
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ym2612.OPN.ST.TBC = 0;
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for( c = 0 ; c < num ; c++ )
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for( c = 0 ; c < 6 ; c++ )
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{
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CH[c].fc = 0;
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for(s = 0 ; s < 4 ; s++ )
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@ -1293,6 +1291,7 @@ static void reset_channels(FM_CH *CH, int num)
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CH[c].SLOT[s].volume = MAX_ATT_INDEX;
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}
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}
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ym2612.slot_mask = 0;
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}
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/* initialize generic tables */
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@ -1401,6 +1400,7 @@ static void init_tables(void)
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/* CSM Key Controll */
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#if 0
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INLINE void CSMKeyControll(FM_CH *CH)
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{
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/* this is wrong, atm */
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@ -1411,6 +1411,7 @@ INLINE void CSMKeyControll(FM_CH *CH)
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FM_KEYON(CH,SLOT3);
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FM_KEYON(CH,SLOT4);
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}
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#endif
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/* prescaler set (and make time tables) */
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@ -1585,6 +1586,7 @@ static int OPNWriteReg(int r, int v)
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int *ym2612_dacen;
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INT32 *ym2612_dacout;
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FM_ST *ym2612_st;
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||||
|
||||
/* Generate samples for YM2612 */
|
||||
|
|
@ -1596,6 +1598,24 @@ int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty)
|
|||
// if !is_buf_empty, it means it has valid samples to mix with, else it may contain trash
|
||||
if (is_buf_empty) memset32(buffer, 0, length<<stereo);
|
||||
|
||||
/*
|
||||
{
|
||||
int c, s;
|
||||
ppp();
|
||||
for (c = 0; c < 6; c++) {
|
||||
int slr = 0, slm;
|
||||
printf("%i: ", c);
|
||||
for (s = 0; s < 4; s++) {
|
||||
if (ym2612.CH[c].SLOT[s].state != EG_OFF) slr = 1;
|
||||
printf(" %i", ym2612.CH[c].SLOT[s].state != EG_OFF);
|
||||
}
|
||||
slm = (ym2612.slot_mask&(0xf<<(c*4))) ? 1 : 0;
|
||||
printf(" | %i", slm);
|
||||
printf(" | %i\n", ym2612.CH[c].SLOT[SLOT1].Incr==-1);
|
||||
if (slr != slm) exit(1);
|
||||
}
|
||||
}
|
||||
*/
|
||||
/* refresh PG and EG */
|
||||
refresh_fc_eg_chan( &ym2612.CH[0] );
|
||||
refresh_fc_eg_chan( &ym2612.CH[1] );
|
||||
|
|
@ -1618,13 +1638,13 @@ int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty)
|
|||
if (stereo) stereo = 1;
|
||||
|
||||
/* mix to 32bit dest */
|
||||
// flags: stereo, lastchan, disabled, ?, pan_r, pan_l
|
||||
active_chs |= chan_render(buffer, length, &ym2612.CH[0], stereo|((pan&0x003)<<4)) << 0;
|
||||
active_chs |= chan_render(buffer, length, &ym2612.CH[1], stereo|((pan&0x00c)<<2)) << 1;
|
||||
active_chs |= chan_render(buffer, length, &ym2612.CH[2], stereo|((pan&0x030) )) << 2;
|
||||
active_chs |= chan_render(buffer, length, &ym2612.CH[3], stereo|((pan&0x0c0)>>2)) << 3;
|
||||
active_chs |= chan_render(buffer, length, &ym2612.CH[4], stereo|((pan&0x300)>>4)) << 4;
|
||||
active_chs |= chan_render(buffer, length, &ym2612.CH[5], stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)|2) << 5;
|
||||
// flags: stereo, ?, disabled, ?, pan_r, pan_l
|
||||
if (ym2612.slot_mask & 0x00000f) active_chs |= chan_render(buffer, length, 0, stereo|((pan&0x003)<<4)) << 0;
|
||||
if (ym2612.slot_mask & 0x0000f0) active_chs |= chan_render(buffer, length, 1, stereo|((pan&0x00c)<<2)) << 1;
|
||||
if (ym2612.slot_mask & 0x000f00) active_chs |= chan_render(buffer, length, 2, stereo|((pan&0x030) )) << 2;
|
||||
if (ym2612.slot_mask & 0x00f000) active_chs |= chan_render(buffer, length, 3, stereo|((pan&0x0c0)>>2)) << 3;
|
||||
if (ym2612.slot_mask & 0x0f0000) active_chs |= chan_render(buffer, length, 4, stereo|((pan&0x300)>>4)) << 4;
|
||||
if (ym2612.slot_mask & 0xf00000) active_chs |= chan_render(buffer, length, 5, stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)) << 5;
|
||||
|
||||
return active_chs; // 1 if buffer updated
|
||||
}
|
||||
|
|
@ -1636,6 +1656,7 @@ void YM2612Init_(int clock, int rate)
|
|||
// notaz
|
||||
ym2612_dacen = &ym2612.dacen;
|
||||
ym2612_dacout = &ym2612.dacout;
|
||||
ym2612_st = &ym2612.OPN.ST;
|
||||
|
||||
memset(&ym2612, 0, sizeof(ym2612));
|
||||
init_tables();
|
||||
|
|
@ -1663,7 +1684,7 @@ void YM2612ResetChip_(void)
|
|||
ym2612.OPN.eg_cnt = 0;
|
||||
ym2612.OPN.ST.status = 0;
|
||||
|
||||
reset_channels( &ym2612.CH[0] , 6 );
|
||||
reset_channels( &ym2612.CH[0] );
|
||||
for(i = 0xb6 ; i >= 0xb4 ; i-- )
|
||||
{
|
||||
OPNWriteReg(i ,0xc0);
|
||||
|
|
@ -1763,16 +1784,14 @@ int YM2612Write_(unsigned int a, unsigned int v)
|
|||
case 0x28: /* key on / off */
|
||||
{
|
||||
UINT8 c;
|
||||
FM_CH *CH;
|
||||
|
||||
c = v & 0x03;
|
||||
if( c == 3 ) { ret=0; break; }
|
||||
if( v&0x04 ) c+=3;
|
||||
CH = &ym2612.CH[c];
|
||||
if(v&0x10) FM_KEYON(CH,SLOT1); else FM_KEYOFF(CH,SLOT1);
|
||||
if(v&0x20) FM_KEYON(CH,SLOT2); else FM_KEYOFF(CH,SLOT2);
|
||||
if(v&0x40) FM_KEYON(CH,SLOT3); else FM_KEYOFF(CH,SLOT3);
|
||||
if(v&0x80) FM_KEYON(CH,SLOT4); else FM_KEYOFF(CH,SLOT4);
|
||||
if(v&0x10) FM_KEYON(c,SLOT1); else FM_KEYOFF(c,SLOT1);
|
||||
if(v&0x20) FM_KEYON(c,SLOT2); else FM_KEYOFF(c,SLOT2);
|
||||
if(v&0x40) FM_KEYON(c,SLOT3); else FM_KEYOFF(c,SLOT3);
|
||||
if(v&0x80) FM_KEYON(c,SLOT4); else FM_KEYOFF(c,SLOT4);
|
||||
break;
|
||||
}
|
||||
case 0x2a: /* DAC data (YM2612) */
|
||||
|
|
@ -1823,12 +1842,12 @@ int YM2612Write_(unsigned int a, unsigned int v)
|
|||
return ret;
|
||||
}
|
||||
|
||||
#if 0
|
||||
UINT8 YM2612Read_(void)
|
||||
{
|
||||
return ym2612.OPN.ST.status;
|
||||
}
|
||||
|
||||
|
||||
int YM2612PicoTick_(int n)
|
||||
{
|
||||
int ret = 0;
|
||||
|
|
@ -1852,14 +1871,14 @@ int YM2612PicoTick_(int n)
|
|||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void YM2612PicoStateLoad_(void)
|
||||
{
|
||||
#ifndef EXTERNAL_YM2612
|
||||
int i, real_A1 = ym2612.addr_A1;
|
||||
|
||||
reset_channels( &ym2612.CH[0], 6 );
|
||||
reset_channels( &ym2612.CH[0] );
|
||||
|
||||
// feed all the registers and update internal state
|
||||
for(i = 0; i < 0x100; i++) {
|
||||
|
|
@ -1874,11 +1893,10 @@ void YM2612PicoStateLoad_(void)
|
|||
|
||||
ym2612.addr_A1 = real_A1;
|
||||
#else
|
||||
reset_channels( &ym2612.CH[0], 6 );
|
||||
reset_channels( &ym2612.CH[0] );
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
#ifndef EXTERNAL_YM2612
|
||||
void *YM2612GetRegs(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -76,15 +76,16 @@ typedef struct
|
|||
{
|
||||
int clock; /* master clock (Hz) */
|
||||
int rate; /* sampling rate (Hz) */
|
||||
double freqbase; /* frequency base */
|
||||
UINT8 address; /* address register */
|
||||
UINT8 status; /* status flag */
|
||||
double freqbase; /* 08 frequency base */
|
||||
UINT8 address; /* 10 address register */
|
||||
UINT8 status; /* 11 status flag */
|
||||
UINT8 mode; /* mode CSM / 3SLOT */
|
||||
UINT8 fn_h; /* freq latch */
|
||||
int TA; /* timer a */
|
||||
int TAC; /* timer a maxval */
|
||||
int TAT; /* timer a ticker */
|
||||
UINT8 TB; /* timer b */
|
||||
UINT8 pad[3];
|
||||
int TBC; /* timer b maxval */
|
||||
int TBT; /* timer b ticker */
|
||||
/* local time tables */
|
||||
|
|
@ -135,9 +136,32 @@ typedef struct
|
|||
INT32 dacout;
|
||||
|
||||
FM_OPN OPN; /* OPN state */
|
||||
|
||||
UINT32 slot_mask; /* active slot mask (performance hack) */
|
||||
} YM2612;
|
||||
#endif
|
||||
|
||||
extern int *ym2612_dacen;
|
||||
extern INT32 *ym2612_dacout;
|
||||
extern FM_ST *ym2612_st;
|
||||
|
||||
|
||||
#define YM2612Read() ym2612_st->status
|
||||
|
||||
#define YM2612PicoTick(n) \
|
||||
{ \
|
||||
/* timer A */ \
|
||||
if(ym2612_st->mode & 0x01 && (ym2612_st->TAT+=64*n) >= ym2612_st->TAC) { \
|
||||
ym2612_st->TAT -= ym2612_st->TAC; \
|
||||
if(ym2612_st->mode & 0x04) ym2612_st->status |= 1; \
|
||||
} \
|
||||
\
|
||||
/* timer B */ \
|
||||
if(ym2612_st->mode & 0x02 && (ym2612_st->TBT+=64*n) >= ym2612_st->TBC) { \
|
||||
ym2612_st->TBT -= ym2612_st->TBC; \
|
||||
if(ym2612_st->mode & 0x08) ym2612_st->status |= 2; \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
void YM2612Init_(int baseclock, int rate);
|
||||
|
|
@ -157,8 +181,6 @@ void *YM2612GetRegs(void);
|
|||
#define YM2612ResetChip YM2612ResetChip_
|
||||
#define YM2612UpdateOne YM2612UpdateOne_
|
||||
#define YM2612Write YM2612Write_
|
||||
#define YM2612Read YM2612Read_
|
||||
#define YM2612PicoTick YM2612PicoTick_
|
||||
#define YM2612PicoStateLoad YM2612PicoStateLoad_
|
||||
#else
|
||||
/* GP2X specific */
|
||||
|
|
@ -177,10 +199,6 @@ extern int PicoOpt;
|
|||
YM2612UpdateOne_(buffer, length, stereo, is_buf_empty);
|
||||
#define YM2612Write(a,v) \
|
||||
(PicoOpt&0x200) ? YM2612Write_940(a, v) : YM2612Write_(a, v)
|
||||
#define YM2612Read() \
|
||||
(PicoOpt&0x200) ? YM2612Read_940() : YM2612Read_()
|
||||
#define YM2612PicoTick(n) \
|
||||
(PicoOpt&0x200) ? YM2612PicoTick_940(n) : YM2612PicoTick_(n)
|
||||
#define YM2612PicoStateLoad() { \
|
||||
if (PicoOpt&0x200) YM2612PicoStateLoad_940(); \
|
||||
else YM2612PicoStateLoad_(); \
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue