mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
core, more superfighter mapper stuff
This commit is contained in:
kub
parent
e370f4d6ad
commit
b7697ca351
5 changed files with 141 additions and 20 deletions
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@ -483,7 +483,7 @@ void carthw_pier_startup(void)
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carthw_chunks = carthw_pier_state;
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}
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/* superfighter mappers */
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/* superfighter mappers, see mame: mame/src/devices/bus/megadrive/rom.cpp */
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unsigned int carthw_sf00x_reg;
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static carthw_state_chunk carthw_sf00x_state[] =
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@ -492,37 +492,39 @@ static carthw_state_chunk carthw_sf00x_state[] =
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{ 0, 0, NULL }
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};
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// hack to remap SRAM from 0x400000 to 0x3c0000 (there are 2 versions of sf001)
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u32 carthw_sf001_read8_sram(u32 a)
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// SF-001
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// additionally map SRAM at 0x3c0000 for the newer version of sf001
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static u32 carthw_sf001_read8_sram(u32 a)
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{
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return m68k_read8((a & 0xffff) + 0x400000);
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return m68k_read8((a & 0xffff) + Pico.sv.start);
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}
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u32 carthw_sf001_read16_sram(u32 a)
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static u32 carthw_sf001_read16_sram(u32 a)
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{
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return m68k_read16((a & 0xffff) + 0x400000);
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return m68k_read16((a & 0xffff) + Pico.sv.start);
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}
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void carthw_sf001_write8_sram(u32 a, u32 d)
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static void carthw_sf001_write8_sram(u32 a, u32 d)
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{
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m68k_write8((a & 0xffff) + 0x400000, d);
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m68k_write8((a & 0xffff) + Pico.sv.start, d);
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}
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void carthw_sf001_write16_sram(u32 a, u32 d)
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static void carthw_sf001_write16_sram(u32 a, u32 d)
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{
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m68k_write16((a & 0xffff) + 0x400000, d);
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m68k_write16((a & 0xffff) + Pico.sv.start, d);
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}
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void carthw_sf001_write8(u32 a, u32 d)
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static void carthw_sf001_write8(u32 a, u32 d)
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{
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if ((a & 0xf00) != 0x0e00)
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if ((a & 0xf00) != 0xe00 || (carthw_sf00x_reg & 0x20)) // wrong addr / locked
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return;
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if (d & 0x80) {
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// bank 0xe at addr 0x000000
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cpu68k_map_set(m68k_read8_map, 0x000000, 0x040000-1, Pico.rom+0x380000, 0);
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cpu68k_map_set(m68k_read16_map, 0x000000, 0x040000-1, Pico.rom+0x380000, 0);
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// SRAM at 0x3c0000; hack to map SRAM from old to new location
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// SRAM also at 0x3c0000 for newer mapper version
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cpu68k_map_set(m68k_read8_map, 0x3c0000, 0x400000-1, carthw_sf001_read8_sram, 1);
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cpu68k_map_set(m68k_read16_map, 0x3c0000, 0x400000-1, carthw_sf001_read16_sram, 1);
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cpu68k_map_set(m68k_write8_map, 0x3c0000, 0x400000-1, carthw_sf001_write8_sram, 1);
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@ -540,25 +542,29 @@ void carthw_sf001_write8(u32 a, u32 d)
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carthw_sf00x_reg = d;
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}
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void carthw_sf001_write16(u32 a, u32 d)
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static void carthw_sf001_write16(u32 a, u32 d)
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{
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carthw_sf001_write8(a + 1, d);
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}
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static void carthw_sf001_mem_setup(void)
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{
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// writing to low cartridge addresses
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cpu68k_map_set(m68k_write8_map, 0x000000, 0x00ffff, carthw_sf001_write8, 1);
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cpu68k_map_set(m68k_write16_map, 0x000000, 0x00ffff, carthw_sf001_write16, 1);
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}
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static void carthw_sf001_reset(void)
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{
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carthw_sf00x_reg = 0;
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carthw_sf001_write8(0x0e01, 0);
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}
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static void carthw_sf001_statef(void)
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{
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carthw_sf001_write8(0x0e01, carthw_sf00x_reg);
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int reg = carthw_sf00x_reg;
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carthw_sf00x_reg = 0;
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carthw_sf001_write8(0x0e01, reg);
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}
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void carthw_sf001_startup(void)
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@ -569,10 +575,11 @@ void carthw_sf001_startup(void)
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carthw_chunks = carthw_sf00x_state;
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}
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// SF-002
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void carthw_sf002_write8(u32 a, u32 d)
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static void carthw_sf002_write8(u32 a, u32 d)
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{
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if ((a & 0xf00) != 0x0e00)
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if ((a & 0xf00) != 0xe00)
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return;
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if (d & 0x80) {
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@ -587,13 +594,14 @@ void carthw_sf002_write8(u32 a, u32 d)
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carthw_sf00x_reg = d;
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}
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void carthw_sf002_write16(u32 a, u32 d)
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static void carthw_sf002_write16(u32 a, u32 d)
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{
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carthw_sf002_write8(a + 1, d);
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}
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static void carthw_sf002_mem_setup(void)
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{
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// writing to low cartridge addresses
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cpu68k_map_set(m68k_write8_map, 0x000000, 0x00ffff, carthw_sf002_write8, 1);
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cpu68k_map_set(m68k_write16_map, 0x000000, 0x00ffff, carthw_sf002_write16, 1);
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}
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@ -616,6 +624,104 @@ void carthw_sf002_startup(void)
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carthw_chunks = carthw_sf00x_state;
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}
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// SF-004
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// reading from cartridge I/O region returns the current bank index
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static u32 carthw_sf004_read8(u32 a)
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{
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if ((a & ~0xff) == 0xa13000)
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return carthw_sf00x_reg & 0xf0; // bank index
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return PicoRead8_io(a);
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}
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static u32 carthw_sf004_read16(u32 a)
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{
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if ((a & ~0xff) == 0xa13000)
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return carthw_sf00x_reg & 0xf0;
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return PicoRead16_io(a);
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}
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// writing to low cartridge adresses changes mappings
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static void carthw_sf004_write8(u32 a, u32 d)
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{
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int idx, i;
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unsigned bs = 0x40000; // bank size
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// there are 3 byte-sized regs, stored together in carthw_sf00x_reg
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if (!(carthw_sf00x_reg & 0x8000))
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return; // locked
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switch (a & 0xf00) {
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case 0xd00:
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carthw_sf00x_reg = (carthw_sf00x_reg & ~0xff0000) | ((d & 0xff) << 16);
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return PicoWrite8_io(0xa130f1, (d & 0x80) ? SRR_MAPPED : 0); // SRAM mapping
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case 0xe00:
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carthw_sf00x_reg = (carthw_sf00x_reg & ~0x00ff00) | ((d & 0xff) << 8);
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break;
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case 0xf00:
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carthw_sf00x_reg = (carthw_sf00x_reg & ~0x0000ff) | ((d & 0xff) << 0);
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break;
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default:
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return; // wrong addr
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}
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// bank mapping changed
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idx = ((carthw_sf00x_reg>>4) & 0x7); // bank index
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if ((carthw_sf00x_reg>>8) & 0x40) {
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// linear bank mapping, starting at idx
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for (i = 0; i < 8; i++, idx = (idx+1) & 0x7) {
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cpu68k_map_set(m68k_read8_map, i*bs, (i+1)*bs-1, Pico.rom + idx*bs, 0);
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cpu68k_map_set(m68k_read16_map, i*bs, (i+1)*bs-1, Pico.rom + idx*bs, 0);
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}
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} else {
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// single bank mapping
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for (i = 0; i < 8; i++) {
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cpu68k_map_set(m68k_read8_map, i*bs, (i+1)*bs-1, Pico.rom + idx*bs, 0);
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cpu68k_map_set(m68k_read16_map, i*bs, (i+1)*bs-1, Pico.rom + idx*bs, 0);
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}
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}
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}
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static void carthw_sf004_write16(u32 a, u32 d)
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{
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carthw_sf004_write8(a + 1, d);
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}
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static void carthw_sf004_mem_setup(void)
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{
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// writing to low cartridge addresses
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cpu68k_map_set(m68k_write8_map, 0x000000, 0x00ffff, carthw_sf004_write8, 1);
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cpu68k_map_set(m68k_write16_map, 0x000000, 0x00ffff, carthw_sf004_write16, 1);
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// reading from the cartridge I/O region
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cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, carthw_sf004_read8, 1);
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cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, carthw_sf004_read16, 1);
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}
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static void carthw_sf004_reset(void)
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{
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carthw_sf00x_reg = -1;
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carthw_sf004_write8(0x0d01, 0);
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carthw_sf004_write8(0x0f01, 0);
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carthw_sf004_write8(0x0e01, 0x80);
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}
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static void carthw_sf004_statef(void)
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{
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int reg = carthw_sf00x_reg;
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carthw_sf00x_reg = -1;
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carthw_sf004_write8(0x0d01, reg >> 16);
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carthw_sf004_write8(0x0f01, reg >> 0);
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carthw_sf004_write8(0x0e01, reg >> 8);
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}
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void carthw_sf004_startup(void)
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{
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PicoCartMemSetup = carthw_sf004_mem_setup;
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PicoResetHook = carthw_sf004_reset;
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PicoLoadStateHook = carthw_sf004_statef;
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carthw_chunks = carthw_sf00x_state;
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}
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/* Simple unlicensed ROM protection emulation */
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static struct {
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u32 addr;
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@ -26,6 +26,9 @@ void carthw_Xin1_startup(void);
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void carthw_realtec_startup(void);
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void carthw_radica_startup(void);
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void carthw_pier_startup(void);
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void carthw_sf001_startup(void);
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void carthw_sf002_startup(void);
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void carthw_sf004_startup(void);
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void carthw_sprot_startup(void);
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void carthw_sprot_new_location(unsigned int a,
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