mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
32x: hook slave sh2, BIOS passes (not much else):
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@787 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
4ea707e1e3
commit
b78efee2b2
5 changed files with 148 additions and 97 deletions
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@ -45,16 +45,16 @@ typedef struct
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UINT32 test_irq;
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int pending_irq;
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void (*irq_callback)(int level);
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void (*irq_callback)(int id, int level);
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int is_slave;
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// XXX: unused, will we ever use?
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int internal_irq_level;
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int is_slave;
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} SH2;
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extern int sh2_icount;
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void sh2_init(SH2 *sh2);
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void sh2_init(SH2 *sh2, int is_slave);
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void sh2_reset(SH2 *sh2);
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int sh2_execute(SH2 *sh2_, int cycles);
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void sh2_irl_irq(SH2 *sh2, int level);
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@ -9,19 +9,19 @@ typedef unsigned short UINT16;
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typedef unsigned char UINT8;
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// pico memhandlers
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unsigned int p32x_sh2_read8(unsigned int a);
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unsigned int p32x_sh2_read16(unsigned int a);
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unsigned int p32x_sh2_read32(unsigned int a);
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void p32x_sh2_write8(unsigned int a, unsigned int d);
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void p32x_sh2_write16(unsigned int a, unsigned int d);
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void p32x_sh2_write32(unsigned int a, unsigned int d);
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unsigned int p32x_sh2_read8(unsigned int a, int id);
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unsigned int p32x_sh2_read16(unsigned int a, int id);
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unsigned int p32x_sh2_read32(unsigned int a, int id);
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void p32x_sh2_write8(unsigned int a, unsigned int d, int id);
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void p32x_sh2_write16(unsigned int a, unsigned int d, int id);
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void p32x_sh2_write32(unsigned int a, unsigned int d, int id);
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#define RB p32x_sh2_read8
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#define RW p32x_sh2_read16
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#define RL p32x_sh2_read32
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#define WB p32x_sh2_write8
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#define WW p32x_sh2_write16
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#define WL p32x_sh2_write32
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#define RB(a) p32x_sh2_read8(a,sh2->is_slave)
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#define RW(a) p32x_sh2_read16(a,sh2->is_slave)
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#define RL(a) p32x_sh2_read32(a,sh2->is_slave)
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#define WB(a,d) p32x_sh2_write8(a,d,sh2->is_slave)
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#define WW(a,d) p32x_sh2_write16(a,d,sh2->is_slave)
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#define WL(a,d) p32x_sh2_write32(a,d,sh2->is_slave)
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// some stuff from sh2comn.h
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#define T 0x00000001
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@ -114,9 +114,10 @@ int sh2_execute(SH2 *sh2_, int cycles)
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return cycles - sh2_icount;
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}
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void sh2_init(SH2 *sh2)
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void sh2_init(SH2 *sh2, int is_slave)
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{
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memset(sh2, 0, sizeof(*sh2));
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sh2->is_slave = is_slave;
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}
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void sh2_irl_irq(SH2 *sh2, int level)
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@ -129,7 +130,7 @@ void sh2_irl_irq(SH2 *sh2, int level)
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/* masked */
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return;
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sh2->irq_callback(level);
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sh2->irq_callback(sh2->is_slave, level);
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vector = 64 + level/2;
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sh2->r[15] -= 4;
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@ -3,10 +3,10 @@
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struct Pico32x Pico32x;
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static void sh2_irq_cb(int level)
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static void sh2_irq_cb(int id, int level)
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{
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// diagnostic for now
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elprintf(EL_32X, "sh2 ack %d @ %08x", level, ash2_pc());
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elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id));
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}
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void p32x_update_irls(void)
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@ -39,11 +39,11 @@ void Pico32xStartup(void)
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PicoAHW |= PAHW_32X;
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PicoMemSetup32x();
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sh2_init(&msh2);
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sh2_init(&msh2, 0);
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msh2.irq_callback = sh2_irq_cb;
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sh2_reset(&msh2);
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sh2_init(&ssh2);
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sh2_init(&ssh2, 1);
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ssh2.irq_callback = sh2_irq_cb;
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sh2_reset(&ssh2);
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@ -127,7 +127,9 @@ static __inline void SekRunM68k(int cyc)
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#define PICO_32X
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#define RUN_SH2S \
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if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
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sh2_execute(&msh2, SH2_LINE_CYCLES);
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sh2_execute(&msh2, SH2_LINE_CYCLES); \
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if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
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sh2_execute(&ssh2, SH2_LINE_CYCLES);
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#include "../pico_cmn.c"
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@ -141,12 +143,4 @@ void PicoFrame32x(void)
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PicoFrameStart();
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PicoFrameHints();
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// hack
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if (Pico.m.frame_count == 83) {
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Pico32xMem->sdram[0x3610 ^ 1] = 'R';
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Pico32xMem->sdram[0x3611 ^ 1] = 'E';
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Pico32xMem->sdram[0x3612 ^ 1] = 'D';
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Pico32xMem->sdram[0x3613 ^ 1] = 'Y';
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}
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}
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@ -13,13 +13,16 @@ static void bank_switch(int b);
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#define POLL_THRESHOLD 6
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struct poll_det {
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int addr, pc, cnt;
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int addr, pc, cnt, flag;
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};
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static struct poll_det m68k_poll, msh2_poll;
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static struct poll_det m68k_poll, sh2_poll[2];
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static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag)
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static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp)
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{
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int ret = 0;
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int ret = 0, flag = pd->flag;
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if (is_vdp)
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flag <<= 3;
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if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) {
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pd->cnt++;
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@ -40,9 +43,11 @@ static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag)
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return ret;
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}
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static int p32x_poll_undetect(struct poll_det *pd, int flag)
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static int p32x_poll_undetect(struct poll_det *pd, int is_vdp)
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{
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int ret = 0;
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int ret = 0, flag = pd->flag;
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if (is_vdp)
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flag <<= 3;
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if (pd->cnt > POLL_THRESHOLD)
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ret = 1;
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pd->addr = pd->cnt = 0;
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@ -52,11 +57,12 @@ static int p32x_poll_undetect(struct poll_det *pd, int flag)
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void p32x_poll_event(int is_vdp)
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{
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p32x_poll_undetect(&msh2_poll, is_vdp ? P32XF_MSH2VPOLL : P32XF_MSH2POLL);
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p32x_poll_undetect(&sh2_poll[0], is_vdp);
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p32x_poll_undetect(&sh2_poll[1], is_vdp);
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}
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// SH2 faking
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#define FAKE_SH2
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//#define FAKE_SH2
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int p32x_csum_faked;
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#ifdef FAKE_SH2
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static const u16 comm_fakevals[] = {
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@ -103,9 +109,9 @@ static void dma_68k2sh2_do(void)
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elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
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for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
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extern void p32x_sh2_write16(u32 a, u32 d);
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extern void p32x_sh2_write16(u32 a, u32 d, int id);
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elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
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p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i]);
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p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0);
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dmac0->dar0 += 2;
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dmac0->tcr0--;
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(*dreqlen)--;
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@ -117,10 +123,11 @@ static void dma_68k2sh2_do(void)
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Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
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if (dmac0->tcr0 == 0)
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dmac0->chcr0 |= 2; // DMA has ended normally
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p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL);
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p32x_poll_undetect(&m68k_poll, 0);
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}
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// ------------------------------------------------------------------
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// 68k regs
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static u32 p32x_reg_read16(u32 a)
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{
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@ -130,7 +137,7 @@ static u32 p32x_reg_read16(u32 a)
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if ((a & 0x30) == 0x20)
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return sh2_comm_faker(a);
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#else
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if (p32x_poll_detect(&m68k_poll, a, SekPc, P32XF_68KPOLL)) {
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if (p32x_poll_detect(&m68k_poll, a, SekPc, 0)) {
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SekEndRun(16);
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}
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#endif
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@ -166,6 +173,10 @@ static void p32x_reg_write8(u32 a, u32 d)
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Pico32x.sh2irqi[0] |= P32XI_CMD;
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p32x_update_irls();
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}
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if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
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Pico32x.sh2irqi[1] |= P32XI_CMD;
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p32x_update_irls();
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}
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break;
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case 5: // bank
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d &= 7;
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@ -218,8 +229,8 @@ static void p32x_reg_write16(u32 a, u32 d)
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// comm port
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else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
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r[a / 2] = d;
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if (p32x_poll_undetect(&msh2_poll, P32XF_MSH2POLL))
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// if SH2 is busy waiting, it needs to see the result ASAP
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if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0))
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// if some SH2 is busy waiting, it needs to see the result ASAP
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SekEndRun(16);
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return;
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}
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@ -242,7 +253,7 @@ static void p32x_vdp_write8(u32 a, u32 d)
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a &= 0x0f;
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// for FEN checks between writes
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msh2_poll.cnt = 0;
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sh2_poll[0].cnt = 0;
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// TODO: verify what's writeable
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switch (a) {
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@ -272,14 +283,15 @@ static void p32x_vdp_write16(u32 a, u32 d)
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// ------------------------------------------------------------------
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// SH2 regs
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static u32 p32x_sh2reg_read16(u32 a)
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static u32 p32x_sh2reg_read16(u32 a, int cpuid)
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{
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u16 *r = Pico32x.regs;
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a &= 0xfe; // ?
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switch (a) {
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case 0x00: // adapter/irq ctl
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return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[0];
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return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[cpuid];
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case 0x10: // DREQ len
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return r[a / 2];
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}
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@ -291,22 +303,23 @@ static u32 p32x_sh2reg_read16(u32 a)
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return 0;
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}
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static void p32x_sh2reg_write8(u32 a, u32 d)
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static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
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{
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a &= 0xff;
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if (a == 1) {
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Pico32x.sh2irq_mask[0] = d & 0x0f;
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Pico32x.sh2irq_mask[cpuid] = d & 0x0f;
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p32x_update_irls();
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}
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}
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static void p32x_sh2reg_write16(u32 a, u32 d)
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static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
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{
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a &= 0xfe;
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if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
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Pico32x.regs[a / 2] = d;
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p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL);
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p32x_poll_undetect(&m68k_poll, 0);
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p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
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return;
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}
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@ -314,38 +327,38 @@ static void p32x_sh2reg_write16(u32 a, u32 d)
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case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
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case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
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case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
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case 0x1a: Pico32x.sh2irqi[0] &= ~P32XI_CMD; goto irls;
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case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
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case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
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}
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p32x_sh2reg_write8(a | 1, d);
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p32x_sh2reg_write8(a | 1, d, cpuid);
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return;
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irls:
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p32x_update_irls();
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}
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static u32 sh2_peripheral_read(u32 a)
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static u32 sh2_peripheral_read(u32 a, int id)
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{
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u32 d;
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a &= 0x1fc;
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d = Pico32xMem->sh2_peri_regs[0][a / 4];
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elprintf(EL_32X, "sh2 peri r32 [%08x] %08x @%06x", a, d, ash2_pc());
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elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
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return d;
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}
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static void sh2_peripheral_write(u32 a, u32 d)
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static void sh2_peripheral_write(u32 a, u32 d, int id)
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{
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unsigned int *r = Pico32xMem->sh2_peri_regs[0];
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elprintf(EL_32X, "sh2 peri w32 [%08x] %08x @%06x", a, d, ash2_pc());
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elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
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a &= 0x1fc;
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r[a / 4] = d;
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if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
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elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
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dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, ash2_pc());
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dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
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dmac0->tcr0 &= 0xffffff;
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// DREQ is only sent after first 4 words are written.
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// we do multiple of 4 words to avoid messing up alignment
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@ -546,13 +559,15 @@ static void bank_switch(int b)
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// SH2
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// -----------------------------------------------------------------
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u32 p32x_sh2_read8(u32 a)
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u32 p32x_sh2_read8(u32 a, int id)
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{
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int pd = 0;
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int pd_vdp = 0;
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u32 d = 0;
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if (a < sizeof(Pico32xMem->sh2_rom_m))
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if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
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return Pico32xMem->sh2_rom_m[a ^ 1];
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if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
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return Pico32xMem->sh2_rom_s[a ^ 1];
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if ((a & 0x0ffc0000) == 0x06000000)
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return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
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@ -561,15 +576,17 @@ u32 p32x_sh2_read8(u32 a)
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if ((a & 0x003fffff) < Pico.romsize)
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return Pico.rom[(a & 0x3fffff) ^ 1];
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if ((a & ~0xfff) == 0xc0000000)
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return Pico32xMem->data_array[id][(a & 0xfff) ^ 1];
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if ((a & 0x0fffff00) == 0x4000) {
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d = p32x_sh2reg_read16(a);
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pd = P32XF_MSH2POLL;
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d = p32x_sh2reg_read16(a, id);
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goto out_pd;
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}
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if ((a & 0x0fffff00) == 0x4100) {
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d = p32x_vdp_read16(a);
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pd = P32XF_MSH2VPOLL;
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pd_vdp = 1;
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goto out_pd;
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}
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@ -578,11 +595,12 @@ u32 p32x_sh2_read8(u32 a)
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|||
goto out_16to8;
|
||||
}
|
||||
|
||||
elprintf(EL_UIO, "sh2 unmapped r8 [%08x] %02x @%06x", a, d, ash2_pc());
|
||||
elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
|
||||
id ? 's' : 'm', a, d, sh2_pc(id));
|
||||
return d;
|
||||
|
||||
out_pd:
|
||||
if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd))
|
||||
if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), pd_vdp))
|
||||
ash2_end_run(8);
|
||||
|
||||
out_16to8:
|
||||
|
|
@ -591,17 +609,20 @@ out_16to8:
|
|||
else
|
||||
d >>= 8;
|
||||
|
||||
elprintf(EL_32X, "sh2 r8 [%08x] %02x @%06x", a, d, ash2_pc());
|
||||
elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
|
||||
id ? 's' : 'm', a, d, sh2_pc(id));
|
||||
return d;
|
||||
}
|
||||
|
||||
u32 p32x_sh2_read16(u32 a)
|
||||
u32 p32x_sh2_read16(u32 a, int id)
|
||||
{
|
||||
int pd = 0;
|
||||
int pd_vdp = 0;
|
||||
u32 d = 0;
|
||||
|
||||
if (a < sizeof(Pico32xMem->sh2_rom_m))
|
||||
if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
|
||||
return *(u16 *)(Pico32xMem->sh2_rom_m + a);
|
||||
if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
|
||||
return *(u16 *)(Pico32xMem->sh2_rom_s + a);
|
||||
|
||||
if ((a & 0x0ffc0000) == 0x06000000)
|
||||
return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
|
||||
|
|
@ -610,15 +631,17 @@ u32 p32x_sh2_read16(u32 a)
|
|||
if ((a & 0x003fffff) < Pico.romsize)
|
||||
return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
|
||||
|
||||
if ((a & ~0xfff) == 0xc0000000)
|
||||
return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2];
|
||||
|
||||
if ((a & 0x0fffff00) == 0x4000) {
|
||||
d = p32x_sh2reg_read16(a);
|
||||
pd = P32XF_MSH2POLL;
|
||||
d = p32x_sh2reg_read16(a, id);
|
||||
goto out_pd;
|
||||
}
|
||||
|
||||
if ((a & 0x0fffff00) == 0x4100) {
|
||||
d = p32x_vdp_read16(a);
|
||||
pd = P32XF_MSH2VPOLL;
|
||||
pd_vdp = 1;
|
||||
goto out_pd;
|
||||
}
|
||||
|
||||
|
|
@ -627,31 +650,34 @@ u32 p32x_sh2_read16(u32 a)
|
|||
goto out;
|
||||
}
|
||||
|
||||
elprintf(EL_UIO, "sh2 unmapped r16 [%08x] %04x @%06x", a, d, ash2_pc());
|
||||
elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
|
||||
id ? 's' : 'm', a, d, sh2_pc(id));
|
||||
return d;
|
||||
|
||||
out_pd:
|
||||
if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd))
|
||||
if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), pd_vdp))
|
||||
ash2_end_run(8);
|
||||
|
||||
out:
|
||||
elprintf(EL_32X, "sh2 r16 [%08x] %04x @%06x", a, d, ash2_pc());
|
||||
elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
|
||||
id ? 's' : 'm', a, d, sh2_pc(id));
|
||||
return d;
|
||||
}
|
||||
|
||||
u32 p32x_sh2_read32(u32 a)
|
||||
u32 p32x_sh2_read32(u32 a, int id)
|
||||
{
|
||||
if ((a & 0xfffffe00) == 0xfffffe00)
|
||||
return sh2_peripheral_read(a);
|
||||
return sh2_peripheral_read(a, id);
|
||||
|
||||
// elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
|
||||
return (p32x_sh2_read16(a) << 16) | p32x_sh2_read16(a + 2);
|
||||
return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id);
|
||||
}
|
||||
|
||||
void p32x_sh2_write8(u32 a, u32 d)
|
||||
void p32x_sh2_write8(u32 a, u32 d, int id)
|
||||
{
|
||||
if ((a & 0x0ffffc00) == 0x4000)
|
||||
elprintf(EL_32X, "sh2 w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
|
||||
elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
|
||||
id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
|
||||
|
||||
if ((a & 0x0ffc0000) == 0x06000000) {
|
||||
Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
|
||||
|
|
@ -664,29 +690,41 @@ void p32x_sh2_write8(u32 a, u32 d)
|
|||
return;
|
||||
}
|
||||
|
||||
if ((a & ~0xfff) == 0xc0000000) {
|
||||
Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d;
|
||||
return;
|
||||
}
|
||||
|
||||
if ((a & 0x0fffff00) == 0x4100) {
|
||||
p32x_vdp_write8(a, d);
|
||||
return;
|
||||
}
|
||||
|
||||
if ((a & 0x0fffff00) == 0x4000) {
|
||||
p32x_sh2reg_write8(a, d);
|
||||
p32x_sh2reg_write8(a, d, id);
|
||||
return;
|
||||
}
|
||||
|
||||
elprintf(EL_UIO, "sh2 unmapped w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
|
||||
elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
|
||||
id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
|
||||
}
|
||||
|
||||
void p32x_sh2_write16(u32 a, u32 d)
|
||||
void p32x_sh2_write16(u32 a, u32 d, int id)
|
||||
{
|
||||
if ((a & 0x0ffffc00) == 0x4000)
|
||||
elprintf(EL_32X, "sh2 w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
|
||||
elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
|
||||
id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
|
||||
|
||||
if ((a & 0x0ffc0000) == 0x06000000) {
|
||||
((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
|
||||
return;
|
||||
}
|
||||
|
||||
if ((a & ~0xfff) == 0xc0000000) {
|
||||
((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d;
|
||||
return;
|
||||
}
|
||||
|
||||
if ((a & 0x0ffe0000) == 0x04000000) {
|
||||
Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d;
|
||||
return;
|
||||
|
|
@ -704,23 +742,23 @@ void p32x_sh2_write16(u32 a, u32 d)
|
|||
}
|
||||
|
||||
if ((a & 0x0fffff00) == 0x4000) {
|
||||
p32x_sh2reg_write16(a, d);
|
||||
p32x_sh2reg_write16(a, d, id);
|
||||
return;
|
||||
}
|
||||
|
||||
elprintf(EL_UIO, "sh2 unmapped w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
|
||||
elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
|
||||
id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
|
||||
}
|
||||
|
||||
void p32x_sh2_write32(u32 a, u32 d)
|
||||
void p32x_sh2_write32(u32 a, u32 d, int id)
|
||||
{
|
||||
if ((a & 0xfffffe00) == 0xfffffe00) {
|
||||
sh2_peripheral_write(a, d);
|
||||
sh2_peripheral_write(a, d, id);
|
||||
return;
|
||||
}
|
||||
|
||||
// elprintf(EL_UIO, "sh2 w32 [%08x] %08x @%06x", a, d, ash2_pc());
|
||||
p32x_sh2_write16(a, d >> 16);
|
||||
p32x_sh2_write16(a + 2, d);
|
||||
p32x_sh2_write16(a, d >> 16, id);
|
||||
p32x_sh2_write16(a + 2, d, id);
|
||||
}
|
||||
|
||||
#define HWSWAP(x) (((x) << 16) | ((x) >> 16))
|
||||
|
|
@ -766,16 +804,29 @@ void PicoMemSetup32x(void)
|
|||
FILE *f = fopen("32X_M_BIOS.BIN", "rb");
|
||||
int i;
|
||||
if (f == NULL) {
|
||||
printf("missing BIOS\n");
|
||||
printf("missing 32X_M_BIOS.BIN\n");
|
||||
exit(1);
|
||||
}
|
||||
fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
|
||||
fclose(f);
|
||||
f = fopen("32X_S_BIOS.BIN", "rb");
|
||||
if (f == NULL) {
|
||||
printf("missing 32X_S_BIOS.BIN\n");
|
||||
exit(1);
|
||||
}
|
||||
fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f);
|
||||
fclose(f);
|
||||
// byteswap
|
||||
for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
|
||||
int t = Pico32xMem->sh2_rom_m[i];
|
||||
Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
|
||||
Pico32xMem->sh2_rom_m[i + 1] = t;
|
||||
}
|
||||
for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) {
|
||||
int t = Pico32xMem->sh2_rom_s[i];
|
||||
Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1];
|
||||
Pico32xMem->sh2_rom_s[i + 1] = t;
|
||||
}
|
||||
}
|
||||
|
||||
// cartridge area becomes unmapped
|
||||
|
|
@ -802,5 +853,10 @@ void PicoMemSetup32x(void)
|
|||
|
||||
// 32X ROM (banked)
|
||||
bank_switch(0);
|
||||
|
||||
// setup poll detector
|
||||
m68k_poll.flag = P32XF_68KPOLL;
|
||||
sh2_poll[0].flag = P32XF_MSH2POLL;
|
||||
sh2_poll[1].flag = P32XF_SSH2POLL;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -231,7 +231,6 @@ typedef void (z80_write_f)(unsigned int a, unsigned char data);
|
|||
#include "cpu/sh2mame/sh2.h"
|
||||
|
||||
SH2 msh2, ssh2;
|
||||
#define ash2_pc() msh2.ppc
|
||||
#define ash2_end_run(after) sh2_icount = after
|
||||
|
||||
#define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc
|
||||
|
|
@ -455,6 +454,7 @@ struct Pico32xMem
|
|||
unsigned char sdram[0x40000];
|
||||
unsigned short dram[2][0x20000/2]; // AKA fb
|
||||
unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE
|
||||
unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM)
|
||||
unsigned char sh2_rom_m[0x800];
|
||||
unsigned char sh2_rom_s[0x400];
|
||||
unsigned short pal[0x100];
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue