port to 64bit. Some gcc 4.4 warning fixes

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@835 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz 2009-12-06 17:03:58 +00:00
parent 71f68165b6
commit b8a1c09ad1
19 changed files with 102 additions and 80 deletions

View file

@ -1178,7 +1178,7 @@ u32 REGPARM(2) p32x_sh2_read8(u32 a, SH2 *sh2)
sh2_map += SH2MAP_ADDR2OFFS(a);
p = sh2_map->addr;
if (p & (1 << 31))
if (map_flag_set(p))
return ((sh2_read_handler *)(p << 1))(a, sh2->is_slave);
else
return *(u8 *)((p << 1) + ((a & sh2_map->mask) ^ 1));
@ -1191,7 +1191,7 @@ u32 REGPARM(2) p32x_sh2_read16(u32 a, SH2 *sh2)
sh2_map += SH2MAP_ADDR2OFFS(a);
p = sh2_map->addr;
if (p & (1 << 31))
if (map_flag_set(p))
return ((sh2_read_handler *)(p << 1))(a, sh2->is_slave);
else
return *(u16 *)((p << 1) + ((a & sh2_map->mask) & ~1));
@ -1207,7 +1207,7 @@ u32 REGPARM(2) p32x_sh2_read32(u32 a, SH2 *sh2)
offs = SH2MAP_ADDR2OFFS(a);
sh2_map += offs;
p = sh2_map->addr;
if (!(p & (1 << 31))) {
if (!map_flag_set(p)) {
// XXX: maybe 32bit access instead with ror?
u16 *pd = (u16 *)((p << 1) + ((a & sh2_map->mask) & ~1));
return (pd[0] << 16) | pd[1];
@ -1376,7 +1376,7 @@ static void get_bios(void)
}
#define MAP_MEMORY(m) ((uptr)(m) >> 1)
#define MAP_HANDLER(h) (((uptr)(h) >> 1) | (1 << 31))
#define MAP_HANDLER(h) ( ((uptr)(h) >> 1) | ((uptr)1 << (sizeof(uptr) * 8 - 1)) )
static sh2_memmap sh2_read8_map[0x20], sh2_read16_map[0x20];
// for writes we are using handlers only

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@ -1197,7 +1197,10 @@ static int tr_detect_set_pm(unsigned int op, int *pc, int imm)
int reg = is_write ? ((tmpv>>4)&0x7) : (tmpv&0x7);
if (reg > 4) tr_unhandled();
if ((tmpv & 0x0f) != 0 && (tmpv & 0xf0) != 0) tr_unhandled();
known_regs.pmac_read[is_write ? reg + 5 : reg] = pmcv;
if (is_write)
known_regs.pmac_write[reg] = pmcv;
else
known_regs.pmac_read[reg] = pmcv;
known_regb |= is_write ? (1 << (reg+25)) : (1 << (reg+20));
dirty_regb |= is_write ? (1 << (reg+25)) : (1 << (reg+20));
known_regs.emu_status &= ~SSP_PMC_SET;

View file

@ -213,7 +213,7 @@
#define IJind (((op>>6)&4)|(op&3))
#define GET_PC() (PC - (unsigned short *)svp->iram_rom)
#define GET_PPC_OFFS() ((unsigned int)PC - (unsigned int)svp->iram_rom - 2)
#define GET_PPC_OFFS() ((unsigned char *)PC - svp->iram_rom - 2)
#define SET_PC(d) PC = (unsigned short *)svp->iram_rom + d
#define REG_READ(r) (((r) <= 4) ? ssp->gr[r].h : read_handlers[r]())

View file

@ -44,7 +44,7 @@ static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,
for (i = start_addr >> shift; i <= end_addr >> shift; i++) {
map[i] = addr >> 1;
if (is_func)
map[i] |= 1 << (sizeof(addr) * 8 - 1);
map[i] |= (uptr)1 << (sizeof(addr) * 8 - 1);
}
}
@ -1146,8 +1146,8 @@ static void z80_mem_setup(void)
drZ80.z80_out = z80_md_out;
#endif
#ifdef _USE_CZ80
Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM
Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror
Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM
Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror
Cz80_Set_INPort(&CZ80, z80_md_in);
Cz80_Set_OUTPort(&CZ80, z80_md_out);
#endif

View file

@ -20,6 +20,19 @@ extern uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
extern uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
extern uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
// top-level handlers that cores can use
// (or alternatively build them into themselves)
// XXX: unhandled: *16 and *32 might cross the bank boundaries
typedef u32 (cpu68k_read_f)(u32 a);
typedef void (cpu68k_write_f)(u32 a, u32 d);
// z80
#define Z80_MEM_SHIFT 13
extern uptr z80_read_map [0x10000 >> Z80_MEM_SHIFT];
extern uptr z80_write_map[0x10000 >> Z80_MEM_SHIFT];
typedef unsigned char (z80_read_f)(unsigned short a);
typedef void (z80_write_f)(unsigned int a, unsigned char data);
void z80_map_set(uptr *map, int start_addr, int end_addr,
const void *func_or_mh, int is_func);
void cpu68k_map_set(uptr *map, int start_addr, int end_addr,
@ -27,11 +40,7 @@ void cpu68k_map_set(uptr *map, int start_addr, int end_addr,
void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub);
void m68k_map_unmap(int start_addr, int end_addr);
// top-level handlers that cores can use
// (or alternatively build them into themselves)
// XXX: unhandled: *16 and *32 might cross the bank boundaries
typedef u32 (cpu68k_read_f)(u32 a);
typedef void (cpu68k_write_f)(u32 a, u32 d);
#define map_flag_set(x) ((x) & ((uptr)1 << (sizeof(uptr) * 8 - 1)))
#define MAKE_68K_READ8(name, map) \
u32 name(u32 a) \
@ -39,7 +48,7 @@ u32 name(u32 a) \
uptr v; \
a &= 0x00ffffff; \
v = map[a >> M68K_MEM_SHIFT]; \
if (v & 0x80000000) \
if (map_flag_set(v)) \
return ((cpu68k_read_f *)(v << 1))(a); \
else \
return *(u8 *)((v << 1) + (a ^ 1)); \
@ -51,7 +60,7 @@ u32 name(u32 a) \
uptr v; \
a &= 0x00fffffe; \
v = map[a >> M68K_MEM_SHIFT]; \
if (v & 0x80000000) \
if (map_flag_set(v)) \
return ((cpu68k_read_f *)(v << 1))(a); \
else \
return *(u16 *)((v << 1) + a); \
@ -65,7 +74,7 @@ u32 name(u32 a) \
a &= 0x00fffffe; \
v = map[a >> M68K_MEM_SHIFT]; \
vs = v << 1; \
if (v & 0x80000000) { \
if (map_flag_set(v)) { \
d = ((cpu68k_read_f *)vs)(a) << 16; \
d |= ((cpu68k_read_f *)vs)(a + 2); \
} \
@ -82,7 +91,7 @@ void name(u32 a, u8 d) \
uptr v; \
a &= 0x00ffffff; \
v = map[a >> M68K_MEM_SHIFT]; \
if (v & 0x80000000) \
if (map_flag_set(v)) \
((cpu68k_write_f *)(v << 1))(a, d); \
else \
*(u8 *)((v << 1) + (a ^ 1)) = d; \
@ -94,7 +103,7 @@ void name(u32 a, u16 d) \
uptr v; \
a &= 0x00fffffe; \
v = map[a >> M68K_MEM_SHIFT]; \
if (v & 0x80000000) \
if (map_flag_set(v)) \
((cpu68k_write_f *)(v << 1))(a, d); \
else \
*(u16 *)((v << 1) + a) = d; \
@ -107,7 +116,7 @@ void name(u32 a, u32 d) \
a &= 0x00fffffe; \
v = map[a >> M68K_MEM_SHIFT]; \
vs = v << 1; \
if (v & 0x80000000) { \
if (map_flag_set(v)) { \
((cpu68k_write_f *)vs)(a, d >> 16); \
((cpu68k_write_f *)vs)(a + 2, d); \
} \

View file

@ -101,7 +101,7 @@ typedef struct
PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count)
{
if ((((int)dest | (int)src) & 3) == 0)
if ((((long)dest | (long)src) & 3) == 0)
{
if (count >= 32) {
memcpy32((int *)dest, (int *)src, count/2);

View file

@ -61,7 +61,7 @@ void PicoPower(void)
Pico.m.frame_count = 0;
// clear all memory of the emulated machine
memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);
memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);
memset(&Pico.video,0,sizeof(Pico.video));
memset(&Pico.m,0,sizeof(Pico.m));

View file

@ -229,12 +229,6 @@ extern int z80_scanline_cycles; /* cycles done until z80_scanline */
#define cycles_68k_to_z80(x) ((x)*957 >> 11)
#define Z80_MEM_SHIFT 13
extern unsigned long z80_read_map [0x10000 >> Z80_MEM_SHIFT];
extern unsigned long z80_write_map[0x10000 >> Z80_MEM_SHIFT];
typedef unsigned char (z80_read_f)(unsigned short a);
typedef void (z80_write_f)(unsigned int a, unsigned char data);
// ----------------------- SH2 CPU -----------------------
#include "cpu/sh2/sh2.h"

View file

@ -156,14 +156,14 @@ static void write_bank(unsigned short a, unsigned char d)
d &= bank_mask;
z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (UINT32)Pico.rom + (d << 14));
Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (FPTR)Pico.rom + (d << 14));
#endif
break;
case 0x0f:
d &= bank_mask;
z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (UINT32)Pico.rom + (d << 14));
Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (FPTR)Pico.rom + (d << 14));
#endif
break;
}
@ -188,7 +188,7 @@ void PicoPowerMS(void)
{
int s, tmp;
memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);
memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);
memset(&Pico.video,0,sizeof(Pico.video));
memset(&Pico.m,0,sizeof(Pico.m));
Pico.m.pal = 0;
@ -221,9 +221,9 @@ void PicoMemSetupMS(void)
drZ80.z80_out = z80_sms_out;
#endif
#ifdef _USE_CZ80
Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (UINT32)Pico.rom);
Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (UINT32)Pico.zram);
Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (UINT32)Pico.zram);
Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (FPTR)Pico.rom);
Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (FPTR)Pico.zram);
Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (FPTR)Pico.zram);
Cz80_Set_INPort(&CZ80, z80_sms_in);
Cz80_Set_OUTPort(&CZ80, z80_sms_out);
#endif

View file

@ -291,7 +291,7 @@ PICO_INTERNAL void PsndClear(void)
memset32((int *) PsndOut, 0, len); // assume PsndOut to be aligned
else {
short *out = PsndOut;
if ((int)out & 2) { *out++ = 0; len--; }
if ((long)out & 2) { *out++ = 0; len--; }
memset32((int *) out, 0, len/2);
if (len & 1) out[len-1] = 0;
}

View file

@ -1,10 +1,9 @@
#include <stddef.h>
#include "pico_int.h"
#include "sound/sn76496.h"
#include "memory.h"
#define Z80_MEM_SHIFT 13
unsigned long z80_read_map [0x10000 >> Z80_MEM_SHIFT];
unsigned long z80_write_map[0x10000 >> Z80_MEM_SHIFT];
uptr z80_read_map [0x10000 >> Z80_MEM_SHIFT];
uptr z80_write_map[0x10000 >> Z80_MEM_SHIFT];
#ifdef _USE_MZ80
@ -124,7 +123,7 @@ PICO_INTERNAL void z80_pack(unsigned char *data)
#elif defined(_USE_CZ80)
*(int *)data = 0x00007a43; // "Cz"
*(int *)(data+4) = Cz80_Get_Reg(&CZ80, CZ80_PC);
memcpy(data+8, &CZ80, (INT32)&CZ80.BasePC - (INT32)&CZ80);
memcpy(data+8, &CZ80, offsetof(cz80_struc, BasePC));
#endif
}
@ -171,7 +170,7 @@ PICO_INTERNAL void z80_unpack(unsigned char *data)
}
#elif defined(_USE_CZ80)
if (*(int *)data == 0x00007a43) { // "Cz" save?
memcpy(&CZ80, data+8, (INT32)&CZ80.BasePC - (INT32)&CZ80);
memcpy(&CZ80, data+8, offsetof(cz80_struc, BasePC));
Cz80_Set_Reg(&CZ80, CZ80_PC, *(int *)(data+4));
} else {
z80_reset();
@ -192,6 +191,6 @@ PICO_INTERNAL void z80_debug(char *dstr)
#if defined(_USE_DRZ80)
sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);
#elif defined(_USE_CZ80)
sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", CZ80.PC - CZ80.BasePC, CZ80.SP.W);
sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", (unsigned int)(CZ80.PC - CZ80.BasePC), CZ80.SP.W);
#endif
}