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core vdp, fix regression (irq not cleared on disable)

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kub 2024-04-27 09:44:43 +02:00
parent 4985bad0fb
commit b8a38093ed
1 changed files with 8 additions and 4 deletions
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12
pico/videoport.c
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@ -999,18 +999,22 @@ PICO_INTERNAL_ASM void PicoVideoWrite(u32 a,unsigned short d)
update_irq: update_irq:
#ifndef EMU_CORE_DEBUG #ifndef EMU_CORE_DEBUG
// update IRQ level // update IRQ level
if (!SekShouldInterrupt()) // hack
{ {
int lines, pints, irq = 0; int lines, pints, irq = 0;
lines = (pvid->reg[1] & 0x20) | (pvid->reg[0] & 0x10); lines = (pvid->reg[1] & 0x20) | (pvid->reg[0] & 0x10);
pints = pvid->pending_ints & lines; pints = pvid->pending_ints & lines;
if (pints & 0x20) irq = 6; if (pints & 0x20) irq = 6;
else if (pints & 0x10) irq = pvid->hint_irq; else if (pints & 0x10) irq = pvid->hint_irq;
if (SekIrqLevel < irq) if (irq) {
// VDP irqs have highest prio, overwrite old level
SekInterrupt(irq); // update line SekInterrupt(irq); // update line
// this is broken because cost of current insn isn't known here // this is broken because cost of current insn isn't known here
if (irq) SekEndRun(21); // make it delayed SekEndRun(21); // make it delayed
} else if (SekIrqLevel >= pvid->hint_irq) {
// no VDP irq, query lower irqs
SekInterrupt(PicoPicoIrqAck(0));
}
} }
#endif #endif
} }