mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
32x: initial code (security code passes)
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@772 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
000f53350c
commit
be2c420828
8 changed files with 340 additions and 5 deletions
31
pico/32x/32x.c
Normal file
31
pico/32x/32x.c
Normal file
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@ -0,0 +1,31 @@
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#include "../pico_int.h"
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struct Pico32x Pico32x;
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void Pico32xStartup(void)
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{
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elprintf(EL_STATUS|EL_32X, "32X startup");
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PicoAHW |= PAHW_32X;
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PicoMemSetup32x();
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// probably should only done on power
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// memset(&Pico32x, 0, sizeof(Pico32x));
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if (!Pico.m.pal)
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Pico32x.vdp_regs[0] |= 0x8000;
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// prefill checksum
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Pico32x.regs[0x28/2] = *(unsigned short *)(Pico.rom + 0x18e);
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}
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void Pico32xInit(void)
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{
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// XXX: mv
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Pico32x.regs[0] = 0x0082;
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}
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void PicoReset32x(void)
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{
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}
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252
pico/32x/memory.c
Normal file
252
pico/32x/memory.c
Normal file
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@ -0,0 +1,252 @@
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#include "../pico_int.h"
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#include "../memory.h"
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static const char str_mars[] = "MARS";
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struct Pico32xMem {
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u8 sdram[0x40000];
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u8 dram[0x40000]; // AKA fb
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u8 m68k_rom[M68K_BANK_SIZE]; // 0x100
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};
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static struct Pico32xMem *Pico32xMem;
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static u32 p32x_reg_read16(u32 a)
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{
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a &= 0x3e;
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return Pico32x.regs[a / 2];
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}
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static void p32x_reg_write16(u32 a, u32 d)
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{
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a &= 0x3e;
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if (a == 0 && !(Pico32x.regs[0] & 1)) {
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Pico32x.regs[0] |= 1;
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Pico32xStartup();
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return;
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}
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}
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static void p32x_reg_write8(u32 a, u32 d)
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{
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a &= 0x3f;
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if (a == 1 && !(Pico32x.regs[0] & 1)) {
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Pico32x.regs[0] |= 1;
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Pico32xStartup();
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return;
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}
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}
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// VDP regs
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static u32 p32x_vdp_read16(u32 a)
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{
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a &= 0x0e;
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return Pico32x.vdp_regs[a / 2];
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}
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static void p32x_vdp_write16(u32 a, u32 d)
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{
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a &= 0x0e;
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switch (a) {
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case 0x0a:
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Pico32x.pending_fb = d & 1;
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if (Pico.video.status & 8) {
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Pico32x.vdp_regs[0x0a/2] &= ~1;
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Pico32x.vdp_regs[0x0a/2] |= d & 1;
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}
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break;
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}
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}
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static void p32x_vdp_write8(u32 a, u32 d)
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{
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a &= 0x0f;
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switch (a) {
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case 0x0b:
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Pico32x.pending_fb = d & 1;
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if (Pico.video.status & 8) {
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Pico32x.vdp_regs[0x0a/2] &= ~1;
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Pico32x.vdp_regs[0x0a/2] |= d & 1;
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}
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break;
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}
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}
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// default 32x handlers
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u32 PicoRead8_32x(u32 a)
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{
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u32 d = 0;
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if ((a & 0xffc0) == 0x5100) { // a15100
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d = p32x_reg_read16(a);
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goto out_16to8;
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}
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if ((a & 0xfff0) == 0x5180 && (Pico32x.regs[0] & 1)) {
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d = p32x_vdp_read16(a);
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goto out_16to8;
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}
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if ((a & 0xfffc) == 0x30ec) { // a130ec
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d = str_mars[a & 3];
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goto out;
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}
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elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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return d;
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out_16to8:
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if (a & 1)
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d &= 0xff;
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else
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d >>= 8;
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out:
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elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
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return d;
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}
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u32 PicoRead16_32x(u32 a)
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{
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u32 d = 0;
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if ((a & 0xffc0) == 0x5100) { // a15100
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d = p32x_reg_read16(a);
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goto out;
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}
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if ((a & 0xfff0) == 0x5180 && (Pico32x.regs[0] & 1)) { // a15180
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d = p32x_vdp_read16(a);
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goto out;
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}
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if ((a & 0xfffc) == 0x30ec) { // a130ec
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d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
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goto out;
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}
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elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
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return d;
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out:
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elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
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return d;
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}
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void PicoWrite8_32x(u32 a, u32 d)
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{
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if ((a & 0xfc00) == 0x5000)
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elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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if ((a & 0xffc0) == 0x5100) { // a15100
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p32x_reg_write8(a, d);
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return;
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}
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if ((a & 0xfff0) == 0x5180 && (Pico32x.regs[0] & 1)) { // a15180
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p32x_vdp_write8(a, d);
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return;
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}
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elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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}
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void PicoWrite16_32x(u32 a, u32 d)
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{
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if ((a & 0xfc00) == 0x5000)
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elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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if ((a & 0xffc0) == 0x5100) { // a15100
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p32x_reg_write16(a, d);
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return;
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}
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if ((a & 0xfff0) == 0x5180 && (Pico32x.regs[0] & 1)) { // a15180
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p32x_vdp_write16(a, d);
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return;
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}
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elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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}
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// hint vector is writeable
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static void PicoWrite8_hint(u32 a, u32 d)
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{
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if ((a & 0xfffc) == 0x0070) {
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Pico32xMem->m68k_rom[a ^ 1] = d;
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return;
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}
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elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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}
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static void PicoWrite16_hint(u32 a, u32 d)
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{
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if ((a & 0xfffc) == 0x0070) {
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((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
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return;
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}
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elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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}
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#define HWSWAP(x) (((x) << 16) | ((x) >> 16))
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void PicoMemSetup32x(void)
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{
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unsigned short *ps;
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unsigned int *pl;
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unsigned int rs, rs1;
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int i;
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Pico32xMem = calloc(1, sizeof(*Pico32xMem));
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if (Pico32xMem == NULL) {
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elprintf(EL_STATUS, "OOM");
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return;
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}
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// generate 68k ROM
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ps = (unsigned short *)Pico32xMem->m68k_rom;
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pl = (unsigned int *)Pico32xMem->m68k_rom;
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for (i = 1; i < 0xc0/4; i++)
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pl[i] = HWSWAP(0x880200 + i * 6);
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// fill with nops
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for (i = 0xc0/2; i < 0x100/2; i++)
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ps[i] = 0x4e71;
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ps[0xc0/2] = 0x46fc;
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ps[0xc2/2] = 0x2700; // move #0x2700,sr
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ps[0xfe/2] = 0x60fe; // jump to self
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// fill remaining mem with ROM
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memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, M68K_BANK_SIZE - 0x100);
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// cartridge area becomes unmapped
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// XXX: we take the easy way and don't unmap ROM,
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// so that we can avoid handling the RV bit.
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// m68k_map_unmap(0x000000, 0x3fffff);
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// MD ROM area
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cpu68k_map_set(m68k_read8_map, 0x000000, M68K_BANK_SIZE - 1, Pico32xMem->m68k_rom, 0);
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cpu68k_map_set(m68k_read16_map, 0x000000, M68K_BANK_SIZE - 1, Pico32xMem->m68k_rom, 0);
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cpu68k_map_set(m68k_write8_map, 0x000000, M68K_BANK_SIZE - 1, PicoWrite8_hint, 1); // TODO verify
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cpu68k_map_set(m68k_write16_map, 0x000000, M68K_BANK_SIZE - 1, PicoWrite16_hint, 1);
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// 32X ROM (unbanked, XXX: consider mirroring?)
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rs1 = rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
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if (rs1 > 0x80000)
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rs1 = 0x80000;
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cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs1 - 1, Pico.rom, 0);
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cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs1 - 1, Pico.rom, 0);
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// 32X ROM (banked)
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if (rs > 0x100000)
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rs = 0x100000;
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cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom, 0);
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cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom, 0);
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}
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@ -501,6 +501,11 @@ u32 PicoRead8_io(u32 a)
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goto end;
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}
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if (!(PicoOpt & POPT_DIS_32X)) {
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d = PicoRead8_32x(a);
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goto end;
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}
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d = m68k_unmapped_read8(a);
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end:
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return d;
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@ -529,6 +534,11 @@ u32 PicoRead16_io(u32 a)
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goto end;
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}
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if (!(PicoOpt & POPT_DIS_32X)) {
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d = PicoRead16_32x(a);
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goto end;
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}
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d = m68k_unmapped_read16(a);
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end:
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return d;
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@ -554,6 +564,11 @@ void PicoWrite8_io(u32 a, u32 d)
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Pico.m.sram_reg |= (u8)(d & 3);
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return;
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}
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if (!(PicoOpt & POPT_DIS_32X)) {
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PicoWrite8_32x(a, d);
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return;
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}
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m68k_unmapped_write8(a, d);
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}
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@ -577,6 +592,10 @@ void PicoWrite16_io(u32 a, u32 d)
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Pico.m.sram_reg |= (u8)(d & 3);
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return;
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}
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if (!(PicoOpt & POPT_DIS_32X)) {
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PicoWrite16_32x(a, d);
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return;
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}
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m68k_unmapped_write16(a, d);
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}
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@ -40,6 +40,7 @@ void PicoInit(void)
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PicoInitMCD();
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PicoSVPInit();
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Pico32xInit();
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}
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// to be called once on emu exit
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@ -187,6 +188,11 @@ int PicoReset(void)
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if (!(PicoOpt & POPT_DIS_IDLE_DET))
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SekInitIdleDet();
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if (!(PicoOpt & POPT_DIS_32X)) {
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PicoReset32x();
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return 0;
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}
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// reset sram state; enable sram access by default if it doesn't overlap with ROM
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Pico.m.sram_reg = 0;
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if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)
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@ -55,7 +55,9 @@ extern void emu_video_mode_change(int start_line, int line_count, int is_32cols)
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#define POPT_EN_SVP_DRC (1<<17)
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#define POPT_DIS_SPRITE_LIM (1<<18)
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#define POPT_DIS_IDLE_DET (1<<19)
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#define POPT_DIS_32X (1<<20)
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extern int PicoOpt; // bitfield
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#define PAHW_MCD (1<<0)
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#define PAHW_32X (1<<1)
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#define PAHW_SVP (1<<2)
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@ -257,15 +257,15 @@ struct PicoMisc
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unsigned char pal; // 08 1=PAL 0=NTSC
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unsigned char sram_reg; // 09 SRAM reg. See SRR_* below
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unsigned short z80_bank68k; // 0a
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unsigned short z80_lastaddr; // this is for Z80 faking
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unsigned char pad0;
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unsigned short pad0;
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unsigned char pad1;
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unsigned char z80_reset; // z80 reset held
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unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
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unsigned short eeprom_addr; // EEPROM address register
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unsigned char eeprom_cycle; // EEPROM cycle number
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unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs
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unsigned char eeprom_status;
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unsigned char pad1;
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unsigned char pad2;
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unsigned short dma_xfers; // 18
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unsigned char eeprom_wb[2]; // EEPROM latch/write buffer
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unsigned int frame_count; // 1c for movies and idle det
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@ -385,8 +385,17 @@ typedef struct
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Rot_Comp rot_comp;
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} mcd_state;
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// XXX: this will need to be reworked for cart+cd support.
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#define Pico_mcd ((mcd_state *)Pico.rom)
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// 32X
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struct Pico32x
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{
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unsigned short regs[0x20];
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unsigned short vdp_regs[0x10];
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unsigned char pending_fb;
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unsigned char pad[3];
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};
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// area.c
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PICO_INTERNAL void PicoAreaPackCpu(unsigned char *cpu, int is_sub);
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@ -576,6 +585,19 @@ void PicoMemSetupMS(void);
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void PicoFrameMS(void);
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void PicoFrameDrawOnlyMS(void);
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// 32x/32x.c
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extern struct Pico32x Pico32x;
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void Pico32xInit(void);
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void Pico32xStartup(void);
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void PicoReset32x(void);
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// 32x/memory.c
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unsigned int PicoRead8_32x(unsigned int a);
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unsigned int PicoRead16_32x(unsigned int a);
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void PicoWrite8_32x(unsigned int a, unsigned int d);
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void PicoWrite16_32x(unsigned int a, unsigned int d);
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void PicoMemSetup32x(void);
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/* avoid dependency on newer glibc */
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static __inline int isspace_(int c)
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{
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@ -606,6 +628,7 @@ static __inline int isspace_(int c)
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#define EL_IDLE 0x00010000 /* idle loop det. */
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#define EL_CDREGS 0x00020000 /* MCD: register access */
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#define EL_CDREG3 0x00040000 /* MCD: register 3 only */
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#define EL_32X 0x00080000
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#define EL_STATUS 0x40000000 /* status messages */
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#define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
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@ -39,6 +39,8 @@ OBJS += pico/area.o pico/cart.o pico/memory.o pico/pico.o pico/sek.o \
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OBJS += pico/cd/pico.o pico/cd/memory.o pico/cd/sek.o pico/cd/LC89510.o \
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pico/cd/cd_sys.o pico/cd/cd_file.o pico/cd/cue.o pico/cd/gfx_cd.o \
|
||||
pico/cd/area.o pico/cd/misc.o pico/cd/pcm.o pico/cd/buffering.o
|
||||
# Pico - 32X
|
||||
OBJS += pico/32x/32x.o pico/32x/memory.o
|
||||
# Pico - Pico
|
||||
OBJS += pico/pico/pico.o pico/pico/memory.o pico/pico/xpcm.o
|
||||
# Pico - sound
|
||||
|
|
@ -81,7 +83,7 @@ CFLAGS += $(addprefix -D,$(DEFINES))
|
|||
vpath %.c = ../..
|
||||
|
||||
DIRS = platform platform/gp2x platform/common pico pico/cd pico/pico pico/sound pico/carthw/svp \
|
||||
zlib unzip cpu cpu/musashi cpu/fame cpu/mz80 cpu/cz80
|
||||
pico/32x zlib unzip cpu cpu/musashi cpu/fame cpu/mz80 cpu/cz80
|
||||
|
||||
all: mkdirs PicoDrive
|
||||
clean: tidy
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
#define SIMPLE_WRITE_SOUND 0
|
||||
#define mix_32_to_16l_stereo_lvl mix_32_to_16l_stereo
|
||||
|
||||
#define EL_LOGMASK (EL_ANOMALY|EL_STATUS|EL_UIO|EL_IDLE)//|EL_VDPDMA|EL_HVCNT|EL_ASVDP)//|EL_SVP)
|
||||
#define EL_LOGMASK (EL_ANOMALY|EL_STATUS|EL_UIO|EL_IDLE|EL_32X)//|EL_VDPDMA|EL_HVCNT|EL_ASVDP)//|EL_SVP)
|
||||
// EL_VDPDMA|EL_ASVDP|EL_SR) // |EL_BUSREQ|EL_Z80BNK)
|
||||
|
||||
//#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue