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drc: split disassembly to separate pass
allows easier analysis
This commit is contained in:
parent
8cc76b4886
commit
bf092a3631
6 changed files with 1001 additions and 338 deletions
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@ -1,4 +1,5 @@
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typedef unsigned char u8;
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typedef signed char s8;
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typedef unsigned short u16;
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typedef unsigned int u32;
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@ -363,6 +363,9 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_mvn_r_r(d, s) \
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EOP_MVN_REG(A_COND_AL,0,d,s,A_AM1_LSL,0)
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#define emith_add_r_r_r_lsl(d, s1, s2, lslimm) \
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EOP_ADD_REG(A_COND_AL,0,d,s1,s2,A_AM1_LSL,lslimm)
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#define emith_or_r_r_r_lsl(d, s1, s2, lslimm) \
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EOP_ORR_REG(A_COND_AL,0,d,s1,s2,A_AM1_LSL,lslimm)
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@ -378,6 +381,9 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_eor_r_r_lsr(d, s, lsrimm) \
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emith_eor_r_r_r_lsr(d, d, s, lsrimm)
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#define emith_add_r_r_r(d, s1, s2) \
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emith_add_r_r_r_lsl(d, s1, s2, 0)
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#define emith_or_r_r_r(d, s1, s2) \
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emith_or_r_r_r_lsl(d, s1, s2, 0)
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@ -385,7 +391,7 @@ static int emith_xbranch(int cond, void *target, int is_call)
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emith_eor_r_r_r_lsl(d, s1, s2, 0)
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#define emith_add_r_r(d, s) \
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EOP_ADD_REG(A_COND_AL,0,d,d,s,A_AM1_LSL,0)
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emith_add_r_r_r(d, d, s)
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#define emith_sub_r_r(d, s) \
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EOP_SUB_REG(A_COND_AL,0,d,d,s,A_AM1_LSL,0)
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@ -715,12 +721,7 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_sh2_drc_exit() \
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EOP_LDMFD_SP(A_R4M|A_R5M|A_R6M|A_R7M|A_R8M|A_R9M|A_R10M|A_R11M|A_R12M|A_R15M)
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#define emith_sh2_wcall(a, tab, ret_ptr) { \
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int val_ = (char *)(ret_ptr) - (char *)tcache_ptr - 2*4; \
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if (val_ >= 0) \
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emith_add_r_r_imm(14, 15, val_); \
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else if (val_ < 0) \
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emith_sub_r_r_imm(14, 15, -val_); \
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#define emith_sh2_wcall(a, tab) { \
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emith_lsr(12, a, SH2_WRITE_SHIFT); \
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EOP_LDR_REG_LSL(A_COND_AL,12,tab,12,2); \
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emith_ctx_read(2, offsetof(SH2, is_slave)); \
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@ -145,6 +145,17 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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}
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// _r_r_r
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#define emith_add_r_r_r(d, s1, s2) { \
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if (d == s1) { \
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emith_add_r_r(d, s2); \
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} else if (d == s2) { \
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emith_add_r_r(d, s1); \
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} else { \
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emith_move_r_r(d, s1); \
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emith_add_r_r(d, s2); \
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} \
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}
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#define emith_eor_r_r_r(d, s1, s2) { \
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if (d == s1) { \
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emith_eor_r_r(d, s2); \
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@ -618,14 +629,13 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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}
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// assumes EBX is free temporary
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#define emith_sh2_wcall(a, tab, ret_ptr) { \
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#define emith_sh2_wcall(a, tab) { \
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int arg2_; \
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host_arg2reg(arg2_, 2); \
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emith_lsr(xBX, a, SH2_WRITE_SHIFT); \
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EMIT_OP_MODRM(0x8b, 0, xBX, 4); \
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EMIT_SIB(2, xBX, tab); /* mov ebx, [tab + ebx * 4] */ \
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emith_ctx_read(arg2_, offsetof(SH2, is_slave)); \
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emith_push_imm((long)(ret_ptr)); \
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emith_jump_reg(xBX); \
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}
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1278
cpu/sh2/compiler.c
1278
cpu/sh2/compiler.c
File diff suppressed because it is too large
Load diff
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@ -7,11 +7,12 @@ void sh2_drc_wcheck_da(unsigned int a, int val, int cpuid);
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#define BLOCK_INSN_LIMIT 128
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#define OP_FLAGS(pc) op_flags[((pc) - (base_pc)) / 2]
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/* op_flags */
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#define OF_DELAY_OP (1 << 0)
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#define OF_BTARGET (1 << 1)
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#define OF_T_SET (1 << 2) // T is known to be set
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#define OF_T_CLEAR (1 << 3) // ... clear
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void scan_block(unsigned int base_pc, int is_slave,
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unsigned char *op_flags, unsigned int *end_pc);
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unsigned char *op_flags, unsigned int *end_pc,
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unsigned int *end_literals);
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@ -88,12 +88,14 @@ int sh2_execute(SH2 *sh2, int cycles)
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{
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#ifdef DRC_CMP
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if (!sh2->delay) {
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if (sh2->pc < base_pc || sh2->pc > end_pc) {
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if (sh2->pc < base_pc || sh2->pc >= end_pc) {
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base_pc = sh2->pc;
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scan_block(base_pc, sh2->is_slave,
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op_flags, &end_pc);
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op_flags, &end_pc, NULL);
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}
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if ((OP_FLAGS(sh2->pc) & OF_BTARGET) || sh2->pc == base_pc) {
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if ((op_flags[(sh2->pc - base_pc) / 2]
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& OF_BTARGET) || sh2->pc == base_pc)
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{
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if (sh2->icount < 0)
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break;
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}
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