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core z80, more timing fixes

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This commit is contained in:
kub 2024-03-03 22:55:35 +01:00
parent 1d78204a90
commit c066c40ba9
2 changed files with 6 additions and 6 deletions
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8
pico/memory.c
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@ -521,7 +521,7 @@ void NOINLINE ctl_write_z80busreq(u32 d)
{ {
if (d) if (d)
{ {
Pico.t.z80c_cnt = z80_cycles_from_68k() + 2; Pico.t.z80c_cnt = z80_cycles_from_68k() + 1;
} }
else else
{ {
@ -553,7 +553,7 @@ void NOINLINE ctl_write_z80reset(u32 d)
} }
else else
{ {
Pico.t.z80c_cnt = z80_cycles_from_68k() + 2; Pico.t.z80c_cnt = z80_cycles_from_68k() + 1;
z80_reset(); z80_reset();
} }
Pico.m.z80_reset = d; Pico.m.z80_reset = d;
@ -680,7 +680,6 @@ static u32 PicoRead8_z80(u32 a)
// open bus. Pulled down if MegaCD2 is attached. // open bus. Pulled down if MegaCD2 is attached.
return (PicoIn.AHW & PAHW_MCD ? 0 : d); return (PicoIn.AHW & PAHW_MCD ? 0 : d);
} }
Pico.t.z80c_cnt += 3;
SekCyclesBurnRun(1); SekCyclesBurnRun(1);
if ((a & 0x4000) == 0x0000) { if ((a & 0x4000) == 0x0000) {
@ -705,7 +704,6 @@ static void PicoWrite8_z80(u32 a, u32 d)
elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc); elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
return; return;
} }
Pico.t.z80c_cnt += 3;
SekCyclesBurnRun(1); SekCyclesBurnRun(1);
if ((a & 0x4000) == 0x0000) { // z80 RAM if ((a & 0x4000) == 0x0000) { // z80 RAM
@ -1359,7 +1357,7 @@ static void access_68k_bus(int delay) // bus delay as Q8
z80_subCLeft((delay>>8) + (Pico.t.z80_busdelay>>8)); z80_subCLeft((delay>>8) + (Pico.t.z80_busdelay>>8));
// don't use SekCyclesBurn() here since the Z80 doesn't run in cycle lock to // don't use SekCyclesBurn() here since the Z80 doesn't run in cycle lock to
// the 68K. Count the stolen cycles to be accounted later in the 68k CPU runs // the 68K. Count the stolen cycles to be accounted later in the 68k CPU runs
Pico.t.z80_buscycles += 7; Pico.t.z80_buscycles += 8;
} }
static unsigned char z80_md_vdp_read(unsigned short a) static unsigned char z80_md_vdp_read(unsigned short a)

4
pico/z80if.c
View file

@ -112,12 +112,13 @@ void z80_reset(void)
drZ80.Z80IF = 0; drZ80.Z80IF = 0;
drZ80.z80irqvector = 0xff0000; // RST 38h drZ80.z80irqvector = 0xff0000; // RST 38h
drZ80.Z80PC_BASE = drZ80.Z80PC = z80_read_map[0] << 1; drZ80.Z80PC_BASE = drZ80.Z80PC = z80_read_map[0] << 1;
// others not changed, undefined on cold boot // other registers not changed, undefined on cold boot
#ifdef FAST_Z80SP #ifdef FAST_Z80SP
// drZ80 is locked in single bank // drZ80 is locked in single bank
drz80_sp_base = (PicoIn.AHW & PAHW_SMS) ? 0xc000 : 0x0000; drz80_sp_base = (PicoIn.AHW & PAHW_SMS) ? 0xc000 : 0x0000;
drZ80.Z80SP_BASE = z80_read_map[drz80_sp_base >> Z80_MEM_SHIFT] << 1; drZ80.Z80SP_BASE = z80_read_map[drz80_sp_base >> Z80_MEM_SHIFT] << 1;
#endif #endif
drZ80.Z80SP = drZ80.Z80SP_BASE + 0xffff;
drZ80.z80_irq_callback = NULL; // use auto-clear drZ80.z80_irq_callback = NULL; // use auto-clear
if (PicoIn.AHW & PAHW_SMS) { if (PicoIn.AHW & PAHW_SMS) {
drZ80.Z80SP = drZ80.Z80SP_BASE + 0xdff0; // simulate BIOS drZ80.Z80SP = drZ80.Z80SP_BASE + 0xdff0; // simulate BIOS
@ -128,6 +129,7 @@ void z80_reset(void)
#endif #endif
#ifdef _USE_CZ80 #ifdef _USE_CZ80
Cz80_Reset(&CZ80); Cz80_Reset(&CZ80);
Cz80_Set_Reg(&CZ80, CZ80_SP, 0xffff);
if (PicoIn.AHW & PAHW_SMS) if (PicoIn.AHW & PAHW_SMS)
Cz80_Set_Reg(&CZ80, CZ80_SP, 0xdff0); Cz80_Set_Reg(&CZ80, CZ80_SP, 0xdff0);
#endif #endif