mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
mcd, fix Word-RAM in 2M mode
This commit is contained in:
kub
parent
4a55f64a5d
commit
c36dbc1dcd
3 changed files with 28 additions and 33 deletions
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@ -257,7 +257,7 @@ void pcd_irq_s68k(int irq, int state)
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{
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if (state) {
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SekInterruptS68k(irq);
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Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP);
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
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Pico_mcd->m.s68k_poll_cnt = 0;
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} else
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SekInterruptClearS68k(irq);
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@ -319,7 +319,7 @@ void pcd_run_cpus_normal(int m68k_cycles)
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}
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#ifdef USE_POLL_DETECT
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if (Pico_mcd->m.state_flags & (PCD_ST_M68K_POLL|PCD_ST_M68K_SLEEP)) {
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if (Pico_mcd->m.state_flags & PCD_ST_M68K_POLL) {
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int s68k_left;
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// main CPU is polling, (wake and) run sub only
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if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) {
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@ -333,7 +333,7 @@ void pcd_run_cpus_normal(int m68k_cycles)
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Pico.t.m68c_cnt -= ((long long)s68k_left * mcd_s68k_cycle_mult >> 16);
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if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) {
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// slave has stopped, wake master to avoid lockups
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Pico_mcd->m.state_flags &= ~(PCD_ST_M68K_POLL|PCD_ST_M68K_SLEEP);
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Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
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Pico_mcd->m.m68k_poll_cnt = 0;
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}
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@ -263,7 +263,6 @@ u32 s68k_poll_detect(u32 a, u32 d)
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u32 cycles, cnt = 0;
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if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP))
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return d;
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SekEndRunS68k(8);
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cycles = SekCyclesDoneS68k();
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if (!SekNotPollingS68k && a == Pico_mcd->m.s68k_poll_a) {
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@ -274,9 +273,11 @@ u32 s68k_poll_detect(u32 a, u32 d)
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
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if (cnt > POLL_LIMIT) {
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Pico_mcd->m.state_flags |= PCD_ST_S68K_POLL;
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SekEndRunS68k(8);
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elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",
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SekPcS68k, a);
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}
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} else if (cnt > 2)
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SekEndRunS68k(80);
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}
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}
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Pico_mcd->m.s68k_poll_a = a;
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@ -1073,59 +1074,55 @@ static void remap_prg_window(u32 r1, u32 r3)
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}
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}
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// if main or sub CPU accesses Word-RAM while it is assigned to the other CPU
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// if sub CPU accesses Word-RAM while it is assigned to the main CPU,
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// GA doesn't assert DTACK, which means the CPU is blocked until the Word_RAM
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// is reassigned to it (e.g. Mega Race).
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static u32 m68k_wordram_read8(u32 a)
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// since DTACK isn't on the expansion port, main cpu accesses are not blocked.
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// XXX is data read/written if main is accessing Word_RAM while not owning it?
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static u32 m68k_wordram_sub_read8(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;
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SekEndRun(0);
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return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
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return 0xff;
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// return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
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}
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static u32 m68k_wordram_read16(u32 a)
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static u32 m68k_wordram_sub_read16(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;
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SekEndRun(0);
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return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
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return 0xffff;
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// return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
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}
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static void m68k_wordram_write8(u32 a, u32 d)
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static void m68k_wordram_sub_write8(u32 a, u32 d)
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{
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Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;
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SekEndRun(0);
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Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
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// Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
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}
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static void m68k_wordram_write16(u32 a, u32 d)
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static void m68k_wordram_sub_write16(u32 a, u32 d)
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{
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Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;
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SekEndRun(0);
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((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;
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// ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;
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}
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static u32 s68k_wordram_read8(u32 a)
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static u32 s68k_wordram_main_read8(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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SekEndRunS68k(0);
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return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
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}
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static u32 s68k_wordram_read16(u32 a)
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static u32 s68k_wordram_main_read16(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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SekEndRunS68k(0);
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return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
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}
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static void s68k_wordram_write8(u32 a, u32 d)
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static void s68k_wordram_main_write8(u32 a, u32 d)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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SekEndRunS68k(0);
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Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
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}
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static void s68k_wordram_write16(u32 a, u32 d)
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static void s68k_wordram_main_write16(u32 a, u32 d)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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SekEndRunS68k(0);
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@ -1141,24 +1138,23 @@ static void remap_word_ram(u32 r3)
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// 2M mode.
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bank = Pico_mcd->word_ram2M;
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if (r3 & 1) {
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Pico_mcd->m.state_flags &= ~PCD_ST_M68K_SLEEP;
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cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
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cpu68k_map_all_funcs(0x80000, 0xbffff,
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s68k_wordram_read8, s68k_wordram_read16,
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s68k_wordram_write8, s68k_wordram_write16, 1);
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s68k_wordram_main_read8, s68k_wordram_main_read16,
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s68k_wordram_main_write8, s68k_wordram_main_write16, 1);
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} else {
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;
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cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
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cpu68k_map_all_funcs(0x200000, 0x23ffff,
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m68k_wordram_read8, m68k_wordram_read16,
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m68k_wordram_write8, m68k_wordram_write16, 0);
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m68k_wordram_sub_read8, m68k_wordram_sub_read16,
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m68k_wordram_sub_write8, m68k_wordram_sub_write16, 0);
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}
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// TODO: handle 0x0c0000
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}
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else {
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int b0 = r3 & 1;
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int m = (r3 & 0x18) >> 3;
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Pico_mcd->m.state_flags &= ~(PCD_ST_M68K_SLEEP|PCD_ST_S68K_SLEEP);
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;
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bank = Pico_mcd->word_ram1M[b0];
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cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
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bank = Pico_mcd->word_ram1M[b0 ^ 1];
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@ -509,7 +509,6 @@ struct mcd_pcm
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#define PCD_ST_S68K_RST 1
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#define PCD_ST_S68K_SYNC 2
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#define PCD_ST_S68K_SLEEP 4
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#define PCD_ST_M68K_SLEEP 8
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#define PCD_ST_S68K_POLL 16
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#define PCD_ST_M68K_POLL 32
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