mcd, fix Word-RAM in 2M mode

This commit is contained in:
kub 2023-05-11 22:39:28 +00:00
parent 4a55f64a5d
commit c36dbc1dcd
3 changed files with 28 additions and 33 deletions

View file

@ -257,7 +257,7 @@ void pcd_irq_s68k(int irq, int state)
{ {
if (state) { if (state) {
SekInterruptS68k(irq); SekInterruptS68k(irq);
Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP); Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
Pico_mcd->m.s68k_poll_cnt = 0; Pico_mcd->m.s68k_poll_cnt = 0;
} else } else
SekInterruptClearS68k(irq); SekInterruptClearS68k(irq);
@ -319,7 +319,7 @@ void pcd_run_cpus_normal(int m68k_cycles)
} }
#ifdef USE_POLL_DETECT #ifdef USE_POLL_DETECT
if (Pico_mcd->m.state_flags & (PCD_ST_M68K_POLL|PCD_ST_M68K_SLEEP)) { if (Pico_mcd->m.state_flags & PCD_ST_M68K_POLL) {
int s68k_left; int s68k_left;
// main CPU is polling, (wake and) run sub only // main CPU is polling, (wake and) run sub only
if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) { if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) {
@ -333,7 +333,7 @@ void pcd_run_cpus_normal(int m68k_cycles)
Pico.t.m68c_cnt -= ((long long)s68k_left * mcd_s68k_cycle_mult >> 16); Pico.t.m68c_cnt -= ((long long)s68k_left * mcd_s68k_cycle_mult >> 16);
if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) { if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) {
// slave has stopped, wake master to avoid lockups // slave has stopped, wake master to avoid lockups
Pico_mcd->m.state_flags &= ~(PCD_ST_M68K_POLL|PCD_ST_M68K_SLEEP); Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
Pico_mcd->m.m68k_poll_cnt = 0; Pico_mcd->m.m68k_poll_cnt = 0;
} }

View file

@ -263,7 +263,6 @@ u32 s68k_poll_detect(u32 a, u32 d)
u32 cycles, cnt = 0; u32 cycles, cnt = 0;
if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP))
return d; return d;
SekEndRunS68k(8);
cycles = SekCyclesDoneS68k(); cycles = SekCyclesDoneS68k();
if (!SekNotPollingS68k && a == Pico_mcd->m.s68k_poll_a) { if (!SekNotPollingS68k && a == Pico_mcd->m.s68k_poll_a) {
@ -274,9 +273,11 @@ u32 s68k_poll_detect(u32 a, u32 d)
Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL; Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
if (cnt > POLL_LIMIT) { if (cnt > POLL_LIMIT) {
Pico_mcd->m.state_flags |= PCD_ST_S68K_POLL; Pico_mcd->m.state_flags |= PCD_ST_S68K_POLL;
SekEndRunS68k(8);
elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x", elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",
SekPcS68k, a); SekPcS68k, a);
} } else if (cnt > 2)
SekEndRunS68k(80);
} }
} }
Pico_mcd->m.s68k_poll_a = a; Pico_mcd->m.s68k_poll_a = a;
@ -1073,59 +1074,55 @@ static void remap_prg_window(u32 r1, u32 r3)
} }
} }
// if main or sub CPU accesses Word-RAM while it is assigned to the other CPU // if sub CPU accesses Word-RAM while it is assigned to the main CPU,
// GA doesn't assert DTACK, which means the CPU is blocked until the Word_RAM // GA doesn't assert DTACK, which means the CPU is blocked until the Word_RAM
// is reassigned to it (e.g. Mega Race). // is reassigned to it (e.g. Mega Race).
static u32 m68k_wordram_read8(u32 a) // since DTACK isn't on the expansion port, main cpu accesses are not blocked.
// XXX is data read/written if main is accessing Word_RAM while not owning it?
static u32 m68k_wordram_sub_read8(u32 a)
{ {
Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP; return 0xff;
SekEndRun(0); // return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
} }
static u32 m68k_wordram_read16(u32 a) static u32 m68k_wordram_sub_read16(u32 a)
{ {
Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP; return 0xffff;
SekEndRun(0); // return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
} }
static void m68k_wordram_write8(u32 a, u32 d) static void m68k_wordram_sub_write8(u32 a, u32 d)
{ {
Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP; // Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
SekEndRun(0);
Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
} }
static void m68k_wordram_write16(u32 a, u32 d) static void m68k_wordram_sub_write16(u32 a, u32 d)
{ {
Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP; // ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;
SekEndRun(0);
((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;
} }
static u32 s68k_wordram_read8(u32 a) static u32 s68k_wordram_main_read8(u32 a)
{ {
Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP; Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
SekEndRunS68k(0); SekEndRunS68k(0);
return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff]; return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
} }
static u32 s68k_wordram_read16(u32 a) static u32 s68k_wordram_main_read16(u32 a)
{ {
Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP; Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
SekEndRunS68k(0); SekEndRunS68k(0);
return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff]; return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
} }
static void s68k_wordram_write8(u32 a, u32 d) static void s68k_wordram_main_write8(u32 a, u32 d)
{ {
Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP; Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
SekEndRunS68k(0); SekEndRunS68k(0);
Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d; Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
} }
static void s68k_wordram_write16(u32 a, u32 d) static void s68k_wordram_main_write16(u32 a, u32 d)
{ {
Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP; Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
SekEndRunS68k(0); SekEndRunS68k(0);
@ -1141,24 +1138,23 @@ static void remap_word_ram(u32 r3)
// 2M mode. // 2M mode.
bank = Pico_mcd->word_ram2M; bank = Pico_mcd->word_ram2M;
if (r3 & 1) { if (r3 & 1) {
Pico_mcd->m.state_flags &= ~PCD_ST_M68K_SLEEP;
cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0); cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
cpu68k_map_all_funcs(0x80000, 0xbffff, cpu68k_map_all_funcs(0x80000, 0xbffff,
s68k_wordram_read8, s68k_wordram_read16, s68k_wordram_main_read8, s68k_wordram_main_read16,
s68k_wordram_write8, s68k_wordram_write16, 1); s68k_wordram_main_write8, s68k_wordram_main_write16, 1);
} else { } else {
Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP; Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;
cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1); cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
cpu68k_map_all_funcs(0x200000, 0x23ffff, cpu68k_map_all_funcs(0x200000, 0x23ffff,
m68k_wordram_read8, m68k_wordram_read16, m68k_wordram_sub_read8, m68k_wordram_sub_read16,
m68k_wordram_write8, m68k_wordram_write16, 0); m68k_wordram_sub_write8, m68k_wordram_sub_write16, 0);
} }
// TODO: handle 0x0c0000 // TODO: handle 0x0c0000
} }
else { else {
int b0 = r3 & 1; int b0 = r3 & 1;
int m = (r3 & 0x18) >> 3; int m = (r3 & 0x18) >> 3;
Pico_mcd->m.state_flags &= ~(PCD_ST_M68K_SLEEP|PCD_ST_S68K_SLEEP); Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;
bank = Pico_mcd->word_ram1M[b0]; bank = Pico_mcd->word_ram1M[b0];
cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0); cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
bank = Pico_mcd->word_ram1M[b0 ^ 1]; bank = Pico_mcd->word_ram1M[b0 ^ 1];

View file

@ -509,7 +509,6 @@ struct mcd_pcm
#define PCD_ST_S68K_RST 1 #define PCD_ST_S68K_RST 1
#define PCD_ST_S68K_SYNC 2 #define PCD_ST_S68K_SYNC 2
#define PCD_ST_S68K_SLEEP 4 #define PCD_ST_S68K_SLEEP 4
#define PCD_ST_M68K_SLEEP 8
#define PCD_ST_S68K_POLL 16 #define PCD_ST_S68K_POLL 16
#define PCD_ST_M68K_POLL 32 #define PCD_ST_M68K_POLL 32