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core, some save state fixes

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This commit is contained in:
kub 2024-06-20 18:46:36 +02:00
parent f5c022a8e4
commit c5ecd7a0bb
6 changed files with 14 additions and 7 deletions
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2
pico/memory.c
View file

@ -1386,7 +1386,7 @@ static void access_68k_bus(int delay) // bus delay as Q8
Pico.t.z80_busdelay &= 0xff; // leftover cycle fraction
// don't use SekCyclesBurn() here since the Z80 doesn't run in cycle lock to
// the 68K. Count the stolen cycles to be accounted later in the 68k CPU runs
Pico.t.z80_buscycles += 8;
Pico.t.z80_buscycles += 8; // TODO <=8.4 for Rick 2, but >=8.9 for misc_test
}
static unsigned char z80_md_vdp_read(unsigned short a)

1
pico/pico.c
View file

@ -239,6 +239,7 @@ void PicoLoopPrepare(void)
Pico.t.vcnt_wrap = 0xEB;
Pico.t.vcnt_adj = 6;
}
PicoVideoFIFOMode(Pico.video.reg[1]&0x40, Pico.video.reg[12]&1);
Pico.m.dirtyPal = 1;
rendstatus_old = -1;

5
pico/sek.c
View file

@ -221,7 +221,8 @@ PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)
*(u32 *)(cpu+0x50) = SekCycleCntS68k;
*(s16 *)(cpu+0x4e) = SekCycleCntS68k - SekCycleAimS68k;
} else {
*(u32 *)(cpu+0x50) = Pico.t.m68c_cnt;
*(u32 *)(cpu+0x50) = Pico.t.m68c_cnt + Pico.t.z80_buscycles +
((Pico.t.refresh_delay + (1<<14)/2) >> 14);
*(s16 *)(cpu+0x4e) = Pico.t.m68c_cnt - Pico.t.m68c_aim;
}
}
@ -266,6 +267,8 @@ PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)
} else {
Pico.t.m68c_cnt = *(u32 *)(cpu+0x50);
Pico.t.m68c_aim = Pico.t.m68c_cnt - *(s16 *)(cpu+0x4e);
Pico.t.z80_buscycles = 0;
Pico.t.refresh_delay = 0;
}
}

2
pico/state.c
View file

@ -747,7 +747,7 @@ struct PicoTmp
unsigned short vram[0x8000];
unsigned short cram[0x40];
unsigned short vsram[0x40];
unsigned int satcache[0x80];
unsigned int satcache[2*0x80];
//struct PicoMisc m;
struct PicoVideo video;

8
pico/videoport.c
View file

@ -426,6 +426,8 @@ void PicoVideoFIFOMode(int active, int h40)
if (vf->fifo_maxslot)
PicoVideoFIFOSync(lc);
else
lc = 0;
vf->fifo_cyc2sl = vdpcyc2sl[active][h40];
vf->fifo_sl2cyc = vdpsl2cyc[active][h40];
@ -1243,10 +1245,11 @@ void PicoVideoLoad(void)
vf->fifo_ql = vf->fifo_qx = vf->fifo_total = 0;
if (pv->fifo_cnt) {
int wc = pv->fifo_cnt;
pv->status |= PVS_CPUWR;
vf->fifo_total = (wc+b) >> b;
vf->fifo_queue[vf->fifo_qx + vf->fifo_ql] = (wc << 3) | b | FQ_FGDMA;
vf->fifo_ql ++;
if (vf->fifo_total > 4 && !(pv->status & (PVS_CPUWR|PVS_CPURD)))
pv->status |= PVS_CPUWR;
}
if (pv->fifo_bgcnt) {
int wc = pv->fifo_bgcnt;
@ -1255,8 +1258,7 @@ void PicoVideoLoad(void)
vf->fifo_queue[vf->fifo_qx + vf->fifo_ql] = (wc << 3) | FQ_BGDMA;
vf->fifo_ql ++;
}
if (vf->fifo_ql)
pv->status |= SR_DMA;
PicoVideoCacheSAT(1);
vf->fifo_maxslot = 0;
}
// vim:shiftwidth=2:ts=2:expandtab

3
pico/z80if.c
View file

@ -165,7 +165,7 @@ void z80_pack(void *data)
struct z80_state *s = data;
memset(data, 0, Z80_STATE_SIZE);
memcpy(s->magic, "Z80a", 4);
s->cyc = Pico.t.z80c_cnt;
s->cyc = Pico.t.z80c_cnt + ((Pico.t.z80_busdelay + (1<<8)/2) >> 8);
#if defined(_USE_DRZ80)
#define DRR8(n) (drZ80.Z80##n >> 24)
#define DRR16(n) (drZ80.Z80##n >> 16)
@ -224,6 +224,7 @@ int z80_unpack(const void *data)
return 0;
}
Pico.t.z80c_cnt = s->cyc;
Pico.t.z80_busdelay = 0;
#if defined(_USE_DRZ80)
#define DRW8(n, v) drZ80.Z80##n = (u32)(v) << 24