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updated Musashi to MAME 0.117
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@188 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
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60305cdd4d
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13 changed files with 331 additions and 38681 deletions
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@ -3,10 +3,10 @@
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/* ======================================================================== */
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/*
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* MUSASHI
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* Version 3.3
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* Version 3.31
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*
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* A portable Motorola M680x0 processor emulation engine.
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* Copyright 1998-2001 Karl Stenerud. All rights reserved.
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* Copyright 1998-2007 Karl Stenerud. All rights reserved.
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*
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* This code may be freely used for non-commercial purposes as long as this
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* copyright notice remains unaltered in the source code and any binary files
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@ -204,9 +204,8 @@ static uint g_cpu_pc; /* program counter */
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static uint g_cpu_ir; /* instruction register */
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static uint g_cpu_type;
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static uint g_opcode_type;
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static unsigned char* g_rawop;
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static const unsigned char* g_rawop;
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static uint g_rawbasepc;
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static uint g_rawlength;
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/* used by ops like asr, ror, addq, etc */
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static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
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@ -252,7 +251,7 @@ static uint dasm_read_imm_8(uint advance)
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if (g_rawop)
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result = g_rawop[g_cpu_pc + 1 - g_rawbasepc];
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else
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result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xff;
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result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff; // 0xff ???
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g_cpu_pc += advance;
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return result;
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}
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@ -264,7 +263,7 @@ static uint dasm_read_imm_16(uint advance)
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result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) |
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g_rawop[g_cpu_pc + 1 - g_rawbasepc];
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else
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result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff; // & 0xff; ??
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result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff; // 0xff ???
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g_cpu_pc += advance;
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return result;
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}
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@ -278,7 +277,7 @@ static uint dasm_read_imm_32(uint advance)
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(g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |
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g_rawop[g_cpu_pc + 3 - g_rawbasepc];
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else
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result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask); // & 0xff; ??
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result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask) & 0xffff; // 0xff ???
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g_cpu_pc += advance;
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return result;
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}
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@ -1688,6 +1687,124 @@ static void d68020_extb_32(void)
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sprintf(g_dasm_str, "extb.l D%d; (2+)", g_cpu_ir&7);
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}
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static void d68040_fpu(void)
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{
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char float_data_format[8][3] =
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{
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".l", ".s", ".x", ".p", ".w", ".d", ".b", ".?"
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};
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char mnemonic[40];
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uint w2, src, dst_reg;
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LIMIT_CPU_TYPES(M68040_PLUS);
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w2 = read_imm_16();
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src = (w2 >> 10) & 0x7;
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dst_reg = (w2 >> 7) & 0x7;
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switch ((w2 >> 13) & 0x7)
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{
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case 0x0:
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case 0x2:
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{
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switch(w2 & 0x7f)
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{
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case 0x00: sprintf(mnemonic, "fmove"); break;
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case 0x01: sprintf(mnemonic, "fint"); break;
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case 0x02: sprintf(mnemonic, "fsinh"); break;
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case 0x03: sprintf(mnemonic, "fintrz"); break;
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case 0x04: sprintf(mnemonic, "fsqrt"); break;
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case 0x06: sprintf(mnemonic, "flognp1"); break;
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case 0x08: sprintf(mnemonic, "fetoxm1"); break;
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case 0x09: sprintf(mnemonic, "ftanh1"); break;
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case 0x0a: sprintf(mnemonic, "fatan"); break;
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case 0x0c: sprintf(mnemonic, "fasin"); break;
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case 0x0d: sprintf(mnemonic, "fatanh"); break;
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case 0x0e: sprintf(mnemonic, "fsin"); break;
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case 0x0f: sprintf(mnemonic, "ftan"); break;
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case 0x10: sprintf(mnemonic, "fetox"); break;
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case 0x11: sprintf(mnemonic, "ftwotox"); break;
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case 0x12: sprintf(mnemonic, "ftentox"); break;
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case 0x14: sprintf(mnemonic, "flogn"); break;
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case 0x15: sprintf(mnemonic, "flog10"); break;
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case 0x16: sprintf(mnemonic, "flog2"); break;
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case 0x18: sprintf(mnemonic, "fabs"); break;
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case 0x19: sprintf(mnemonic, "fcosh"); break;
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case 0x1a: sprintf(mnemonic, "fneg"); break;
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case 0x1c: sprintf(mnemonic, "facos"); break;
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case 0x1d: sprintf(mnemonic, "fcos"); break;
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case 0x1e: sprintf(mnemonic, "fgetexp"); break;
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case 0x1f: sprintf(mnemonic, "fgetman"); break;
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case 0x20: sprintf(mnemonic, "fdiv"); break;
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case 0x21: sprintf(mnemonic, "fmod"); break;
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case 0x22: sprintf(mnemonic, "fadd"); break;
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case 0x23: sprintf(mnemonic, "fmul"); break;
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case 0x24: sprintf(mnemonic, "fsgldiv"); break;
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case 0x25: sprintf(mnemonic, "frem"); break;
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case 0x26: sprintf(mnemonic, "fscale"); break;
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case 0x27: sprintf(mnemonic, "fsglmul"); break;
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case 0x28: sprintf(mnemonic, "fsub"); break;
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case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
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sprintf(mnemonic, "fsincos"); break;
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case 0x38: sprintf(mnemonic, "fcmp"); break;
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case 0x3a: sprintf(mnemonic, "ftst"); break;
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case 0x41: sprintf(mnemonic, "fssqrt"); break;
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case 0x45: sprintf(mnemonic, "fdsqrt"); break;
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case 0x58: sprintf(mnemonic, "fsabs"); break;
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case 0x5a: sprintf(mnemonic, "fsneg"); break;
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case 0x5c: sprintf(mnemonic, "fdabs"); break;
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case 0x5e: sprintf(mnemonic, "fdneg"); break;
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case 0x60: sprintf(mnemonic, "fsdiv"); break;
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case 0x62: sprintf(mnemonic, "fsadd"); break;
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case 0x63: sprintf(mnemonic, "fsmul"); break;
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case 0x64: sprintf(mnemonic, "fddiv"); break;
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case 0x66: sprintf(mnemonic, "fdadd"); break;
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case 0x67: sprintf(mnemonic, "fdmul"); break;
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case 0x68: sprintf(mnemonic, "fssub"); break;
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case 0x6c: sprintf(mnemonic, "fdsub"); break;
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default: sprintf(mnemonic, "FPU (?)"); break;
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}
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if (w2 & 0x4000)
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{
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sprintf(g_dasm_str, "%s%s %s, FP%d", mnemonic, float_data_format[src], get_ea_mode_str_32(g_cpu_ir), dst_reg);
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}
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else
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{
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sprintf(g_dasm_str, "%s.x FP%d, FP%d", mnemonic, src, dst_reg);
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}
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break;
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}
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case 0x3:
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{
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sprintf(g_dasm_str, "fmove /todo");
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break;
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}
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case 0x4:
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case 0x5:
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{
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sprintf(g_dasm_str, "fmove /todo");
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break;
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}
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case 0x6:
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case 0x7:
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{
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sprintf(g_dasm_str, "fmovem /todo");
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break;
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}
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default:
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{
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sprintf(g_dasm_str, "FPU (?) ");
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break;
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}
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}
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}
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static void d68000_jmp(void)
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{
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sprintf(g_dasm_str, "jmp %s", get_ea_mode_str_32(g_cpu_ir));
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@ -1923,7 +2040,7 @@ static void d68010_movec(void)
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processor = "?";
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}
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if(BIT_1(g_cpu_ir))
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if(BIT_0(g_cpu_ir))
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sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor);
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else
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sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor);
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@ -3073,6 +3190,7 @@ static opcode_struct g_opcode_info[] =
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{d68020_extb_32 , 0xfff8, 0x49c0, 0x000},
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{d68000_ext_16 , 0xfff8, 0x4880, 0x000},
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{d68000_ext_32 , 0xfff8, 0x48c0, 0x000},
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{d68040_fpu , 0xffc0, 0xf200, 0x000},
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{d68000_illegal , 0xffff, 0x4afc, 0x000},
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{d68000_jmp , 0xffc0, 0x4ec0, 0x27b},
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{d68000_jsr , 0xffc0, 0x4e80, 0x27b},
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@ -3405,13 +3523,12 @@ char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type)
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return buff;
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}
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unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, unsigned char* opdata, unsigned char* argdata, int length, unsigned int cpu_type)
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unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigned char* opdata, const unsigned char* argdata, unsigned int cpu_type)
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{
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unsigned int result;
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g_rawop = opdata;
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g_rawbasepc = pc;
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g_rawlength = length;
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result = m68k_disassemble(str_buff, pc, cpu_type);
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g_rawop = NULL;
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return result;
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@ -3588,6 +3705,27 @@ unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cp
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return 0;
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if(g_instruction_table[instruction] == d68040_pflush)
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return 0;
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case M68K_CPU_TYPE_68040:
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if(g_instruction_table[instruction] == d68020_cpbcc_16)
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return 0;
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if(g_instruction_table[instruction] == d68020_cpbcc_32)
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return 0;
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if(g_instruction_table[instruction] == d68020_cpdbcc)
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return 0;
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if(g_instruction_table[instruction] == d68020_cpgen)
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return 0;
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if(g_instruction_table[instruction] == d68020_cprestore)
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return 0;
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if(g_instruction_table[instruction] == d68020_cpsave)
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return 0;
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if(g_instruction_table[instruction] == d68020_cpscc)
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return 0;
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if(g_instruction_table[instruction] == d68020_cptrapcc_0)
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return 0;
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if(g_instruction_table[instruction] == d68020_cptrapcc_16)
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return 0;
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if(g_instruction_table[instruction] == d68020_cptrapcc_32)
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return 0;
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}
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if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&
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(g_instruction_table[instruction] == d68020_callm ||
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