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sh2 drc, minor optimization for x86 backend
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2 changed files with 7 additions and 7 deletions
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@ -1211,13 +1211,12 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI, // x86-64,i386 common
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} while (0)
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#define emith_sh2_rcall(a, tab, func, mask) do { \
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int scale_ = PTR_SCALE <= 2 ? PTR_SCALE : 2; \
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emith_lsr(mask, a, SH2_READ_SHIFT); \
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if (PTR_SCALE > scale_) emith_lsl(mask, mask, PTR_SCALE-scale_); \
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EMIT_XREX_IF(1, tab, tab, mask); \
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EMIT_OP_MODRM64(0x8d, 0, tab, 4); \
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EMIT_SIB64(PTR_SCALE, mask, tab); /* lea tab, [tab + mask * {4,8}] */ \
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EMIT_XREX_IF(1, tab, tab, mask); \
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EMIT_OP_MODRM64(0x8d, 0, tab, 4); \
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EMIT_SIB64(PTR_SCALE, mask, tab); /* lea tab, [tab + mask * {4,8}] */ \
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EMIT_SIB64(scale_+1, mask, tab); /* lea tab, [tab + mask*(2*scale)] */ \
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EMIT_REX_IF(1, func, tab); \
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emith_deref_modrm(0x8b, 0, func, tab); /* mov func, [tab] */ \
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EMIT_REX_IF(0, mask, tab); \
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@ -50,9 +50,10 @@ u16 scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc,
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#elif defined(__powerpc__) || defined(__ppc__) || defined(__PPC__)
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#define DRC_SR_REG "r28"
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#define DRC_REG_LL 0 // no ABI for __ILP32__
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#elif defined(__i386__)
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#define DRC_SR_REG "edi"
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#define DRC_REG_LL 0 // 32 bit
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//i386 only has 8 registers and reserving one of them causes too much spilling
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//#elif defined(__i386__)
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//#define DRC_SR_REG "edi"
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//#define DRC_REG_LL 0 // 32 bit
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#elif defined(__x86_64__)
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#define DRC_SR_REG "rbx"
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#define DRC_REG_LL (__ILP32__ || _WIN32)
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