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https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
fix incomplete init
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parent
f3d1e1e63f
commit
cd0ace2832
4 changed files with 15 additions and 4 deletions
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@ -17,10 +17,15 @@
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int sh2_init(SH2 *sh2, int is_slave, SH2 *other_sh2)
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{
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int ret = 0;
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unsigned int mult_m68k_to_sh2 = sh2->mult_m68k_to_sh2;
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unsigned int mult_sh2_to_m68k = sh2->mult_sh2_to_m68k;
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memset(sh2, 0, offsetof(SH2, mult_m68k_to_sh2));
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memset(sh2, 0, sizeof(*sh2));
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sh2->is_slave = is_slave;
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sh2->other_sh2 = other_sh2;
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sh2->mult_m68k_to_sh2 = mult_m68k_to_sh2;
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sh2->mult_sh2_to_m68k = mult_sh2_to_m68k;
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pdb_register_cpu(sh2, PDBCT_SH2, is_slave ? "ssh2" : "msh2");
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#ifdef DRC_SH2
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ret = sh2_drc_init(sh2);
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@ -85,9 +85,6 @@ void Pico32xStartup(void)
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if (!Pico.m.pal)
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Pico32x.vdp_regs[0] |= P32XV_nPAL;
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PREG8(msh2.peri_regs, 4) =
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PREG8(ssh2.peri_regs, 4) = 0x84; // SCI SSR
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rendstatus_old = -1;
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emu_32x_startup();
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@ -100,6 +97,8 @@ void p32x_reset_sh2s(void)
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sh2_reset(&msh2);
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sh2_reset(&ssh2);
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sh2_peripheral_reset(&msh2);
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sh2_peripheral_reset(&ssh2);
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// if we don't have BIOS set, perform it's work here.
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// MSH2
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@ -207,6 +207,12 @@ void p32x_timers_do(unsigned int m68k_slice)
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}
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}
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void sh2_peripheral_reset(SH2 *sh2)
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{
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memset(sh2->peri_regs, 0, sizeof(sh2->peri_regs)); // ?
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PREG8(sh2->peri_regs, 4) = 0x84; // SCI SSR
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}
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// ------------------------------------------------------------------
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// SH2 internal peripheral memhandlers
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// we keep them in little endian format
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@ -804,6 +804,7 @@ void p32x_dreq0_trigger(void);
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void p32x_dreq1_trigger(void);
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void p32x_timers_recalc(void);
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void p32x_timers_do(unsigned int m68k_slice);
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void sh2_peripheral_reset(SH2 *sh2);
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unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);
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unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);
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unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);
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