more MAME fixes, some optimization

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@177 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz 2007-06-29 20:44:30 +00:00
parent 2c559c66ef
commit cfb3dfa0f2
10 changed files with 144 additions and 119 deletions

View file

@ -24,7 +24,8 @@ struct Cyclone
unsigned char irq; // [r7,#0x47] IRQ level unsigned char irq; // [r7,#0x47] IRQ level
unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP) unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP)
unsigned int vector; // [r7,#0x4c] IRQ vector (temporary) unsigned int vector; // [r7,#0x4c] IRQ vector (temporary)
unsigned int pad1[2]; unsigned int prev_pc;// [r7,#0x50] set to start address of currently executed opcode (if enabled in config.h)
unsigned int unused; // [r7,#0x54] Unused
int stopped; // [r7,#0x58] 1 == processor is in stopped state int stopped; // [r7,#0x58] 1 == processor is in stopped state
int cycles; // [r7,#0x5c] int cycles; // [r7,#0x5c]
int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address) int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address)

View file

@ -181,7 +181,7 @@ int EaCalc(int a,int mask,int ea,int size,int top)
if (ea<0x30) // ($nn,An) (di) if (ea<0x30) // ($nn,An) (di)
{ {
EaCalcReg(2,8,mask,0,0); EaCalcReg(2,8,mask,0,0);
ot(" ldrsh r0,[r4],#2 ;@ Fetch offset\n"); ot(" ldrsh r0,[r4],#2 ;@ Fetch offset\n"); pc_dirty=1;
ot(" ldr r2,[r7,r2,lsl #2]\n"); ot(" ldr r2,[r7,r2,lsl #2]\n");
ot(" add r%d,r0,r2 ;@ Add on offset\n",a); ot(" add r%d,r0,r2 ;@ Add on offset\n",a);
Cycles+=size<2 ? 8:12; // Extra cycles Cycles+=size<2 ? 8:12; // Extra cycles
@ -191,7 +191,7 @@ int EaCalc(int a,int mask,int ea,int size,int top)
if (ea<0x38) // ($nn,An,Rn) (ix) if (ea<0x38) // ($nn,An,Rn) (ix)
{ {
ot(";@ Get extension word into r3:\n"); ot(";@ Get extension word into r3:\n");
ot(" ldrh r3,[r4],#2 ;@ ($Disp,PC,Rn)\n"); ot(" ldrh r3,[r4],#2 ;@ ($Disp,PC,Rn)\n"); pc_dirty=1;
ot(" mov r2,r3,lsr #10\n"); ot(" mov r2,r3,lsr #10\n");
ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n"); ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");
ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n"); ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n");
@ -209,7 +209,7 @@ int EaCalc(int a,int mask,int ea,int size,int top)
if (ea==0x38) // (aw) if (ea==0x38) // (aw)
{ {
ot(" ldrsh r%d,[r4],#2 ;@ Fetch Absolute Short address\n",a); ot(" ldrsh r%d,[r4],#2 ;@ Fetch Absolute Short address\n",a); pc_dirty=1;
Cycles+=size<2 ? 8:12; // Extra cycles Cycles+=size<2 ? 8:12; // Extra cycles
return 0; return 0;
} }
@ -217,7 +217,7 @@ int EaCalc(int a,int mask,int ea,int size,int top)
if (ea==0x39) // (al) if (ea==0x39) // (al)
{ {
ot(" ldrh r2,[r4],#2 ;@ Fetch Absolute Long address\n"); ot(" ldrh r2,[r4],#2 ;@ Fetch Absolute Long address\n");
ot(" ldrh r0,[r4],#2\n"); ot(" ldrh r0,[r4],#2\n"); pc_dirty=1;
ot(" orr r%d,r0,r2,lsl #16\n",a); ot(" orr r%d,r0,r2,lsl #16\n",a);
Cycles+=size<2 ? 12:16; // Extra cycles Cycles+=size<2 ? 12:16; // Extra cycles
return 0; return 0;
@ -227,7 +227,7 @@ int EaCalc(int a,int mask,int ea,int size,int top)
{ {
ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n"); ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");
ot(" sub r0,r4,r0 ;@ Real PC\n"); ot(" sub r0,r4,r0 ;@ Real PC\n");
ot(" ldrsh r2,[r4],#2 ;@ Fetch extension\n"); ot(" ldrsh r2,[r4],#2 ;@ Fetch extension\n"); pc_dirty=1;
ot(" mov r0,r0,lsl #8\n"); ot(" mov r0,r0,lsl #8\n");
ot(" add r%d,r2,r0,asr #8 ;@ ($nn,PC)\n",a); ot(" add r%d,r2,r0,asr #8 ;@ ($nn,PC)\n",a);
Cycles+=size<2 ? 8:12; // Extra cycles Cycles+=size<2 ? 8:12; // Extra cycles
@ -239,7 +239,7 @@ int EaCalc(int a,int mask,int ea,int size,int top)
ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n"); ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");
ot(" ldrh r3,[r4] ;@ Get extension word\n"); ot(" ldrh r3,[r4] ;@ Get extension word\n");
ot(" sub r0,r4,r0 ;@ r0=PC\n"); ot(" sub r0,r4,r0 ;@ r0=PC\n");
ot(" add r4,r4,#2\n"); ot(" add r4,r4,#2\n"); pc_dirty=1;
ot(" mov r0,r0,asl #8 ;@ use only 24bits of PC\n"); ot(" mov r0,r0,asl #8 ;@ use only 24bits of PC\n");
ot(" mov r2,r3,lsr #10\n"); ot(" mov r2,r3,lsr #10\n");
ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n"); ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");
@ -257,13 +257,13 @@ int EaCalc(int a,int mask,int ea,int size,int top)
{ {
if (size<2) if (size<2)
{ {
ot(" ldr%s r%d,[r4],#2 ;@ Fetch immediate value\n",Sarm[size&3],a); ot(" ldr%s r%d,[r4],#2 ;@ Fetch immediate value\n",Sarm[size&3],a); pc_dirty=1;
Cycles+=4; // Extra cycles Cycles+=4; // Extra cycles
return 0; return 0;
} }
ot(" ldrh r2,[r4],#2 ;@ Fetch immediate value\n"); ot(" ldrh r2,[r4],#2 ;@ Fetch immediate value\n");
ot(" ldrh r0,[r4],#2\n"); ot(" ldrh r0,[r4],#2\n"); pc_dirty=1;
ot(" orr r%d,r0,r2,lsl #16\n",a); ot(" orr r%d,r0,r2,lsl #16\n",a);
Cycles+=8; // Extra cycles Cycles+=8; // Extra cycles
return 0; return 0;
@ -320,10 +320,8 @@ int EaRead(int a,int v,int ea,int size,int mask,int top)
ot("\n"); return 0; ot("\n"); return 0;
} }
if (a!=0) ot(" mov r0,r%d\n",a); if (ea>=0x3a && ea<=0x3b) MemHandler(2,size,a); // Fetch
else MemHandler(0,size,a); // Read
if (ea>=0x3a && ea<=0x3b) MemHandler(2,size); // Fetch
else MemHandler(0,size); // Read
if (v!=0 || shift) { if (v!=0 || shift) {
if (shift) ot(" mov r%d,r0,asl #%d\n",v,shift); if (shift) ot(" mov r%d,r0,asl #%d\n",v,shift);
@ -388,11 +386,9 @@ int EaWrite(int a,int v,int ea,int size,int mask,int top)
if (ea==0x3c) { ot("Error! Write EA=0x%x\n\n",ea); return 1; } if (ea==0x3c) { ot("Error! Write EA=0x%x\n\n",ea); return 1; }
if (a!=0 && v!=0) ot(" mov r0,r%d\n",a);
if (v!=1 || shift) ot(" mov r1,r%d,asr #%d\n",v,shift); if (v!=1 || shift) ot(" mov r1,r%d,asr #%d\n",v,shift);
if (a!=0 && v==0) ot(" mov r0,r%d\n",a);
MemHandler(1,size); // Call write handler MemHandler(1,size,a); // Call write handler
ot("\n"); return 0; ot("\n"); return 0;
} }

View file

@ -3,12 +3,13 @@
static FILE *AsmFile=NULL; static FILE *AsmFile=NULL;
static int CycloneVer=0x0086; // Version number of library static int CycloneVer=0x0087; // Version number of library
int *CyJump=NULL; // Jump table int *CyJump=NULL; // Jump table
int ms=USE_MS_SYNTAX; // If non-zero, output in Microsoft ARMASM format int ms=USE_MS_SYNTAX; // If non-zero, output in Microsoft ARMASM format
char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2 char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2
char *Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2 char *Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2
int Cycles; // Current cycles for opcode int Cycles; // Current cycles for opcode
int pc_dirty; // something changed PC during processing
void ot(const char *format, ...) void ot(const char *format, ...)
@ -142,6 +143,15 @@ void CheckInterrupt(int op)
ot("\n"); ot("\n");
} }
void FlushPC(void)
{
#if MEMHANDLERS_NEED_PC
if (pc_dirty)
ot(" str r4,[r7,#0x40] ;@ Save PC\n");
#endif
pc_dirty = 0;
}
static void PrintFramework() static void PrintFramework()
{ {
ot(";@ --------------------------- Framework --------------------------\n"); ot(";@ --------------------------- Framework --------------------------\n");
@ -367,7 +377,6 @@ static void PrintFramework()
ot("\n"); ot("\n");
ot("Exception%s\n", ms?"":":"); ot("Exception%s\n", ms?"":":");
ot("\n");
ot(" stmdb sp!,{lr} ;@ Preserve ARM return address\n"); ot(" stmdb sp!,{lr} ;@ Preserve ARM return address\n");
PrintException(0); PrintException(0);
ot(" ldmia sp!,{pc} ;@ Return\n"); ot(" ldmia sp!,{pc} ;@ Return\n");
@ -377,7 +386,7 @@ static void PrintFramework()
// --------------------------------------------------------------------------- // ---------------------------------------------------------------------------
// Call Read(r0), Write(r0,r1) or Fetch(r0) // Call Read(r0), Write(r0,r1) or Fetch(r0)
// Trashes r0-r3,r12,lr // Trashes r0-r3,r12,lr
int MemHandler(int type,int size) int MemHandler(int type,int size,int addrreg)
{ {
int func=0; int func=0;
func=0x68+type*0xc+(size<<2); // Find correct offset func=0x68+type*0xc+(size<<2); // Find correct offset
@ -386,19 +395,26 @@ int MemHandler(int type,int size)
ot(" mov r3,r9,lsr #28\n"); ot(" mov r3,r9,lsr #28\n");
ot(" strb r3,[r7,#0x46] ;@ Save Flags (NZCV)\n"); ot(" strb r3,[r7,#0x46] ;@ Save Flags (NZCV)\n");
#endif #endif
FlushPC();
#if (MEMHANDLERS_ADDR_MASK & 0xff000000) #if (MEMHANDLERS_ADDR_MASK & 0xff000000)
ot(" bic r0,r0,#0x%08x\n", MEMHANDLERS_ADDR_MASK & 0xff000000); ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0xff000000);
addrreg=0;
#endif #endif
#if (MEMHANDLERS_ADDR_MASK & 0x00ff0000) #if (MEMHANDLERS_ADDR_MASK & 0x00ff0000)
ot(" bic r0,r0,#0x%08x\n", MEMHANDLERS_ADDR_MASK & 0x00ff0000); ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x00ff0000);
addrreg=0;
#endif #endif
#if (MEMHANDLERS_ADDR_MASK & 0x0000ff00) #if (MEMHANDLERS_ADDR_MASK & 0x0000ff00)
ot(" bic r0,r0,#0x%08x\n", MEMHANDLERS_ADDR_MASK & 0x0000ff00); ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x0000ff00);
addrreg=0;
#endif #endif
#if (MEMHANDLERS_ADDR_MASK & 0x000000ff) #if (MEMHANDLERS_ADDR_MASK & 0x000000ff)
ot(" bic r0,r0,#0x%08x\n", MEMHANDLERS_ADDR_MASK & 0x000000ff); ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x000000ff);
addrreg=0;
#endif #endif
if (addrreg != 0)
ot(" mov r0,r%i\n", addrreg);
ot(" mov lr,pc\n"); ot(" mov lr,pc\n");
ot(" ldr pc,[r7,#0x%x] ;@ Call ",func); ot(" ldr pc,[r7,#0x%x] ;@ Call ",func);
@ -411,9 +427,6 @@ int MemHandler(int type,int size)
else ot("%d(r0)", 8<<size); else ot("%d(r0)", 8<<size);
ot(" handler\n"); ot(" handler\n");
#if MEMHANDLERS_CHANGE_CYCLES
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
#endif
#if MEMHANDLERS_CHANGE_FLAGS #if MEMHANDLERS_CHANGE_FLAGS
ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n"); ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
ot(" mov r9,r9,lsl #28\n"); ot(" mov r9,r9,lsl #28\n");

View file

@ -25,16 +25,16 @@ void OpUse(int op,int use)
ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use); ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use);
} }
void OpStart(int op, int ea) void OpStart(int op, int sea, int tea)
{ {
Cycles=0; Cycles=0;
OpUse(op,op); // This opcode obviously uses this handler OpUse(op,op); // This opcode obviously uses this handler
ot("Op%.4x%s\n", op, ms?"":":"); ot("Op%.4x%s\n", op, ms?"":":");
#if (MEMHANDLERS_NEED_PC || MEMHANDLERS_NEED_CYCLES) #if (MEMHANDLERS_NEED_PREV_PC || MEMHANDLERS_NEED_CYCLES)
if (ea >= 0x10 && ea != 0x3c) { if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c)) {
#if MEMHANDLERS_NEED_PC #if MEMHANDLERS_NEED_PREV_PC
ot(" sub r0,r4,#2\n"); ot(" sub r0,r4,#2\n");
ot(" str r0,[r7,#0x40] ;@ Save PC\n"); ot(" str r0,[r7,#0x50] ;@ Save prev PC\n");
#endif #endif
#if MEMHANDLERS_NEED_CYCLES #if MEMHANDLERS_NEED_CYCLES
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n"); ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
@ -42,10 +42,15 @@ void OpStart(int op, int ea)
ot("\n"); ot("\n");
} }
#endif #endif
pc_dirty = 1;
} }
void OpEnd() void OpEnd(int sea, int tea)
{ {
#if MEMHANDLERS_CHANGE_CYCLES
if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
#endif
ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n"); ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");
ot(" subs r5,r5,#%d ;@ Subtract cycles\n",Cycles); ot(" subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);
ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n"); ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");

View file

@ -22,12 +22,11 @@ int OpArith(int op)
use=OpBase(op); use=OpBase(op);
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
OpStart(op, sea|tea); Cycles=4; OpStart(op, sea, tea); Cycles=4;
EaCalc(10,0x0000, sea,size,1); EaCalc(10,0x0000, sea,size,1);
EaRead(10, 10, sea,size,0,1);
EaCalc(11,0x003f, tea,size,1); EaCalc(11,0x003f, tea,size,1);
EaRead(10, 10, sea,size,0,1);
EaRead(11, 0, tea,size,0x003f,1); EaRead(11, 0, tea,size,0x003f,1);
ot(";@ Do arithmetic:\n"); ot(";@ Do arithmetic:\n");
@ -65,7 +64,7 @@ int OpArith(int op)
if (type==1 && size>=2 && tea<8) Cycles-=2; if (type==1 && size>=2 && tea<8) Cycles-=2;
} }
OpEnd(); OpEnd(sea,tea);
return 0; return 0;
} }
@ -128,7 +127,7 @@ int OpAddq(int op)
EaWrite(10, 1, ea,size,0x003f,1); EaWrite(10, 1, ea,size,0x003f,1);
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -195,7 +194,7 @@ int OpArithReg(int op)
} }
} }
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -328,13 +327,13 @@ int OpMul(int op)
EaWrite(0, 1,rea, 2,0x0e00,1); EaWrite(0, 1,rea, 2,0x0e00,1);
ot("endofop%.4x%s\n",op,ms?"":":"); ot("endofop%.4x%s\n",op,ms?"":":");
OpEnd(); OpEnd(ea);
ot("divzero%.4x%s\n",op,ms?"":":"); ot("divzero%.4x%s\n",op,ms?"":":");
ot(" mov r0,#0x14 ;@ Divide by zero\n"); ot(" mov r0,#0x14 ;@ Divide by zero\n");
ot(" bl Exception\n"); ot(" bl Exception\n");
Cycles+=38; Cycles+=38;
OpEnd(); OpEnd(ea);
ot("\n"); ot("\n");
return 0; return 0;
@ -370,7 +369,7 @@ int OpAbcd(int op)
if (sea==0x27||dea==0x27) use=op; // ..except -(a7) if (sea==0x27||dea==0x27) use=op; // ..except -(a7)
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
OpStart(op,sea|dea); Cycles=6; OpStart(op,sea,dea); Cycles=6;
EaCalc( 0,0x0007, sea,0,1); EaCalc( 0,0x0007, sea,0,1);
EaRead( 0, 10, sea,0,0x0007,1); EaRead( 0, 10, sea,0,0x0007,1);
@ -438,7 +437,7 @@ int OpAbcd(int op)
ot(" strb r2,[r7,#0x45] ;@ Save X bit\n"); ot(" strb r2,[r7,#0x45] ;@ Save X bit\n");
EaWrite(11, 0, dea,0,0x0e00,1); EaWrite(11, 0, dea,0,0x0e00,1);
OpEnd(); OpEnd(sea,dea);
return 0; return 0;
} }
@ -493,7 +492,7 @@ int OpNbcd(int op)
ot(" mov r2,r9,lsr #28\n"); ot(" mov r2,r9,lsr #28\n");
ot(" strb r2, [r7,#0x45]\n"); ot(" strb r2, [r7,#0x45]\n");
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -538,7 +537,7 @@ int OpAritha(int op)
if (type!=1) EaWrite( 0, 1, dea,2,0x0e00,1); if (type!=1) EaWrite( 0, 1, dea,2,0x0e00,1);
OpEnd(); OpEnd(sea);
return 0; return 0;
} }
@ -566,7 +565,7 @@ int OpAddx(int op)
if (size==0&&(sea==0x27||dea==0x27)) use=op; // ___x.b -(a7) if (size==0&&(sea==0x27||dea==0x27)) use=op; // ___x.b -(a7)
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
OpStart(op,sea|dea); Cycles=4; OpStart(op,sea,dea); Cycles=4;
if(size>=2) Cycles+=4; if(size>=2) Cycles+=4;
if(sea>=0x10) Cycles+=2; if(sea>=0x10) Cycles+=2;
@ -602,7 +601,7 @@ int OpAddx(int op)
ot(";@ Save result:\n"); ot(";@ Save result:\n");
EaWrite( 0, 1, dea,size,0x0e00,1); EaWrite( 0, 1, dea,size,0x0e00,1);
OpEnd(); OpEnd(sea,dea);
return 0; return 0;
} }
@ -660,7 +659,7 @@ int OpCmpEor(int op)
if (eor) EaWrite(10, 1,ea,size,0x003f,1); if (eor) EaWrite(10, 1,ea,size,0x003f,1);
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -691,7 +690,7 @@ int OpCmpm(int op)
ot(" cmp r0,r10\n"); ot(" cmp r0,r10\n");
OpGetFlags(1,0); // Cmp like subtract OpGetFlags(1,0); // Cmp like subtract
OpEnd(); OpEnd(sea);
return 0; return 0;
} }
@ -745,13 +744,13 @@ int OpChk(int op)
ot(";@ old N remains\n"); ot(";@ old N remains\n");
ot(" bic r9,r9,#0x80000000 ;@ N\n"); ot(" bic r9,r9,#0x80000000 ;@ N\n");
ot(" orr r9,r9,r3\n"); ot(" orr r9,r9,r3\n");
OpEnd(); OpEnd(ea);
ot("chktrap%.4x%s ;@ CHK exception:\n",op,ms?"":":"); ot("chktrap%.4x%s ;@ CHK exception:\n",op,ms?"":":");
ot(" mov r0,#0x18\n"); ot(" mov r0,#0x18\n");
ot(" bl Exception\n"); ot(" bl Exception\n");
Cycles+=40; Cycles+=40;
OpEnd(); OpEnd(ea);
return 0; return 0;
} }

View file

@ -1,17 +1,21 @@
#include "app.h" #include "app.h"
#if USE_CHECKPC_CALLBACK static void CheckPc(int reg)
static void CheckPc()
{ {
#if USE_CHECKPC_CALLBACK
ot(";@ Check Memory Base+pc (r4)\n"); ot(";@ Check Memory Base+pc (r4)\n");
ot(" add lr,pc,#4\n"); if (reg != 0)
ot(" mov r0,r4\n"); ot(" mov r0,r%i\n", reg);
ot(" mov lr,pc\n");
ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n"); ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");
ot(" mov r4,r0\n"); ot(" mov r4,r0\n");
#else
if (reg != 4)
ot(" mov r4,r%i\n", reg);
#endif
ot("\n"); ot("\n");
} }
#endif
// Push 32-bit value in r1 - trashes r0-r3,r12,lr // Push 32-bit value in r1 - trashes r0-r3,r12,lr
void OpPush32() void OpPush32()
@ -56,11 +60,9 @@ static void PopPc()
ot(" add r1,r0,#4 ;@ Postincrement A7\n"); ot(" add r1,r0,#4 ;@ Postincrement A7\n");
ot(" str r1,[r7,#0x3c] ;@ Save A7\n"); ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
MemHandler(0,2); MemHandler(0,2);
ot(" add r4,r0,r10 ;@ r4=Memory Base+PC\n"); ot(" add r0,r0,r10 ;@ Memory Base+PC\n");
ot("\n"); ot("\n");
#if USE_CHECKPC_CALLBACK CheckPc(0);
CheckPc();
#endif
} }
int OpTrap(int op) int OpTrap(int op)
@ -77,7 +79,7 @@ int OpTrap(int op)
ot(" bl Exception\n"); ot(" bl Exception\n");
ot("\n"); ot("\n");
Cycles=38; OpEnd(); Cycles=38; OpEnd(0x10);
return 0; return 0;
} }
@ -122,7 +124,7 @@ int OpLink(int op)
ot("\n"); ot("\n");
Cycles=16; Cycles=16;
OpEnd(); OpEnd(0x10);
return 0; return 0;
} }
@ -151,7 +153,7 @@ int OpUnlk(int op)
EaWrite(10, 0, 8, 2, 7, 1); EaWrite(10, 0, 8, 2, 7, 1);
Cycles=12; Cycles=12;
OpEnd(); OpEnd(0x10);
return 0; return 0;
} }
@ -178,7 +180,7 @@ int Op4E70(int op)
PopPc(); PopPc();
SuperChange(op); SuperChange(op);
CheckInterrupt(op); CheckInterrupt(op);
OpEnd(); OpEnd(0x10);
SuperEnd(op); SuperEnd(op);
return 0; return 0;
@ -186,7 +188,7 @@ int Op4E70(int op)
OpStart(op,0x10); Cycles=16; OpStart(op,0x10); Cycles=16;
ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n"); ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
PopPc(); PopPc();
OpEnd(); OpEnd(0x10);
return 0; return 0;
case 6: // trapv case 6: // trapv
@ -195,7 +197,7 @@ int Op4E70(int op)
ot(" subne r5,r5,#%i\n",30); ot(" subne r5,r5,#%i\n",30);
ot(" movne r0,#0x1c ;@ TRAPV exception\n"); ot(" movne r0,#0x1c ;@ TRAPV exception\n");
ot(" blne Exception\n"); ot(" blne Exception\n");
OpEnd(); OpEnd(0x10);
return 0; return 0;
case 7: // rtr case 7: // rtr
@ -203,7 +205,7 @@ int Op4E70(int op)
PopSr(0); PopSr(0);
ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n"); ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
PopPc(); PopPc();
OpEnd(); OpEnd(0x10);
return 0; return 0;
default: default:
@ -226,24 +228,23 @@ int OpJsr(int op)
use=OpBase(op); use=OpBase(op);
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
OpStart(op,0x10); OpStart(op,(op&0x40)?0:0x10);
ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n"); ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
ot("\n"); ot("\n");
EaCalc(0,0x003f,sea,0); EaCalc(11,0x003f,sea,0);
ot(";@ Jump - Get new PC from r0\n"); ot(";@ Jump - Get new PC from r0\n");
if (op&0x40) if (op&0x40)
{ {
// Jmp - Get new PC from r0 // Jmp - Get new PC from r0
ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n"); ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");
ot("\n"); ot("\n");
} }
else else
{ {
ot(";@ Jsr - Push old PC first\n"); ot(";@ Jsr - Push old PC first\n");
ot(" sub r1,r4,r10 ;@ r1 = Old PC\n"); ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");
ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");
ot(" mov r1,r1,lsl #8\n"); ot(" mov r1,r1,lsl #8\n");
ot(" ldr r0,[r7,#0x3c]\n"); ot(" ldr r0,[r7,#0x3c]\n");
ot(" mov r1,r1,asr #8\n"); ot(" mov r1,r1,asr #8\n");
@ -251,17 +252,16 @@ int OpJsr(int op)
ot(" sub r0,r0,#4 ;@ Predecrement A7\n"); ot(" sub r0,r0,#4 ;@ Predecrement A7\n");
ot(" str r0,[r7,#0x3c] ;@ Save A7\n"); ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
MemHandler(1,2); MemHandler(1,2);
ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");
ot("\n"); ot("\n");
} }
#if USE_CHECKPC_CALLBACK CheckPc(0);
CheckPc();
#endif
Cycles=(op&0x40) ? 4 : 12; Cycles=(op&0x40) ? 4 : 12;
Cycles+=Ea_add_ns((op&0x40) ? g_jmp_cycle_table : g_jsr_cycle_table, sea); Cycles+=Ea_add_ns((op&0x40) ? g_jmp_cycle_table : g_jsr_cycle_table, sea);
OpEnd(); OpEnd((op&0x40)?0:0x10);
return 0; return 0;
} }
@ -362,12 +362,12 @@ int OpBranch(int op)
EaCalc(0,0,0x3c,size); EaCalc(0,0,0x3c,size);
EaRead(0,0,0x3c,size,0); EaRead(0,0,0x3c,size,0);
} }
else
ot(" mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");
// above code messes cycles // above code messes cycles
Cycles=10; // Assume branch taken Cycles=10; // Assume branch taken
if (size==0) ot(" mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");
if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n"); if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
if (cc>=2) if (cc>=2)
@ -377,16 +377,11 @@ int OpBranch(int op)
ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n"); ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n"); if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n");
if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");
ot(" b%s DontBranch%.4x\n",Cond[cc^1],op); ot(" b%s DontBranch%.4x\n",Cond[cc^1],op);
ot("\n"); ot("\n");
} }
else
{ if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");
if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");
}
ot(";@ Branch taken - Add on r0 to PC\n"); ot(";@ Branch taken - Add on r0 to PC\n");
@ -406,29 +401,36 @@ int OpBranch(int op)
MemHandler(1,2); MemHandler(1,2);
ot("\n"); ot("\n");
Cycles=18; // always 18 Cycles=18; // always 18
if (offset==0 || offset==-1)
{
ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
CheckPc(4);
}
} }
else else
{ {
if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size); if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
ot(" add r4,r4,r0 ;@ r4 = New PC\n"); if (offset==0 || offset==-1)
ot("\n"); {
ot(" add r0,r4,r0 ;@ r4 = New PC\n");
ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
CheckPc(0);
}
else
{
ot(" add r4,r4,r0 ;@ r4 = New PC\n");
ot("\n");
}
} }
#if USE_CHECKPC_CALLBACK
if (offset==0 || offset==-1)
{
ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
CheckPc();
}
#endif
OpEnd(); OpEnd(size?0x10:0);
if (cc>=2) if (cc>=2)
{ {
ot("DontBranch%.4x%s\n", op, ms?"":":"); ot("DontBranch%.4x%s\n", op, ms?"":":");
Cycles+=(size==1)? 2 : -2; // Branch not taken Cycles+=(size==1)? 2 : -2; // Branch not taken
OpEnd(); OpEnd(size?0x10:0);
} }
return 0; return 0;

View file

@ -59,7 +59,7 @@ int OpBtstReg(int op)
ot("\n"); ot("\n");
EaWrite(11, 1,tea,size,0x003f); EaWrite(11, 1,tea,size,0x003f);
} }
OpEnd(); OpEnd(tea);
return 0; return 0;
} }
@ -88,7 +88,7 @@ int OpBtstImm(int op)
use=OpBase(op); use=OpBase(op);
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
OpStart(op,sea|tea); OpStart(op,sea,tea);
ot(" mov r10,#1\n"); ot(" mov r10,#1\n");
ot("\n"); ot("\n");
@ -123,7 +123,7 @@ int OpBtstImm(int op)
EaWrite(11, 1,tea,size,0x003f); EaWrite(11, 1,tea,size,0x003f);
} }
OpEnd(); OpEnd(sea,tea);
return 0; return 0;
} }
@ -206,7 +206,7 @@ int OpNeg(int op)
EaWrite(10, 1,ea,size,0x003f); EaWrite(10, 1,ea,size,0x003f);
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -263,7 +263,7 @@ int OpTst(int op)
ot(" mrs r9,cpsr ;@ r9=flags\n"); ot(" mrs r9,cpsr ;@ r9=flags\n");
ot("\n"); ot("\n");
OpEnd(); OpEnd(sea);
return 0; return 0;
} }
@ -342,7 +342,7 @@ int OpSet(int op)
EaCalc (0,0x003f, ea,size); EaCalc (0,0x003f, ea,size);
EaWrite(0, 1, ea,size,0x003f); EaWrite(0, 1, ea,size,0x003f);
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -628,7 +628,7 @@ int OpAsrEa(int op)
EaWrite(10, 0,ea,size,0x003f,1); EaWrite(10, 0,ea,size,0x003f,1);
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -670,7 +670,7 @@ int OpTas(int op, int gen_special)
} }
#endif #endif
OpEnd(); OpEnd(ea);
#if (CYCLONE_FOR_GENESIS == 2) #if (CYCLONE_FOR_GENESIS == 2)
if (!gen_special && ea >= 0x10) { if (!gen_special && ea >= 0x10) {

View file

@ -56,7 +56,7 @@ void SuperEnd(int op)
ot(" mov r0,#0x20 ;@ privilege violation\n"); ot(" mov r0,#0x20 ;@ privilege violation\n");
ot(" bl Exception\n"); ot(" bl Exception\n");
Cycles=34; Cycles=34;
OpEnd(); OpEnd(0x10);
} }
// does OSP and A7 swapping if needed // does OSP and A7 swapping if needed
@ -117,7 +117,7 @@ int OpMove(int op)
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
OpStart(op,sea|tea); Cycles=4; OpStart(op,sea,tea); Cycles=4;
EaCalc(0,0x003f,sea,size); EaCalc(0,0x003f,sea,size);
EaRead(0, 1,sea,size,0x003f); EaRead(0, 1,sea,size,0x003f);
@ -153,7 +153,7 @@ int OpMove(int op)
if((tea&0x38)==0x20) Cycles-=2; // less cycles when dest is -(An) if((tea&0x38)==0x20) Cycles-=2; // less cycles when dest is -(An)
OpEnd(); OpEnd(sea,tea);
return 0; return 0;
} }
@ -173,7 +173,7 @@ int OpLea(int op)
use&=~0x0e00; // Also use 1 handler for target ?0-7 use&=~0x0e00; // Also use 1 handler for target ?0-7
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
OpStart(op,sea|tea); OpStart(op,sea,tea);
EaCalc (1,0x003f,sea,0); // Lea EaCalc (1,0x003f,sea,0); // Lea
EaCalc (0,0x0e00,tea,2,1); EaCalc (0,0x0e00,tea,2,1);
@ -181,7 +181,7 @@ int OpLea(int op)
Cycles=Ea_add_ns(g_lea_cycle_table,sea); Cycles=Ea_add_ns(g_lea_cycle_table,sea);
OpEnd(); OpEnd(sea,tea);
return 0; return 0;
} }
@ -239,7 +239,7 @@ int OpMoveSr(int op)
} }
} }
OpEnd(); OpEnd(ea);
if (type==3) SuperEnd(op); if (type==3) SuperEnd(op);
@ -277,7 +277,7 @@ int OpArithSr(int op)
CheckInterrupt(op); CheckInterrupt(op);
} }
OpEnd(); OpEnd(ea);
if (size) SuperEnd(op); if (size) SuperEnd(op);
return 0; return 0;
@ -309,7 +309,7 @@ int OpPea(int op)
Cycles=6+Ea_add_ns(g_pea_cycle_table,ea); Cycles=6+Ea_add_ns(g_pea_cycle_table,ea);
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -404,7 +404,7 @@ int OpMovem(int op)
Cycles+=Ea_add_ns(g_movem_cycle_table,ea); Cycles+=Ea_add_ns(g_movem_cycle_table,ea);
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -560,7 +560,7 @@ int OpMovep(int op)
} }
Cycles=(size==2)?24:16; Cycles=(size==2)?24:16;
OpEnd(); OpEnd(ea);
return 0; return 0;
} }
@ -614,3 +614,4 @@ int OpStopReset(int op)
return 0; return 0;
} }

View file

@ -24,21 +24,23 @@ int EaCanWrite(int ea);
int EaAn(int ea); int EaAn(int ea);
// Main.cpp // Main.cpp
extern int *CyJump; // Jump table extern int *CyJump; // Jump table
extern int ms; // If non-zero, output in Microsoft ARMASM format extern int ms; // If non-zero, output in Microsoft ARMASM format
extern char *Narm[4]; // Normal ARM Extensions for operand sizes 0,1,2 extern char *Narm[4]; // Normal ARM Extensions for operand sizes 0,1,2
extern char *Sarm[4]; // Sign-extend ARM Extensions for operand sizes 0,1,2 extern char *Sarm[4]; // Sign-extend ARM Extensions for operand sizes 0,1,2
extern int Cycles; // Current cycles for opcode extern int Cycles; // Current cycles for opcode
extern int pc_dirty; // something changed PC during processing
void ot(const char *format, ...); void ot(const char *format, ...);
void ltorg(); void ltorg();
void CheckInterrupt(int op); void CheckInterrupt(int op);
int MemHandler(int type,int size); int MemHandler(int type,int size,int addrreg=0);
void FlushPC(void);
// OpAny.cpp // OpAny.cpp
int OpGetFlags(int subtract,int xbit,int sprecialz=0); int OpGetFlags(int subtract,int xbit,int sprecialz=0);
void OpUse(int op,int use); void OpUse(int op,int use);
void OpStart(int op,int ea=0); void OpStart(int op,int sea=0,int tea=0);
void OpEnd(); void OpEnd(int sea=0,int tea=0);
int OpBase(int op,int sepa=0); int OpBase(int op,int sepa=0);
void OpAny(int op); void OpAny(int op);

View file

@ -42,12 +42,18 @@
* count in ARM registers instead of the context for performance reasons. If you for * count in ARM registers instead of the context for performance reasons. If you for
* any reason need to access them in your memory handlers, enable the options below, * any reason need to access them in your memory handlers, enable the options below,
* otherwise disable them to improve performance. * otherwise disable them to improve performance.
* PC value will point to start of instruction currently executed. * MEMHANDLERS_NEED_PC updates .pc context field with PC value effective at the time
* when memhandler was called (opcode address + unknown amount).
* MEMHANDLERS_NEED_PREV_PC updates .prev_pc context field to currently executed
* opcode address.
* Note that .pc and .prev_pc values are always real pointers to memory, so you must
* subtract .membase to get M68k PC value.
* Warning: updating PC in memhandlers is dangerous, as Cyclone may internally * Warning: updating PC in memhandlers is dangerous, as Cyclone may internally
* increment the PC before fetching the next instruction and continue executing * increment the PC before fetching the next instruction and continue executing
* at wrong location. * at wrong location.
*/ */
#define MEMHANDLERS_NEED_PC 0 #define MEMHANDLERS_NEED_PC 0
#define MEMHANDLERS_NEED_PREV_PC 0
#define MEMHANDLERS_NEED_FLAGS 0 #define MEMHANDLERS_NEED_FLAGS 0
#define MEMHANDLERS_NEED_CYCLES 1 #define MEMHANDLERS_NEED_CYCLES 1
#define MEMHANDLERS_CHANGE_PC 0 #define MEMHANDLERS_CHANGE_PC 0