mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
sound, improve ym2612 accuracy (NB noticeably slower for low bitrates)
This commit is contained in:
kub
parent
c3fcdf3f8d
commit
d127b3f3d5
3 changed files with 361 additions and 438 deletions
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@ -8,7 +8,6 @@
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**
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** updated with fixes from mame 0.216 (file version 1.5.1) (kub)
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** SSG-EG readded from GenPlus (kub)
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** linear sample interpolation for chip to output rate adaption (kub)
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*/
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/*
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@ -909,7 +908,7 @@ typedef struct
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UINT32 eg_timer;
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UINT32 eg_timer_add;
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UINT32 pack; // 4c: stereo, lastchan, disabled, lfo_enabled | pan_r, pan_l, ams[2] | AMmasks[4] | FB[4] | lfo_ampm[16]
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UINT32 algo; /* 50: algo[3], was_update */
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UINT32 algo; /* 50: algo[3], was_update, unsued, upd_cnt[2], dac */
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INT32 op1_out;
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#ifdef _MIPS_ARCH_ALLEGREX
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UINT32 pad1[3+8];
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@ -921,10 +920,211 @@ typedef struct
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#include <limits.h>
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static int clip(int n)
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{
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unsigned b = 14, s = n < 0;
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int m = s + INT_MAX;
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if (s + (n>>(b-1))) n = m >> (8*sizeof(int)-b);
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return n;
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unsigned b = 14, s = n < 0;
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int m = s + INT_MAX;
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if (s + (n>>(b-1))) n = m >> (8*sizeof(int)-b);
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return n;
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}
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static void update_ssg_eg_channel(chan_rend_context *ct)
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{
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FM_SLOT *SLOT;
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SLOT = &ct->CH->SLOT[SLOT1];
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if ((SLOT->ssg&0x08) && SLOT->state > EG_REL && SLOT->volume >= 0x200)
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ct->phase1 = update_ssg_eg_phase(SLOT, ct->phase1);
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SLOT = &ct->CH->SLOT[SLOT2];
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if ((SLOT->ssg&0x08) && SLOT->state > EG_REL && SLOT->volume >= 0x200)
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ct->phase2 = update_ssg_eg_phase(SLOT, ct->phase2);
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SLOT = &ct->CH->SLOT[SLOT3];
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if ((SLOT->ssg&0x08) && SLOT->state > EG_REL && SLOT->volume >= 0x200)
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ct->phase3 = update_ssg_eg_phase(SLOT, ct->phase3);
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SLOT = &ct->CH->SLOT[SLOT4];
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if ((SLOT->ssg&0x08) && SLOT->state > EG_REL && SLOT->volume >= 0x200)
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ct->phase4 = update_ssg_eg_phase(SLOT, ct->phase4);
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}
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static void update_eg_phase_channel(chan_rend_context *ct)
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{
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FM_SLOT *SLOT;
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SLOT = &ct->CH->SLOT[SLOT1];
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if (SLOT->state != EG_OFF) update_eg_phase(SLOT, ct->eg_cnt, ct->pack & 2);
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SLOT = &ct->CH->SLOT[SLOT2];
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if (SLOT->state != EG_OFF) update_eg_phase(SLOT, ct->eg_cnt, ct->pack & 2);
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SLOT = &ct->CH->SLOT[SLOT3];
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if (SLOT->state != EG_OFF) update_eg_phase(SLOT, ct->eg_cnt, ct->pack & 2);
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SLOT = &ct->CH->SLOT[SLOT4];
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if (SLOT->state != EG_OFF) update_eg_phase(SLOT, ct->eg_cnt, ct->pack & 2);
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}
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static int update_algo_channel(chan_rend_context *ct, unsigned int eg_out, unsigned int eg_out2, unsigned int eg_out4)
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{
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int m2,c1,c2=0; /* Phase Modulation input for operators 2,3,4 */
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int smp = 0;
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switch( ct->algo&0x7 )
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{
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case 0:
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{
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/* M1---C1---MEM---M2---C2---OUT */
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m2 = ct->mem;
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c1 = ct->op1_out>>16;
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if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
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ct->mem = op_calc(ct->phase2, eg_out2, c1);
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}
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else ct->mem = 0;
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if (ct->eg_timer >= (1<<EG_SH)) break;
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if( eg_out < ENV_QUIET ) { /* SLOT 3 */
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c2 = op_calc(ct->phase3, eg_out, m2);
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}
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if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
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smp = op_calc(ct->phase4, eg_out4, c2);
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}
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break;
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}
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case 1:
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{
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/* M1------+-MEM---M2---C2---OUT */
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/* C1-+ */
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m2 = ct->mem;
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ct->mem = ct->op1_out>>16;
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if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
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ct->mem+= op_calc(ct->phase2, eg_out2, 0);
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}
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if (ct->eg_timer >= (1<<EG_SH)) break;
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if( eg_out < ENV_QUIET ) { /* SLOT 3 */
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c2 = op_calc(ct->phase3, eg_out, m2);
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}
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if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
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smp = op_calc(ct->phase4, eg_out4, c2);
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}
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break;
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}
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case 2:
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{
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/* M1-----------------+-C2---OUT */
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/* C1---MEM---M2-+ */
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m2 = ct->mem;
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c2 = ct->op1_out>>16;
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if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
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ct->mem = op_calc(ct->phase2, eg_out2, 0);
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}
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else ct->mem = 0;
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if (ct->eg_timer >= (1<<EG_SH)) break;
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if( eg_out < ENV_QUIET ) { /* SLOT 3 */
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c2 += op_calc(ct->phase3, eg_out, m2);
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}
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if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
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smp = op_calc(ct->phase4, eg_out4, c2);
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}
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break;
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}
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case 3:
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{
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/* M1---C1---MEM------+-C2---OUT */
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/* M2-+ */
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c2 = ct->mem;
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c1 = ct->op1_out>>16;
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if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
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ct->mem = op_calc(ct->phase2, eg_out2, c1);
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}
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else ct->mem = 0;
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if (ct->eg_timer >= (1<<EG_SH)) break;
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if( eg_out < ENV_QUIET ) { /* SLOT 3 */
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c2 += op_calc(ct->phase3, eg_out, 0);
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}
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if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
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smp = op_calc(ct->phase4, eg_out4, c2);
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}
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break;
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}
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case 4:
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{
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/* M1---C1-+-OUT */
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/* M2---C2-+ */
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/* MEM: not used */
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if (ct->eg_timer >= (1<<EG_SH)) break;
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c1 = ct->op1_out>>16;
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if( eg_out < ENV_QUIET ) { /* SLOT 3 */
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c2 = op_calc(ct->phase3, eg_out, 0);
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}
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if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
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smp = op_calc(ct->phase2, eg_out2, c1);
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}
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if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
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smp+= op_calc(ct->phase4, eg_out4, c2);
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}
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break;
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}
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case 5:
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{
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/* +----C1----+ */
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/* M1-+-MEM---M2-+-OUT */
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/* +----C2----+ */
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if (ct->eg_timer >= (1<<EG_SH)) break;
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m2 = ct->mem;
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ct->mem = c1 = c2 = ct->op1_out>>16;
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if( eg_out < ENV_QUIET ) { /* SLOT 3 */
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smp = op_calc(ct->phase3, eg_out, m2);
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}
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if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
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smp+= op_calc(ct->phase2, eg_out2, c1);
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}
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if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
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smp+= op_calc(ct->phase4, eg_out4, c2);
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}
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break;
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}
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case 6:
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{
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/* M1---C1-+ */
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/* M2-+-OUT */
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/* C2-+ */
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/* MEM: not used */
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if (ct->eg_timer >= (1<<EG_SH)) break;
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c1 = ct->op1_out>>16;
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if( eg_out < ENV_QUIET ) { /* SLOT 3 */
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smp = op_calc(ct->phase3, eg_out, 0);
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}
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if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
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smp+= op_calc(ct->phase2, eg_out2, c1);
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}
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if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
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smp+= op_calc(ct->phase4, eg_out4, 0);
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}
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break;
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}
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case 7:
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{
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/* M1-+ */
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/* C1-+-OUT */
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/* M2-+ */
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/* C2-+ */
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/* MEM: not used*/
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if (ct->eg_timer >= (1<<EG_SH)) break;
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smp = ct->op1_out>>16;
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if( eg_out < ENV_QUIET ) { /* SLOT 3 */
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smp += op_calc(ct->phase3, eg_out, 0);
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}
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if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
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smp += op_calc(ct->phase2, eg_out2, 0);
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}
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if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
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smp += op_calc(ct->phase4, eg_out4, 0);
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}
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break;
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}
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}
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return smp;
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}
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static void chan_render_loop(chan_rend_context *ct, int *buffer, int length)
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@ -936,302 +1136,76 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length)
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{
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int smp = 0; /* produced sample */
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unsigned int eg_out, eg_out2, eg_out4;
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FM_SLOT *SLOT;
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UINT32 cnt = ct->eg_timer_add+(ct->eg_timer & ((1<<EG_SH)-1));
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if (ct->pack & 2) while (cnt >= 1<<EG_SH) {
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cnt -= 1<<EG_SH;
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SLOT = &ct->CH->SLOT[SLOT1];
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if ((SLOT->ssg&0x08) && SLOT->state > EG_REL && SLOT->volume >= 0x200)
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ct->phase1 = update_ssg_eg_phase(SLOT, ct->phase1);
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SLOT = &ct->CH->SLOT[SLOT2];
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if ((SLOT->ssg&0x08) && SLOT->state > EG_REL && SLOT->volume >= 0x200)
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ct->phase2 = update_ssg_eg_phase(SLOT, ct->phase2);
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SLOT = &ct->CH->SLOT[SLOT3];
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if ((SLOT->ssg&0x08) && SLOT->state > EG_REL && SLOT->volume >= 0x200)
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ct->phase3 = update_ssg_eg_phase(SLOT, ct->phase3);
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SLOT = &ct->CH->SLOT[SLOT4];
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if ((SLOT->ssg&0x08) && SLOT->state > EG_REL && SLOT->volume >= 0x200)
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ct->phase4 = update_ssg_eg_phase(SLOT, ct->phase4);
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}
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if (ct->pack & 8) { /* LFO enabled ? (test Earthworm Jim in between demo 1 and 2) */
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ct->pack = (ct->pack&0xffff) | (advance_lfo(ct->pack >> 16, ct->lfo_cnt, ct->lfo_cnt + ct->lfo_inc) << 16);
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ct->lfo_cnt += ct->lfo_inc;
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}
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ct->eg_timer += ct->eg_timer_add;
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if (ct->eg_timer < EG_TIMER_OVERFLOW) {
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SLOT = &ct->CH->SLOT[SLOT1];
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SLOT->vol_ipol = SLOT->vol_out;
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if (SLOT->state > EG_REL) recalc_volout(SLOT);
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SLOT = &ct->CH->SLOT[SLOT2];
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SLOT->vol_ipol = SLOT->vol_out;
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if (SLOT->state > EG_REL) recalc_volout(SLOT);
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SLOT = &ct->CH->SLOT[SLOT3];
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SLOT->vol_ipol = SLOT->vol_out;
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if (SLOT->state > EG_REL) recalc_volout(SLOT);
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SLOT = &ct->CH->SLOT[SLOT4];
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SLOT->vol_ipol = SLOT->vol_out;
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if (SLOT->state > EG_REL) recalc_volout(SLOT);
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}
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else while (ct->eg_timer >= EG_TIMER_OVERFLOW)
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{
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ct->eg_timer -= EG_TIMER_OVERFLOW;
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ct->eg_cnt++;
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if (ct->eg_cnt >= 4096) ct->eg_cnt = 1;
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while (ct->eg_timer >= 1<<EG_SH) {
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ct->eg_timer -= 1<<EG_SH;
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SLOT = &ct->CH->SLOT[SLOT1];
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SLOT->vol_ipol = SLOT->vol_out;
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if (SLOT->state != EG_OFF) update_eg_phase(SLOT, ct->eg_cnt, ct->pack & 2);
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SLOT = &ct->CH->SLOT[SLOT2];
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SLOT->vol_ipol = SLOT->vol_out;
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if (SLOT->state != EG_OFF) update_eg_phase(SLOT, ct->eg_cnt, ct->pack & 2);
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SLOT = &ct->CH->SLOT[SLOT3];
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SLOT->vol_ipol = SLOT->vol_out;
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if (SLOT->state != EG_OFF) update_eg_phase(SLOT, ct->eg_cnt, ct->pack & 2);
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SLOT = &ct->CH->SLOT[SLOT4];
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SLOT->vol_ipol = SLOT->vol_out;
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if (SLOT->state != EG_OFF) update_eg_phase(SLOT, ct->eg_cnt, ct->pack & 2);
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}
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if (ct->pack & 8) { /* LFO enabled ? (test Earthworm Jim in between demo 1 and 2) */
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ct->pack = (ct->pack&0xffff) | (advance_lfo(ct->pack >> 16, ct->lfo_cnt, ct->lfo_cnt + ct->lfo_inc) << 16);
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ct->lfo_cnt += ct->lfo_inc;
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}
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if (ct->pack & 2)
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update_ssg_eg_channel(ct);
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if (ct->algo & 0x30)
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ct->algo -= 0x10;
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if (!(ct->algo & 0x30)) {
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ct->algo |= 0x30;
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ct->eg_cnt++;
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if (ct->eg_cnt >= 4096) ct->eg_cnt = 1;
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update_eg_phase_channel(ct);
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}
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#if 0
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UINT32 ifrac0 = ct->eg_timer / (EG_TIMER_OVERFLOW>>EG_SH);
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UINT32 ifrac1 = (1<<EG_SH) - ifrac0;
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SLOT = &ct->CH->SLOT[SLOT1];
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ct->vol_out1 = (SLOT->vol_ipol*ifrac1 + SLOT->vol_out*ifrac0) >> EG_SH;
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SLOT = &ct->CH->SLOT[SLOT2];
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ct->vol_out2 = (SLOT->vol_ipol*ifrac1 + SLOT->vol_out*ifrac0) >> EG_SH;
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SLOT = &ct->CH->SLOT[SLOT3];
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ct->vol_out3 = (SLOT->vol_ipol*ifrac1 + SLOT->vol_out*ifrac0) >> EG_SH;
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SLOT = &ct->CH->SLOT[SLOT4];
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ct->vol_out4 = (SLOT->vol_ipol*ifrac1 + SLOT->vol_out*ifrac0) >> EG_SH;
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#elif 1
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switch (ct->eg_timer >> EG_SH)
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{
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case 0:
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ct->vol_out1 = ct->CH->SLOT[SLOT1].vol_ipol;
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ct->vol_out2 = ct->CH->SLOT[SLOT2].vol_ipol;
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ct->vol_out3 = ct->CH->SLOT[SLOT3].vol_ipol;
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ct->vol_out4 = ct->CH->SLOT[SLOT4].vol_ipol;
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break;
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case (EG_TIMER_OVERFLOW>>EG_SH)-1:
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ct->vol_out1 = ct->CH->SLOT[SLOT1].vol_out;
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ct->vol_out2 = ct->CH->SLOT[SLOT2].vol_out;
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ct->vol_out3 = ct->CH->SLOT[SLOT3].vol_out;
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ct->vol_out4 = ct->CH->SLOT[SLOT4].vol_out;
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break;
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default:
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ct->vol_out1 = (ct->CH->SLOT[SLOT1].vol_ipol +
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ct->CH->SLOT[SLOT1].vol_out) >> 1;
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ct->vol_out2 = (ct->CH->SLOT[SLOT2].vol_ipol +
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ct->CH->SLOT[SLOT2].vol_out) >> 1;
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ct->vol_out3 = (ct->CH->SLOT[SLOT3].vol_ipol +
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ct->CH->SLOT[SLOT3].vol_out) >> 1;
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ct->vol_out4 = (ct->CH->SLOT[SLOT4].vol_ipol +
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ct->CH->SLOT[SLOT4].vol_out) >> 1;
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break;
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}
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#elif 0
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if (ct->eg_timer >> (EG_SH-1) < EG_TIMER_OVERFLOW >> EG_SH) {
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ct->vol_out1 = ct->CH->SLOT[SLOT1].vol_ipol;
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ct->vol_out2 = ct->CH->SLOT[SLOT2].vol_ipol;
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ct->vol_out3 = ct->CH->SLOT[SLOT3].vol_ipol;
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ct->vol_out4 = ct->CH->SLOT[SLOT4].vol_ipol;
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} else {
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ct->vol_out1 = ct->CH->SLOT[SLOT1].vol_out;
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ct->vol_out2 = ct->CH->SLOT[SLOT2].vol_out;
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ct->vol_out3 = ct->CH->SLOT[SLOT3].vol_out;
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ct->vol_out4 = ct->CH->SLOT[SLOT4].vol_out;
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if (ct->pack & 4) goto disabled; /* output disabled */
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/* calculate channel sample */
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if (ct->eg_timer < (2<<EG_SH) || (ct->pack&0xf000)) {
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eg_out = ct->vol_out1;
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if ( (ct->pack & 8) && (ct->pack&(1<<(SLOT1+8))) )
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eg_out += ct->pack >> (((ct->pack&0xc0)>>6)+24);
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if( eg_out < ENV_QUIET ) /* SLOT 1 */
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{
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int out = 0;
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|
||||
if (ct->pack&0xf000) out = ((ct->op1_out>>16) + ((ct->op1_out<<16)>>16)) << ((ct->pack&0xf000)>>12); /* op1_out0 + op1_out1 */
|
||||
ct->op1_out <<= 16;
|
||||
ct->op1_out |= (unsigned short)op_calc1(ct->phase1, eg_out, out);
|
||||
} else {
|
||||
ct->op1_out <<= 16; /* op1_out0 = op1_out1; op1_out1 = 0; */
|
||||
}
|
||||
}
|
||||
|
||||
if (ct->eg_timer < (2<<EG_SH)) {
|
||||
eg_out = ct->vol_out3; // volume_calc(&CH->SLOT[SLOT3]);
|
||||
eg_out2 = ct->vol_out2; // volume_calc(&CH->SLOT[SLOT2]);
|
||||
eg_out4 = ct->vol_out4; // volume_calc(&CH->SLOT[SLOT4]);
|
||||
|
||||
if (ct->pack & 8) {
|
||||
unsigned int add = ct->pack >> (((ct->pack&0xc0)>>6)+24);
|
||||
if (ct->pack & (1<<(SLOT3+8))) eg_out += add;
|
||||
if (ct->pack & (1<<(SLOT2+8))) eg_out2 += add;
|
||||
if (ct->pack & (1<<(SLOT4+8))) eg_out4 += add;
|
||||
}
|
||||
|
||||
smp = update_algo_channel(ct, eg_out, eg_out2, eg_out4);
|
||||
}
|
||||
/* done calculating channel sample */
|
||||
|
||||
disabled:
|
||||
/* update phase counters AFTER output calculations */
|
||||
ct->phase1 += ct->incr1;
|
||||
ct->phase2 += ct->incr2;
|
||||
ct->phase3 += ct->incr3;
|
||||
ct->phase4 += ct->incr4;
|
||||
}
|
||||
#else
|
||||
ct->vol_out1 = ct->CH->SLOT[SLOT1].vol_out;
|
||||
ct->vol_out2 = ct->CH->SLOT[SLOT2].vol_out;
|
||||
ct->vol_out3 = ct->CH->SLOT[SLOT3].vol_out;
|
||||
ct->vol_out4 = ct->CH->SLOT[SLOT4].vol_out;
|
||||
#endif
|
||||
|
||||
if (ct->pack & 4) continue; /* output disabled */
|
||||
|
||||
/* calculate channel sample */
|
||||
eg_out = ct->vol_out1;
|
||||
if ( (ct->pack & 8) && (ct->pack&(1<<(SLOT1+8))) ) eg_out += ct->pack >> (((ct->pack&0xc0)>>6)+24);
|
||||
|
||||
if( eg_out < ENV_QUIET ) /* SLOT 1 */
|
||||
{
|
||||
int out = 0;
|
||||
|
||||
if (ct->pack&0xf000) out = ((ct->op1_out>>16) + ((ct->op1_out<<16)>>16)) << ((ct->pack&0xf000)>>12); /* op1_out0 + op1_out1 */
|
||||
ct->op1_out <<= 16;
|
||||
ct->op1_out |= (unsigned short)op_calc1(ct->phase1, eg_out, out);
|
||||
} else {
|
||||
ct->op1_out <<= 16; /* op1_out0 = op1_out1; op1_out1 = 0; */
|
||||
}
|
||||
|
||||
eg_out = ct->vol_out3; // volume_calc(&CH->SLOT[SLOT3]);
|
||||
eg_out2 = ct->vol_out2; // volume_calc(&CH->SLOT[SLOT2]);
|
||||
eg_out4 = ct->vol_out4; // volume_calc(&CH->SLOT[SLOT4]);
|
||||
|
||||
if (ct->pack & 8) {
|
||||
unsigned int add = ct->pack >> (((ct->pack&0xc0)>>6)+24);
|
||||
if (ct->pack & (1<<(SLOT3+8))) eg_out += add;
|
||||
if (ct->pack & (1<<(SLOT2+8))) eg_out2 += add;
|
||||
if (ct->pack & (1<<(SLOT4+8))) eg_out4 += add;
|
||||
}
|
||||
|
||||
switch( ct->algo&0x7 )
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
/* M1---C1---MEM---M2---C2---OUT */
|
||||
int m2,c1,c2=0; /* Phase Modulation input for operators 2,3,4 */
|
||||
m2 = ct->mem;
|
||||
c1 = ct->op1_out>>16;
|
||||
if( eg_out < ENV_QUIET ) { /* SLOT 3 */
|
||||
c2 = op_calc(ct->phase3, eg_out, m2);
|
||||
}
|
||||
if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
|
||||
ct->mem = op_calc(ct->phase2, eg_out2, c1);
|
||||
}
|
||||
else ct->mem = 0;
|
||||
if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
|
||||
smp = op_calc(ct->phase4, eg_out4, c2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 1:
|
||||
{
|
||||
/* M1------+-MEM---M2---C2---OUT */
|
||||
/* C1-+ */
|
||||
int m2,c2=0;
|
||||
m2 = ct->mem;
|
||||
ct->mem = ct->op1_out>>16;
|
||||
if( eg_out < ENV_QUIET ) { /* SLOT 3 */
|
||||
c2 = op_calc(ct->phase3, eg_out, m2);
|
||||
}
|
||||
if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
|
||||
ct->mem+= op_calc(ct->phase2, eg_out2, 0);
|
||||
}
|
||||
if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
|
||||
smp = op_calc(ct->phase4, eg_out4, c2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 2:
|
||||
{
|
||||
/* M1-----------------+-C2---OUT */
|
||||
/* C1---MEM---M2-+ */
|
||||
int m2,c2;
|
||||
m2 = ct->mem;
|
||||
c2 = ct->op1_out>>16;
|
||||
if( eg_out < ENV_QUIET ) { /* SLOT 3 */
|
||||
c2 += op_calc(ct->phase3, eg_out, m2);
|
||||
}
|
||||
if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
|
||||
ct->mem = op_calc(ct->phase2, eg_out2, 0);
|
||||
}
|
||||
else ct->mem = 0;
|
||||
if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
|
||||
smp = op_calc(ct->phase4, eg_out4, c2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 3:
|
||||
{
|
||||
/* M1---C1---MEM------+-C2---OUT */
|
||||
/* M2-+ */
|
||||
int c1,c2;
|
||||
c2 = ct->mem;
|
||||
c1 = ct->op1_out>>16;
|
||||
if( eg_out < ENV_QUIET ) { /* SLOT 3 */
|
||||
c2 += op_calc(ct->phase3, eg_out, 0);
|
||||
}
|
||||
if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
|
||||
ct->mem = op_calc(ct->phase2, eg_out2, c1);
|
||||
}
|
||||
else ct->mem = 0;
|
||||
if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
|
||||
smp = op_calc(ct->phase4, eg_out4, c2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 4:
|
||||
{
|
||||
/* M1---C1-+-OUT */
|
||||
/* M2---C2-+ */
|
||||
/* MEM: not used */
|
||||
int c1,c2=0;
|
||||
c1 = ct->op1_out>>16;
|
||||
if( eg_out < ENV_QUIET ) { /* SLOT 3 */
|
||||
c2 = op_calc(ct->phase3, eg_out, 0);
|
||||
}
|
||||
if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
|
||||
smp = op_calc(ct->phase2, eg_out2, c1);
|
||||
}
|
||||
if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
|
||||
smp+= op_calc(ct->phase4, eg_out4, c2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 5:
|
||||
{
|
||||
/* +----C1----+ */
|
||||
/* M1-+-MEM---M2-+-OUT */
|
||||
/* +----C2----+ */
|
||||
int m2,c1,c2;
|
||||
m2 = ct->mem;
|
||||
ct->mem = c1 = c2 = ct->op1_out>>16;
|
||||
if( eg_out < ENV_QUIET ) { /* SLOT 3 */
|
||||
smp = op_calc(ct->phase3, eg_out, m2);
|
||||
}
|
||||
if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
|
||||
smp+= op_calc(ct->phase2, eg_out2, c1);
|
||||
}
|
||||
if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
|
||||
smp+= op_calc(ct->phase4, eg_out4, c2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 6:
|
||||
{
|
||||
/* M1---C1-+ */
|
||||
/* M2-+-OUT */
|
||||
/* C2-+ */
|
||||
/* MEM: not used */
|
||||
int c1;
|
||||
c1 = ct->op1_out>>16;
|
||||
if( eg_out < ENV_QUIET ) { /* SLOT 3 */
|
||||
smp = op_calc(ct->phase3, eg_out, 0);
|
||||
}
|
||||
if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
|
||||
smp+= op_calc(ct->phase2, eg_out2, c1);
|
||||
}
|
||||
if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
|
||||
smp+= op_calc(ct->phase4, eg_out4, 0);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case 7:
|
||||
{
|
||||
/* M1-+ */
|
||||
/* C1-+-OUT */
|
||||
/* M2-+ */
|
||||
/* C2-+ */
|
||||
/* MEM: not used*/
|
||||
smp = ct->op1_out>>16;
|
||||
if( eg_out < ENV_QUIET ) { /* SLOT 3 */
|
||||
smp += op_calc(ct->phase3, eg_out, 0);
|
||||
}
|
||||
if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
|
||||
smp += op_calc(ct->phase2, eg_out2, 0);
|
||||
}
|
||||
if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
|
||||
smp += op_calc(ct->phase4, eg_out4, 0);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* done calculating channel sample */
|
||||
|
||||
/* mix sample to output buffer */
|
||||
if (smp) {
|
||||
|
|
@ -1250,12 +1224,6 @@ static void chan_render_loop(chan_rend_context *ct, int *buffer, int length)
|
|||
}
|
||||
ct->algo |= 8;
|
||||
}
|
||||
|
||||
/* update phase counters AFTER output calculations */
|
||||
ct->phase1 += ct->incr1;
|
||||
ct->phase2 += ct->incr2;
|
||||
ct->phase3 += ct->incr3;
|
||||
ct->phase4 += ct->incr4;
|
||||
}
|
||||
}
|
||||
#else
|
||||
|
|
@ -1335,6 +1303,7 @@ static int chan_render(int *buffer, int length, int c, UINT32 flags) // flags: s
|
|||
|
||||
crct.op1_out = crct.CH->op1_out;
|
||||
crct.algo = crct.CH->ALGO & 7;
|
||||
crct.algo |= crct.CH->upd_cnt << 4;
|
||||
if (ym2612.OPN.ST.flags & ST_DAC)
|
||||
crct.algo |= 0x80;
|
||||
|
||||
|
|
@ -1373,6 +1342,7 @@ static int chan_render(int *buffer, int length, int c, UINT32 flags) // flags: s
|
|||
}
|
||||
else
|
||||
ym2612.slot_mask &= ~(0xf << (c*4));
|
||||
crct.CH->upd_cnt = (crct.algo >> 4) & 0x7;
|
||||
|
||||
return (crct.algo & 8) >> 3; // had output
|
||||
}
|
||||
|
|
@ -1625,9 +1595,10 @@ static void OPNSetPres(int pres)
|
|||
int i;
|
||||
|
||||
/* frequency base */
|
||||
ym2612.OPN.ST.freqbase = (ym2612.OPN.ST.rate) ? ((double)ym2612.OPN.ST.clock / ym2612.OPN.ST.rate) / pres : 0;
|
||||
double freqbase = (ym2612.OPN.ST.rate) ? ((double)ym2612.OPN.ST.clock / ym2612.OPN.ST.rate) / pres : 0;
|
||||
|
||||
ym2612.OPN.eg_timer_add = (1<<EG_SH) * ym2612.OPN.ST.freqbase;
|
||||
ym2612.OPN.eg_timer_add = (1<<EG_SH) * freqbase;
|
||||
ym2612.OPN.ST.freqbase = 1.0; // freqbase
|
||||
|
||||
/* make time tables */
|
||||
init_timetables( dt_tab );
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue