mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
added branch cache to sh2 drc to improve cross-tcache jump speed
This commit is contained in:
kub
parent
6822ba9d64
commit
d760c90f3a
4 changed files with 143 additions and 16 deletions
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@ -179,6 +179,7 @@
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/* ldr and str */
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#define EOP_LDR_IMM2(cond,rd,rn,offset_12) EOP_C_AM2_IMM(cond,1,0,1,rn,rd,offset_12)
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#define EOP_LDRB_IMM2(cond,rd,rn,offset_12) EOP_C_AM2_IMM(cond,1,1,1,rn,rd,offset_12)
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#define EOP_STR_IMM2(cond,rd,rn,offset_12) EOP_C_AM2_IMM(cond,(offset_12) >= 0,0,0,rn,rd,abs(offset_12))
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#define EOP_LDR_IMM( rd,rn,offset_12) EOP_C_AM2_IMM(A_COND_AL,1,0,1,rn,rd,offset_12)
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#define EOP_LDR_NEGIMM(rd,rn,offset_12) EOP_C_AM2_IMM(A_COND_AL,0,0,1,rn,rd,offset_12)
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@ -478,6 +479,9 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_add_r_r(d, s) \
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emith_add_r_r_r(d, d, s)
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#define emith_add_r_r_ptr(d, s) \
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emith_add_r_r_r(d, d, s)
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#define emith_sub_r_r(d, s) \
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EOP_SUB_REG(A_COND_AL,0,d,d,s,A_AM1_LSL,0)
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@ -684,6 +688,8 @@ static int emith_xbranch(int cond, void *target, int is_call)
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// misc
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#define emith_read_r_r_offs_c(cond, r, rs, offs) \
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EOP_LDR_IMM2(cond, r, rs, offs)
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#define emith_read_r_r_offs_ptr_c(cond, r, rs, offs) \
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emith_read_r_r_offs_c(cond, r, rs, offs)
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#define emith_read_r_r_r_c(cond, r, rs, rm) \
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EOP_LDR_REG_LSL(cond, r, rs, rm, 0)
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#define emith_read_r_r_r(r, rs, rm) \
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@ -716,8 +722,15 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_read16_r_r_offs(r, rs, offs) \
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emith_read16_r_r_offs_c(A_COND_AL, r, rs, offs)
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#define emith_write_r_r_offs_c(cond, r, rs, offs) \
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EOP_STR_IMM2(cond, r, rs, offs)
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#define emith_write_r_r_offs_ptr_c(cond, r, rs, offs) \
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emith_write_r_r_offs_c(cond, r, rs, offs)
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#define emith_ctx_read_c(cond, r, offs) \
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emith_read_r_r_offs_c(cond, r, CONTEXT_REG, offs)
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#define emith_ctx_read(r, offs) \
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emith_read_r_r_offs(r, CONTEXT_REG, offs)
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emith_ctx_read_c(A_COND_AL, r, offs)
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#define emith_ctx_read_ptr(r, offs) \
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emith_ctx_read(r, offs)
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@ -122,7 +122,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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EMIT_OP_MODRM(0x01, 3, s, d)
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#define emith_add_r_r_ptr(d, s) do { \
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EMIT_REX_IF(1, dst, src); \
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EMIT_REX_IF(1, s, d); \
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EMIT_OP_MODRM64(0x01, 3, s, d); \
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} while (0)
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@ -260,6 +260,21 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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} \
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} while (0)
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// _r_r_r_shift
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#define emith_add_r_r_r_lsl(d, s1, s2, lslimm) do { \
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int tmp_ = rcache_get_tmp(); \
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emith_lsl(tmp_, s2, lslimm); \
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emith_add_r_r_r(d, s1, tmp_); \
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rcache_free_tmp(tmp_); \
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} while (0)
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#define emith_add_r_r_r_lsr(d, s1, s2, lslimm) do { \
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int tmp_ = rcache_get_tmp(); \
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emith_lsr(tmp_, s2, lslimm); \
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emith_add_r_r_r(d, s1, tmp_); \
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rcache_free_tmp(tmp_); \
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} while (0)
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// _r_r_shift
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#define emith_or_r_r_lsl(d, s, lslimm) do { \
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int tmp_ = rcache_get_tmp(); \
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@ -361,8 +376,12 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_read_r_r_offs_c(cond, r, rs, offs) \
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emith_read_r_r_offs(r, rs, offs)
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#define emith_read_r_r_offs_ptr_c(cond, r, rs, offs) \
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emith_read_r_r_offs_ptr(r, rs, offs)
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#define emith_write_r_r_offs_c(cond, r, rs, offs) \
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emith_write_r_r_offs(r, rs, offs)
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#define emith_write_r_r_offs_ptr_c(cond, r, rs, offs) \
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emith_write_r_r_offs_ptr(r, rs, offs)
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#define emith_read8_r_r_offs_c(cond, r, rs, offs) \
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emith_read8_r_r_offs(r, rs, offs)
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#define emith_write8_r_r_offs_c(cond, r, rs, offs) \
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@ -583,9 +602,15 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_read_r_r_offs(r, rs, offs) \
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emith_deref_op(0x8b, r, rs, offs)
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#define emith_read_r_r_offs_ptr(r, rs, offs) \
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EMIT_REX_IF(1, r, rs); \
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emith_deref_op(0x8b, r, rs, offs)
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#define emith_write_r_r_offs(r, rs, offs) \
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emith_deref_op(0x89, r, rs, offs)
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#define emith_write_r_r_offs_ptr(r, rs, offs) \
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EMIT_REX_IF(1, r, rs); \
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emith_deref_op(0x89, r, rs, offs)
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// note: don't use prefixes on this
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#define emith_read8_r_r_offs(r, rs, offs) do { \
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@ -664,6 +689,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_ctx_read(r, offs) \
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emith_read_r_r_offs(r, CONTEXT_REG, offs)
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#define emith_ctx_read_c(cond, r, offs) \
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emith_ctx_read(r, offs)
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#define emith_ctx_read_ptr(r, offs) do { \
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EMIT_REX_IF(1, r, CONTEXT_REG); \
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@ -38,6 +38,7 @@
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// features
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#define PROPAGATE_CONSTANTS 1
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#define LINK_BRANCHES 1
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#define BRANCH_CACHE 1
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#define ALIAS_REGISTERS 1
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#define REMAP_REGISTER 1
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@ -57,10 +58,11 @@
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// 10 - smc self-check
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// 100 - write trace
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// 200 - compare trace
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// 400 - print block entry backtrace
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// 400 - block entry backtraceA on exit
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// 800 - state dump on exit
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// {
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#ifndef DRC_DEBUG
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#define DRC_DEBUG 0
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#define DRC_DEBUG 0x800
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#endif
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#if DRC_DEBUG
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@ -159,8 +161,6 @@ static char sh2dasm_buff[64];
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#define do_host_disasm(x)
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#endif
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#if (DRC_DEBUG & (8|256|512|1024)) || defined(PDB)
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#define SH2_DUMP(sh2, reason) { \
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char ms = (sh2)->is_slave ? 's' : 'm'; \
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printf("%csh2 %s %08x\n", ms, reason, (sh2)->pc); \
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@ -178,6 +178,8 @@ static char sh2dasm_buff[64];
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(sh2)->pdb_io_csum[0], (sh2)->pdb_io_csum[1], (sh2)->state, \
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(sh2)->poll_addr, (sh2)->poll_cycles, (sh2)->poll_cnt); \
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}
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#if (DRC_DEBUG & (8|256|512|1024)) || defined(PDB)
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static SH2 csh2[2][4];
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static void REGPARM(3) *sh2_drc_log_entry(void *block, SH2 *sh2, u32 sr)
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{
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@ -631,6 +633,14 @@ static void REGPARM(1) flush_tcache(int tcid)
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memset(Pico32xMem->drcblk_da[tcid - 1], 0,
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sizeof(Pico32xMem->drcblk_da[0]));
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}
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#if BRANCH_CACHE
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if (tcid)
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memset32(sh2s[tcid-1].branch_cache, -1, sizeof(sh2s[0].branch_cache)/4);
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else {
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memset32(sh2s[0].branch_cache, -1, sizeof(sh2s[0].branch_cache)/4);
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memset32(sh2s[1].branch_cache, -1, sizeof(sh2s[1].branch_cache)/4);
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}
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#endif
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#if (DRC_DEBUG & 4)
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tcache_dsm_ptrs[tcid] = tcache_bases[tcid];
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#endif
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@ -3727,14 +3737,35 @@ static void sh2_generate_utils(void)
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// sh2_drc_dispatcher(void)
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sh2_drc_dispatcher = (void *)tcache_ptr;
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sr = rcache_get_reg(SHR_SR, RC_GR_READ, NULL);
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emith_cmp_r_imm(sr, 0);
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emith_jump_cond(DCOND_LT, sh2_drc_exit);
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rcache_invalidate();
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emith_ctx_read(arg0, SHR_PC * 4);
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#if BRANCH_CACHE
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// check if PC is in branch target cache
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emith_and_r_r_imm(arg1, arg0, (ARRAY_SIZE(sh2s->branch_cache)-1)*4);
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// TODO implement emith_add_r_r_r_lsl_ptr, saves one insn on 32bit ARM
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emith_lsl(arg1, arg1, sizeof(void *) == 8 ? 2 : 1);
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emith_add_r_r_ptr(arg1, CONTEXT_REG);
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emith_read_r_r_offs(arg2, arg1, offsetof(SH2, branch_cache));
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emith_cmp_r_r(arg2, arg0);
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EMITH_SJMP_START(DCOND_NE);
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emith_read_r_r_offs_ptr_c(DCOND_EQ, RET_REG, arg1, offsetof(SH2, branch_cache) + sizeof(void *));
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emith_jump_reg_c(DCOND_EQ, RET_REG);
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EMITH_SJMP_END(DCOND_NE);
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#endif
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emith_ctx_read(arg1, offsetof(SH2, is_slave));
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emith_add_r_r_ptr_imm(arg2, CONTEXT_REG, offsetof(SH2, drc_tmp));
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emith_call(dr_lookup_block);
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#if BRANCH_CACHE
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// store PC and block entry ptr (in arg0) in branch target cache
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emith_tst_r_r_ptr(RET_REG, RET_REG);
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EMITH_SJMP_START(DCOND_EQ);
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emith_ctx_read_c(DCOND_NE, arg2, SHR_PC * 4);
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emith_and_r_r_imm(arg1, arg2, (ARRAY_SIZE(sh2s->branch_cache)-1)*4);
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emith_lsl(arg1, arg1, sizeof(void *) == 8 ? 2 : 1);
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emith_add_r_r_ptr(arg1, CONTEXT_REG);
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emith_write_r_r_offs_c(DCOND_NE, arg2, arg1, offsetof(SH2, branch_cache));
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emith_write_r_r_offs_ptr_c(DCOND_NE, RET_REG, arg1, offsetof(SH2, branch_cache) + sizeof(void *));
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EMITH_SJMP_END(DCOND_EQ);
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#endif
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emit_block_entry();
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// lookup failed, call sh2_translate()
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emith_move_r_r_ptr(arg0, CONTEXT_REG);
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@ -3904,6 +3935,15 @@ static void sh2_smc_rm_block(struct block_desc *bd, int tcache_id, u32 ram_mask)
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bd->addr = bd->size = bd->size_nolit = 0;
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bd->entry_count = 0;
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#if BRANCH_CACHE
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if (tcache_id)
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memset32(sh2s[tcache_id-1].branch_cache, -1, sizeof(sh2s[0].branch_cache)/4);
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else {
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memset32(sh2s[0].branch_cache, -1, sizeof(sh2s[0].branch_cache)/4);
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memset32(sh2s[1].branch_cache, -1, sizeof(sh2s[1].branch_cache)/4);
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}
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#endif
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}
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/*
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@ -4015,9 +4055,9 @@ int sh2_execute_drc(SH2 *sh2c, int cycles)
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return ret_cycles;
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}
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#if (DRC_DEBUG & 2)
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void block_stats(void)
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static void block_stats(void)
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{
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#if (DRC_DEBUG & 2)
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int c, b, i, total = 0;
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printf("block stats:\n");
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@ -4048,12 +4088,10 @@ void block_stats(void)
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for (b = 0; b < ARRAY_SIZE(block_tables); b++)
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for (i = 0; i < block_counts[b]; i++)
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block_tables[b][i].refcount = 0;
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}
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#else
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#define block_stats()
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#endif
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}
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void sh2_drc_flush_all(void)
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static void backtrace(void)
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{
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#if (DRC_DEBUG & 1024)
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int i;
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@ -4064,6 +4102,52 @@ void sh2_drc_flush_all(void)
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for (i = 0; i < ARRAY_SIZE(csh2[1]); i++)
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SH2_DUMP(&csh2[1][i], "bt ssh2");
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#endif
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}
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static void state_dump(void)
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{
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#if (DRC_DEBUG & 2048)
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int i;
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SH2_DUMP(&sh2s[0], "master");
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printf("VBR msh2: %x\n", sh2s[0].vbr);
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for (i = 0; i < 0x60; i++) {
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printf("%08x ",p32x_sh2_read32(sh2s[0].vbr + i*4, &sh2s[0]));
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if ((i+1) % 8 == 0) printf("\n");
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}
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printf("stack msh2: %x\n", sh2s[0].r[15]);
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for (i = -0x30; i < 0x30; i++) {
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printf("%08x ",p32x_sh2_read32(sh2s[0].r[15] + i*4, &sh2s[0]));
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if ((i+1) % 8 == 0) printf("\n");
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}
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printf("branch cache master:\n");
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for (i = 0; i < ARRAY_SIZE(sh2s[0].branch_cache); i++) {
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printf("%08x ",sh2s[0].branch_cache[i].pc);
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if ((i+1) % 8 == 0) printf("\n");
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}
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SH2_DUMP(&sh2s[1], "slave");
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printf("VBR ssh2: %x\n", sh2s[1].vbr);
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for (i = 0; i < 0x60; i++) {
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printf("%08x ",p32x_sh2_read32(sh2s[1].vbr + i*4, &sh2s[1]));
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if ((i+1) % 8 == 0) printf("\n");
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}
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printf("stack ssh2: %x\n", sh2s[1].r[15]);
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for (i = -0x30; i < 0x30; i++) {
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printf("%08x ",p32x_sh2_read32(sh2s[1].r[15] + i*4, &sh2s[1]));
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if ((i+1) % 8 == 0) printf("\n");
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}
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printf("branch cache slave:\n");
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for (i = 0; i < ARRAY_SIZE(sh2s[1].branch_cache); i++) {
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printf("%08x ",sh2s[1].branch_cache[i].pc);
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if ((i+1) % 8 == 0) printf("\n");
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}
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#endif
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}
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void sh2_drc_flush_all(void)
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{
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backtrace();
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state_dump();
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block_stats();
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flush_tcache(0);
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flush_tcache(1);
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@ -50,6 +50,9 @@ typedef struct SH2_
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int poll_cycles;
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int poll_cnt;
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// DRC branch cache. size must be 2^n and <=128
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struct { unsigned int pc; void *code; } branch_cache[128];
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// interpreter stuff
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int icount; // cycles left in current timeslice
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unsigned int ea;
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