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32x, tiny optimization for memory access

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This commit is contained in:
kub 2020-12-14 21:05:51 +01:00
parent faedc4f1e2
commit e0d5c83fd3
2 changed files with 4 additions and 4 deletions
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2
cpu/drc/emit_mips.c
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@ -384,7 +384,7 @@ static int emith_rd(u32 op)
ret = emith_has_(rd,2,op, 0,0x3f) ? (op>>16)&0x1f :-1; ret = emith_has_(rd,2,op, 0,0x3f) ? (op>>16)&0x1f :-1;
if ((op>>26) == OP__RT) if ((op>>26) == OP__RT)
ret = -1; ret = -1;
return (ret ?: -1); // Z0 doesn't have dependencies return (ret ? ret : -1); // Z0 doesn't have dependencies
} }
static int emith_b_isswap(u32 bop, u32 lop) static int emith_b_isswap(u32 bop, u32 lop)

6
pico/32x/memory.c
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@ -163,7 +163,7 @@ void NOINLINE p32x_sh2_poll_event(SH2 *sh2, u32 flags, u32 m68k_cycles)
sh2->poll_addr = sh2->poll_cycles = sh2->poll_cnt = 0; sh2->poll_addr = sh2->poll_cycles = sh2->poll_cnt = 0;
} }
static void sh2s_sync_on_read(SH2 *sh2, unsigned cycles) static NOINLINE void sh2s_sync_on_read(SH2 *sh2, unsigned cycles)
{ {
if (sh2->poll_cnt != 0) if (sh2->poll_cnt != 0)
return; return;
@ -1587,13 +1587,13 @@ static void sh2_sdram_poll(u32 a, u32 d, SH2 *sh2)
DRC_RESTORE_SR(sh2); DRC_RESTORE_SR(sh2);
} }
void sh2_sdram_checks(u32 a, u32 d, SH2 *sh2, u32 t) void NOINLINE sh2_sdram_checks(u32 a, u32 d, SH2 *sh2, u32 t)
{ {
if (t & 0x80) sh2_sdram_poll(a, d, sh2); if (t & 0x80) sh2_sdram_poll(a, d, sh2);
if (t & 0x7f) sh2_drc_wcheck_ram(a, 2, sh2); if (t & 0x7f) sh2_drc_wcheck_ram(a, 2, sh2);
} }
void sh2_sdram_checks_l(u32 a, u32 d, SH2 *sh2, u32 t) void NOINLINE sh2_sdram_checks_l(u32 a, u32 d, SH2 *sh2, u32 t)
{ {
if (t & 0x000080) sh2_sdram_poll(a, d>>16, sh2); if (t & 0x000080) sh2_sdram_poll(a, d>>16, sh2);
if (t & 0x800000) sh2_sdram_poll(a+2, d, sh2); if (t & 0x800000) sh2_sdram_poll(a+2, d, sh2);