mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
debug stuff, bug fixing
This commit is contained in:
kub
parent
ff0eaa11d9
commit
e267031a50
4 changed files with 185 additions and 62 deletions
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@ -53,6 +53,9 @@
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// 04 - asm
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// 08 - runtime block entry log
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// 10 - smc self-check
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// 100 - write trace
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// 200 - compare trace
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// 400 - print block entry backtrace
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// {
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#ifndef DRC_DEBUG
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#define DRC_DEBUG 0
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@ -73,6 +76,7 @@ static int insns_compiled, hash_collisions, host_insn_count;
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#define dbg(...)
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#endif
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///
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#define FETCH_OP(pc) \
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dr_pc_base[(pc) / 2]
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@ -147,13 +151,86 @@ static char sh2dasm_buff[64];
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#define do_host_disasm(x)
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#endif
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#if (DRC_DEBUG & 8) || defined(PDB)
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#if (DRC_DEBUG & (8|256|512|1024)) || defined(PDB)
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#define SH2_DUMP(sh2, reason) { \
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char ms = (sh2)->is_slave ? 's' : 'm'; \
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printf("%csh2 %s %08x\n", ms, reason, (sh2)->pc); \
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printf("%csh2 r0-7 %08x %08x %08x %08x %08x %08x %08x %08x\n", ms, \
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(sh2)->r[0], (sh2)->r[1], (sh2)->r[2], (sh2)->r[3], \
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(sh2)->r[4], (sh2)->r[5], (sh2)->r[6], (sh2)->r[7]); \
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printf("%csh2 r8-15 %08x %08x %08x %08x %08x %08x %08x %08x\n", ms, \
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(sh2)->r[8], (sh2)->r[9], (sh2)->r[10], (sh2)->r[11], \
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(sh2)->r[12], (sh2)->r[13], (sh2)->r[14], (sh2)->r[15]); \
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printf("%csh2 pc-ml %08x %08x %08x %08x %08x %08x %08x %08x\n", ms, \
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(sh2)->pc, (sh2)->ppc, (sh2)->pr, (sh2)->sr&0x3ff, \
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(sh2)->gbr, (sh2)->vbr, (sh2)->mach, (sh2)->macl); \
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printf("%csh2 tmp-p %08x %08x %08x %08x %08x %08x %08x %08x\n", ms, \
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(sh2)->drc_tmp, (sh2)->irq_cycles, \
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(sh2)->pdb_io_csum[0], (sh2)->pdb_io_csum[1], (sh2)->state, \
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(sh2)->poll_addr, (sh2)->poll_cycles, (sh2)->poll_cnt); \
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}
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static SH2 csh2[2][4];
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static void REGPARM(3) *sh2_drc_log_entry(void *block, SH2 *sh2, u32 sr)
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{
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if (block != NULL) {
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dbg(8, "= %csh2 enter %08x %p, c=%d", sh2->is_slave ? 's' : 'm',
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sh2->pc, block, (signed int)sr >> 12);
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#if defined PDB
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pdb_step(sh2, sh2->pc);
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#elif (DRC_DEBUG & 256)
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{
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static FILE *trace[2];
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int idx = sh2->is_slave;
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if (sh2 != &sh2s[0] && sh2 != &sh2s[1]) printf("sh2 %p?\n",sh2);
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if (!trace[0]) {
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truncate("pico.trace", 0);
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trace[0] = fopen("pico.trace0", "wb");
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trace[1] = fopen("pico.trace1", "wb");
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}
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if (csh2[idx][0].pc != sh2->pc) {
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fwrite(sh2, offsetof(SH2, read8_map), 1, trace[idx]);
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fwrite(&sh2->pdb_io_csum, sizeof(sh2->pdb_io_csum), 1, trace[idx]);
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memcpy(&csh2[idx][0], sh2, offsetof(SH2, icount));
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}
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}
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#elif (DRC_DEBUG & 512)
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{
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static FILE *trace[2];
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static SH2 fsh2;
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int idx = sh2->is_slave;
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if (!trace[0]) {
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trace[0] = fopen("pico.trace0", "rb");
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trace[1] = fopen("pico.trace1", "rb");
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}
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if (csh2[idx][0].pc != sh2->pc) {
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if (!fread(&fsh2, offsetof(SH2, read8_map), 1, trace[idx]) ||
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!fread(&fsh2.pdb_io_csum, sizeof(sh2->pdb_io_csum), 1, trace[idx])) {
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printf("trace eof at %08lx\n",ftell(trace[idx]));
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exit(1);
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}
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fsh2.sr = (fsh2.sr & 0xfff) | (sh2->sr & ~0xfff);
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fsh2.is_slave = idx;
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if (memcmp(&fsh2, sh2, offsetof(SH2, read8_map)) ||
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0)//memcmp(&fsh2.pdb_io_csum, &sh2->pdb_io_csum, sizeof(sh2->pdb_io_csum)))
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{
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printf("difference at %08lx!\n",ftell(trace[idx]));
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SH2_DUMP(&fsh2, "file");
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SH2_DUMP(sh2, "current");
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SH2_DUMP(&csh2[idx][0], "previous");
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exit(1);
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}
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csh2[idx][0] = fsh2;
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}
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}
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#elif (DRC_DEBUG & 1024)
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{
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int x = sh2->is_slave, i;
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for (i = 0; i < ARRAY_SIZE(csh2[x]); i++)
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memcpy(&csh2[x][i], &csh2[x][i+1], offsetof(SH2, icount));
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memcpy(&csh2[x][3], sh2, offsetof(SH2, icount));
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}
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#endif
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}
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return block;
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}
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@ -759,13 +836,18 @@ static u32 dr_gcregs_mask;
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static u32 dr_gcregs_dirty;
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#if PROPAGATE_CONSTANTS
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static void gconst_set(sh2_reg_e r, u32 val)
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{
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dr_gcregs_mask |= 1 << r;
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dr_gcregs[r] = val;
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}
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static void gconst_new(sh2_reg_e r, u32 val)
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{
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int i;
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dr_gcregs_mask |= 1 << r;
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gconst_set(r, val);
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dr_gcregs_dirty |= 1 << r;
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dr_gcregs[r] = val;
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// throw away old r that we might have cached
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for (i = ARRAY_SIZE(reg_temp) - 1; i >= 0; i--) {
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@ -818,6 +900,17 @@ static void gconst_kill(sh2_reg_e r)
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dr_gcregs_dirty &= ~(1 << r);
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}
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#if PROPAGATE_CONSTANTS
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static void gconst_copy(sh2_reg_e rd, sh2_reg_e rs)
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{
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u32 val;
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gconst_kill(rd);
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if (gconst_get(rs, &val))
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gconst_set(rd, val);
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}
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#endif
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static void gconst_clean(void)
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{
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int i;
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@ -1104,7 +1197,7 @@ static void rcache_unlock_all(void)
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reg_temp[i].flags &= ~HRF_LOCKED;
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}
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#ifdef DRC_CMP
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#if (DRC_DEBUG & (8|256|512|1024)) || defined(DRC_CMP)
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static u32 rcache_used_hreg_mask(void)
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{
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u32 mask = 0;
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@ -1202,18 +1295,13 @@ static void emit_move_r_imm32(sh2_reg_e dst, u32 imm)
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static void emit_move_r_r(sh2_reg_e dst, sh2_reg_e src)
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{
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int hr_d, hr_s;
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u32 val;
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hr_s = rcache_get_reg(src, RC_GR_READ);
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hr_d = rcache_get_reg(dst, RC_GR_WRITE);
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emith_move_r_r(hr_d, hr_s);
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#if PROPAGATE_CONSTANTS
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if (gconst_get(src, &val))
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gconst_new(dst, val);
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else
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gconst_copy(dst, src);
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#endif
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{
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hr_s = rcache_get_reg(src, RC_GR_READ);
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hr_d = rcache_get_reg(dst, RC_GR_WRITE);
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emith_move_r_r(hr_d, hr_s);
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}
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}
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// T must be clear, and comparison done just before this
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@ -1231,7 +1319,7 @@ static int emit_memhandler_read(int size)
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rcache_clean();
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#ifndef DCR_SR_REG
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#ifndef DRC_SR_REG
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// must writeback cycles for poll detection stuff
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if (reg_map_g2h[SHR_SR] != -1)
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emith_ctx_write(reg_map_g2h[SHR_SR], SHR_SR * 4);
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@ -1244,7 +1332,7 @@ static int emit_memhandler_read(int size)
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case 2: emith_call(sh2_drc_read32); break; // 32
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}
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rcache_invalidate();
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#ifndef DCR_SR_REG
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#ifndef DRC_SR_REG
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if (reg_map_g2h[SHR_SR] != -1)
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emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4);
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#endif
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@ -1255,7 +1343,7 @@ static int emit_memhandler_read(int size)
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static void emit_memhandler_write(int size)
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{
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int arg2;
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#ifndef DCR_SR_REG
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#ifndef DRC_SR_REG
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if (reg_map_g2h[SHR_SR] != -1)
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emith_ctx_write(reg_map_g2h[SHR_SR], SHR_SR * 4);
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#endif
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@ -1270,7 +1358,7 @@ static void emit_memhandler_write(int size)
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}
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rcache_invalidate();
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#ifndef DCR_SR_REG
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#ifndef DRC_SR_REG
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if (reg_map_g2h[SHR_SR] != -1)
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emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4);
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#endif
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@ -1287,8 +1375,8 @@ static int emit_memhandler_read_rr(sh2_reg_e rd, sh2_reg_e rs, u32 offs, int siz
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hr2 = rcache_get_tmp();
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emith_move_r_imm(hr2, val);
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} else {
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gconst_new(rd, val);
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hr2 = rcache_get_reg(rd, RC_GR_RMW);
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emit_move_r_imm32(rd, val);
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hr2 = rcache_get_reg(rd, RC_GR_READ);
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}
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return hr2;
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}
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@ -1296,7 +1384,10 @@ static int emit_memhandler_read_rr(sh2_reg_e rd, sh2_reg_e rs, u32 offs, int siz
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if (gconst_get(rs, &val)) {
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hr = emit_get_rbase_and_offs(val + offs, &offs2);
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if (hr != -1) {
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hr2 = rcache_get_reg(rd, RC_GR_WRITE);
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if (rd == SHR_TMP)
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hr2 = rcache_get_tmp();
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else
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hr2 = rcache_get_reg(rd, RC_GR_WRITE);
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switch (size) {
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case 0: // 8
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emith_read8s_r_r_offs(hr2, hr, offs2 ^ 1);
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@ -1323,13 +1414,18 @@ static int emit_memhandler_read_rr(sh2_reg_e rd, sh2_reg_e rs, u32 offs, int siz
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emith_add_r_imm(hr, offs);
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}
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hr = emit_memhandler_read(size);
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hr2 = rcache_get_reg(rd, RC_GR_WRITE);
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if (size != 2) {
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emith_sext(hr2, hr, (size == 1) ? 16 : 8);
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} else
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emith_move_r_r(hr2, hr);
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rcache_free_tmp(hr);
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if (rd == SHR_TMP)
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hr2 = hr;
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else
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hr2 = rcache_get_reg(rd, RC_GR_WRITE);
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if (rd != SHR_TMP && size != 2) {
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emith_sext(hr2, hr, (size == 1) ? 16 : 8);
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} else if (hr != hr2)
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emith_move_r_r(hr2, hr);
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if (hr != hr2)
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rcache_free_tmp(hr);
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return hr2;
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}
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@ -1339,6 +1435,7 @@ static void emit_memhandler_write_rr(sh2_reg_e rd, sh2_reg_e rs, u32 offs, int s
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int hr;
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u32 val;
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rcache_clean(); // XXX
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rcache_get_reg_arg(1, rd);
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if (gconst_get(rs, &val)) {
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@ -1375,7 +1472,7 @@ static int emit_indirect_indexed_read(sh2_reg_e rd, sh2_reg_e rx, sh2_reg_e ry,
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else
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hr2 = hr;
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if (size != 2) { // 16, 8
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if (rd != SHR_TMP && size != 2) { // 16, 8
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emith_sext(hr2, hr, size ? 16 : 8);
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} else if (hr != hr2) // 32
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emith_move_r_r(hr2, hr);
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@ -1397,6 +1494,7 @@ static void emit_indirect_indexed_write(sh2_reg_e rd, sh2_reg_e rx, sh2_reg_e ry
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if (gconst_get(rx, &offs))
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return emit_memhandler_write_rr(rd, ry, offs, size);
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#endif
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rcache_clean(); // XXX
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rcache_get_reg_arg(1, rd);
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a0 = rcache_get_reg_arg(0, rx);
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t = rcache_get_reg(ry, RC_GR_READ);
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@ -1459,17 +1557,6 @@ static void emit_do_static_regs(int is_write, int tmpr)
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/* just after lookup function, jump to address returned */
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static void emit_block_entry(void)
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{
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#if (DRC_DEBUG & 8) || defined(PDB)
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int arg1, arg2;
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host_arg2reg(arg1, 1);
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host_arg2reg(arg2, 2);
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emit_do_static_regs(1, arg2);
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emith_move_r_r_ptr(arg1, CONTEXT_REG);
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emith_move_r_r(arg2, rcache_get_reg(SHR_SR, RC_GR_READ));
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emith_call(sh2_drc_log_entry);
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rcache_invalidate();
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#endif
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emith_tst_r_r_ptr(RET_REG, RET_REG);
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EMITH_SJMP_START(DCOND_EQ);
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emith_jump_reg_c(DCOND_NE, RET_REG);
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@ -1675,6 +1762,24 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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emith_jump_cond(DCOND_LE, sh2_drc_exit);
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do_host_disasm(tcache_id);
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rcache_unlock_all();
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#if (DRC_DEBUG & (8|256|512|1024))
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emit_move_r_imm32(SHR_PC, pc);
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sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
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FLUSH_CYCLES(sr);
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rcache_clean();
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tmp = rcache_used_hreg_mask();
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emith_save_caller_regs(tmp);
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emit_do_static_regs(1, 0);
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rcache_get_reg_arg(2, SHR_SR);
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tmp2 = rcache_get_tmp_arg(0);
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tmp3 = rcache_get_tmp_arg(1);
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emith_move_r_imm(tmp2, (u32)tcache_ptr);
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emith_move_r_r_ptr(tmp3,CONTEXT_REG);
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emith_call(sh2_drc_log_entry);
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emith_restore_caller_regs(tmp);
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rcache_invalidate();
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#endif
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}
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#ifdef DRC_CMP
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@ -1729,7 +1834,10 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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emith_move_r_imm(tmp, pc);
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emith_tst_r_imm(sr, T);
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tmp2 = ops[i-1].op == OP_BRANCH_CT ? DCOND_NE : DCOND_EQ;
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tmp3 = ops[i-1].op == OP_BRANCH_CT ? DCOND_EQ : DCOND_NE;
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EMITH_SJMP_START(tmp3);
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emith_move_r_imm_c(tmp2, tmp, ops[i-1].imm);
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EMITH_SJMP_END(tmp3);
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break;
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case OP_BRANCH_N:
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emit_move_r_imm32(SHR_PC, pc);
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@ -1765,7 +1873,6 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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drcf.pending_branch_direct = 1;
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} else {
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emit_move_r_r(SHR_PC, opd->rm);
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ops[i+1].source |= SHR_PC; // need PC for jump after delay slot
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drcf.pending_branch_indirect = 1;
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}
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goto end_op;
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@ -1785,7 +1892,6 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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emith_move_r_r(tmp3, tmp);
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}
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emith_add_r_r(tmp, tmp2);
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ops[i+1].source |= SHR_PC; // need PC for jump after delay slot
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drcf.pending_branch_indirect = 1;
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}
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goto end_op;
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@ -1813,7 +1919,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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case OP_UNDEFINED:
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elprintf_sh2(sh2, EL_ANOMALY,
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"drc: illegal op %04x @ %08x", op, pc - 2);
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opd->imm = 4;
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opd->imm = (op_flags[i] & OF_B_IN_DS) ? 6 : 4;
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// fallthrough
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case OP_TRAPA:
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tmp = rcache_get_reg(SHR_SP, RC_GR_RMW);
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@ -1827,7 +1933,13 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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// push PC
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rcache_get_reg_arg(0, SHR_SP);
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tmp = rcache_get_tmp_arg(1);
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emith_move_r_imm(tmp, pc);
|
||||
if (op == OP_TRAPA)
|
||||
emith_move_r_imm(tmp, pc);
|
||||
else if (drcf.pending_branch_indirect) {
|
||||
tmp2 = rcache_get_reg(SHR_PC, RC_GR_READ);
|
||||
emith_move_r_r(tmp, tmp2);
|
||||
} else
|
||||
emith_move_r_imm(tmp, pc - 2);
|
||||
emit_memhandler_write(2);
|
||||
// obtain new PC
|
||||
emit_memhandler_read_rr(SHR_PC, SHR_VBR, opd->imm * 4, 2);
|
||||
|
|
@ -1988,7 +2100,6 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
|
|||
goto end_op;
|
||||
case 0x0f: // MAC.L @Rm+,@Rn+ 0000nnnnmmmm1111
|
||||
emit_indirect_read_double(&tmp, &tmp2, GET_Rn(), GET_Rm(), 2);
|
||||
|
||||
sr = rcache_get_reg(SHR_SR, RC_GR_READ);
|
||||
tmp3 = rcache_get_reg(SHR_MACL, RC_GR_RMW);
|
||||
tmp4 = rcache_get_reg(SHR_MACH, RC_GR_RMW);
|
||||
|
|
@ -2087,12 +2198,12 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
|
|||
case 0x0e: // MULU.W Rm,Rn 0010nnnnmmmm1110
|
||||
case 0x0f: // MULS.W Rm,Rn 0010nnnnmmmm1111
|
||||
tmp2 = rcache_get_reg(GET_Rn(), RC_GR_READ);
|
||||
tmp3 = rcache_get_reg(GET_Rm(), RC_GR_READ);
|
||||
tmp = rcache_get_reg(SHR_MACL, RC_GR_WRITE);
|
||||
if (op & 1) {
|
||||
emith_sext(tmp, tmp2, 16);
|
||||
} else
|
||||
emith_clear_msb(tmp, tmp2, 16);
|
||||
tmp3 = rcache_get_reg(GET_Rm(), RC_GR_READ);
|
||||
tmp2 = rcache_get_tmp();
|
||||
if (op & 1) {
|
||||
emith_sext(tmp2, tmp3, 16);
|
||||
|
|
@ -2308,7 +2419,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
|
|||
}
|
||||
tmp2 = rcache_get_reg(GET_Rn(), RC_GR_RMW);
|
||||
emith_sub_r_imm(tmp2, 4);
|
||||
rcache_clean();
|
||||
rcache_clean(); // XXX
|
||||
rcache_get_reg_arg(0, GET_Rn());
|
||||
tmp3 = rcache_get_reg_arg(1, tmp);
|
||||
if (tmp == SHR_SR)
|
||||
|
|
@ -2444,6 +2555,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
|
|||
emith_bic_r_imm(sr, T);
|
||||
emith_cmp_r_imm(tmp, 0);
|
||||
emit_or_t_if_eq(sr);
|
||||
rcache_clean(); // XXX
|
||||
emith_or_r_imm(tmp, 0x80);
|
||||
tmp2 = rcache_get_tmp_arg(1); // assuming it differs to tmp
|
||||
emith_move_r_r(tmp2, tmp);
|
||||
|
|
@ -2596,7 +2708,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
|
|||
goto end_op;
|
||||
case 0x0800: // CMP/EQ #imm,R0 10001000iiiiiiii
|
||||
// XXX: could use cmn
|
||||
tmp2 = rcache_get_reg(0, RC_GR_READ);
|
||||
tmp2 = rcache_get_reg(SHR_R0, RC_GR_READ);
|
||||
sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
|
||||
emith_bic_r_imm(sr, T);
|
||||
emith_cmp_r_imm(tmp2, (s8)(op & 0xff));
|
||||
|
|
@ -2679,10 +2791,11 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
|
|||
|
||||
default:
|
||||
default_:
|
||||
if (!(op_flags[i] & OF_B_IN_DS))
|
||||
if (!(op_flags[i] & OF_B_IN_DS)) {
|
||||
elprintf_sh2(sh2, EL_ANOMALY,
|
||||
"drc: illegal op %04x @ %08x", op, pc - 2);
|
||||
exit(1);
|
||||
}
|
||||
}
|
||||
|
||||
end_op:
|
||||
|
|
@ -3268,6 +3381,15 @@ void block_stats(void)
|
|||
|
||||
void sh2_drc_flush_all(void)
|
||||
{
|
||||
#if (DRC_DEBUG & 1024)
|
||||
int i;
|
||||
printf("backtrace master:\n");
|
||||
for (i = 0; i < ARRAY_SIZE(csh2[0]); i++)
|
||||
SH2_DUMP(&csh2[0][i], "bt msh2");
|
||||
printf("backtrace slave:\n");
|
||||
for (i = 0; i < ARRAY_SIZE(csh2[1]); i++)
|
||||
SH2_DUMP(&csh2[1][i], "bt ssh2");
|
||||
#endif
|
||||
block_stats();
|
||||
flush_tcache(0);
|
||||
flush_tcache(1);
|
||||
|
|
@ -4200,13 +4322,14 @@ void scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc_out,
|
|||
if (op_flags[i] & OF_DELAY_OP) {
|
||||
switch (opd->op) {
|
||||
case OP_BRANCH:
|
||||
case OP_BRANCH_N:
|
||||
case OP_BRANCH_CT:
|
||||
case OP_BRANCH_CF:
|
||||
case OP_BRANCH_R:
|
||||
case OP_BRANCH_RF:
|
||||
elprintf(EL_ANOMALY, "%csh2 drc: branch in DS @ %08x",
|
||||
is_slave ? 's' : 'm', pc);
|
||||
opd->op = OP_UNHANDLED;
|
||||
opd->op = OP_UNDEFINED;
|
||||
op_flags[i] |= OF_B_IN_DS;
|
||||
next_is_delay = 0;
|
||||
break;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue