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memhandlers slightly improved

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git-svn-id: file:///home/notaz/opt/svn/PicoDrive@234 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz 2007-09-01 21:34:13 +00:00
parent a5ccbfbaf0
commit e5503e2f4f
7 changed files with 369 additions and 159 deletions
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37
Pico/Memory.c
View file

@ -26,6 +26,7 @@ extern unsigned int lastSSRamWrite; // used by serial SRAM code
#ifdef _ASM_MEMORY_C #ifdef _ASM_MEMORY_C
u32 PicoRead8(u32 a); u32 PicoRead8(u32 a);
u32 PicoRead16(u32 a); u32 PicoRead16(u32 a);
void PicoWrite8(u32 a,u8 d);
void PicoWriteRomHW_SSF2(u32 a,u32 d); void PicoWriteRomHW_SSF2(u32 a,u32 d);
void PicoWriteRomHW_in1 (u32 a,u32 d); void PicoWriteRomHW_in1 (u32 a,u32 d);
#endif #endif
@ -110,6 +111,38 @@ PICO_INTERNAL_ASM void PicoMemReset(void)
// ----------------------------------------------------------------- // -----------------------------------------------------------------
int PadRead(int i)
{
int pad,value,data_reg;
pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU
data_reg=Pico.ioports[i+1];
// orr the bits, which are set as output
value = data_reg&(Pico.ioports[i+4]|0x80);
if(PicoOpt & 0x20) { // 6 button gamepad enabled
int phase = Pico.m.padTHPhase[i];
if(phase == 2 && !(data_reg&0x40)) { // TH
value|=(pad&0xc0)>>2; // ?0SA 0000
return value;
} else if(phase == 3) {
if(data_reg&0x40)
value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
else
value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
return value;
}
}
if(data_reg&0x40) // TH
value|=(pad&0x3f); // ?1CB RLDU
else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
return value; // will mirror later
}
#ifndef _ASM_MEMORY_C #ifndef _ASM_MEMORY_C
// address must already be checked // address must already be checked
static int SRAMRead(u32 a) static int SRAMRead(u32 a)
@ -399,7 +432,8 @@ PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)
// ----------------------------------------------------------------- // -----------------------------------------------------------------
// Write Ram // Write Ram
static void CPU_CALL PicoWrite8(u32 a,u8 d) #ifndef _ASM_MEMORY_C
PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)
{ {
#ifdef __debug_io #ifdef __debug_io
dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc); dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
@ -416,6 +450,7 @@ static void CPU_CALL PicoWrite8(u32 a,u8 d)
a&=0xffffff; a&=0xffffff;
OtherWrite8(a,d,8); OtherWrite8(a,d,8);
} }
#endif
void CPU_CALL PicoWrite16(u32 a,u16 d) void CPU_CALL PicoWrite16(u32 a,u16 d)
{ {

206
Pico/Memory.s
View file

@ -7,6 +7,7 @@
@ All Rights Reserved @ All Rights Reserved
.include "port_config.s"
.text .text
@ -140,7 +141,10 @@ m_read32_table:
.global PicoRead8 .global PicoRead8
.global PicoRead16 .global PicoRead16
.global PicoRead32 .global PicoRead32
.global PicoWrite8
.global PicoWriteRomHW_SSF2 .global PicoWriteRomHW_SSF2
.global m_m68k_read8_misc
.global m_m68k_write8_misc
PicoMemReset: PicoMemReset:
@ -359,12 +363,70 @@ m_read8_rom12: @ 0x900000 - 0x97ffff
m_read8_rom13: @ 0x980000 - 0x9fffff m_read8_rom13: @ 0x980000 - 0x9fffff
m_read8_rom 0x13 m_read8_rom 0x13
m_m68k_read8_misc:
m_read8_misc: m_read8_misc:
bic r2, r0, #0x00ff bic r2, r0, #0x001f @ most commonly we get i/o port read,
bic r2, r2, #0xbf00 cmp r2, #0xa10000 @ so check for it first
cmp r2, #0xa00000 @ Z80 RAM? bne m_read8_misc2
ldreq r2, =z80Read8 m_read8_misc_io:
ands r0, r0, #0x1e
beq m_read8_misc_hwreg
cmp r0, #4
ldrle r2, =PadRead
movlt r0, #0
moveq r0, #1
bxle r2
ldr r3, =(Pico+0x22000)
mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])
ldrb r0, [r3, r0]
bx lr
m_read8_misc_hwreg:
ldr r3, =(Pico+0x22200)
ldrb r0, [r3, #0x0f] @ Pico.m.hardware
bx lr
m_read8_misc2:
mov r2, #0xa10000 @ games also like to poll busreq,
orr r2, r2, #0x001100 @ so we'll try it now
cmp r0, r2
ldreq r2, =z80ReadBusReq
bxeq r2 bxeq r2
and r2, r0, #0xff0000 @ finally it might be
cmp r2, #0xa00000 @ z80 area
bne m_read8_misc3
tst r0, #0x4000
ldreq r2, =z80Read8 @ z80 RAM
bxeq r2
and r2, r0, #0x6000
cmp r2, #0x4000
mvnne r0, #0
bxne lr @ invalid
.if EXTERNAL_YM2612
ldr r1, =PicoOpt
ldr r1, [r1]
tst r1, #1
beq m_read8_fake_ym2612
tst r1, #0x200
ldreq r2, =YM2612Read_
ldrne r2, =YM2612Read_940
.else
ldr r2, =YM2612Read_
.endif
bx r2 @ ym2612
m_read8_fake_ym2612:
ldr r3, =(Pico+0x22200)
ldrb r0, [r3, #8] @ Pico.m.rotate
add r1, r0, #1
strb r1, [r3, #8]
and r0, r0, #3
bx lr
m_read8_misc3:
@ if everything else fails, use generic handler
stmfd sp!,{r0,lr} stmfd sp!,{r0,lr}
bic r0, r0, #1 bic r0, r0, #1
mov r1, #8 mov r1, #8
@ -374,6 +436,7 @@ m_read8_misc:
moveq r0, r0, lsr #8 moveq r0, r0, lsr #8
bx lr bx lr
m_read8_vdp: m_read8_vdp:
tst r0, #0x70000 tst r0, #0x70000
tsteq r0, #0x000e0 tsteq r0, #0x000e0
@ -738,3 +801,138 @@ pwr_banking:
bx lr bx lr
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Here we only handle most often used locations,
@ everything else is passed to generic handlers
PicoWrite8: @ u32 a, u8 d
bic r0, r0, #0xff000000
and r2, r0, #0x00e00000
cmp r2, #0x00e00000 @ RAM?
ldr r3, =Pico
biceq r0, r0, #0x00ff0000
eoreq r0, r0, #1
streqb r1, [r3, r0]
bxeq lr
m_m68k_write8_misc:
bic r2, r0, #0x1f @ most commonly we get i/o port write,
cmp r2, #0xa10000 @ so check for it first
bne m_write8_misc2
m_write8_io:
ldr r2, =PicoOpt
and r0, r0, #0x1e
ldr r2, [r2]
ldr r3, =(Pico+0x22000) @ Pico.ioports
tst r2, #0x20 @ 6 button pad?
streqb r1, [r3, r0, lsr #1]
bxeq lr
cmp r0, #2
cmpne r0, #4
bne m_write8_io_done @ not likely to happen
add r2, r3, #0x200 @ Pico+0x22200
mov r12,#0
cmp r0, #2
streqb r12,[r2,#0x18]
strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0
tst r1, #0x40 @ TH
beq m_write8_io_done
ldrb r12,[r3, r0, lsr #1]
tst r12,#0x40
bne m_write8_io_done
cmp r0, #2
ldreqb r12,[r2,#0x0a]
ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
add r12,r12,#1
streqb r12,[r2,#0x0a]
strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
m_write8_io_done:
strb r1, [r3, r0, lsr #1]
bx lr
m_write8_misc2:
and r2, r0, #0xff0000
cmp r2, #0xa00000 @ z80 area?
bne m_write8_not_z80
tst r0, #0x4000
bne m_write8_z80_not_ram
ldr r3, =(Pico+0x20000) @ Pico.zram
add r2, r3, #0x02200 @ Pico+0x22200
ldrb r2, [r2, #9] @ Pico.m.z80Run
bic r0, r0, #0xff0000
bic r0, r0, #0x00e000
tst r2, #1
streqb r1, [r3, r0] @ zram
bx lr
m_write8_z80_not_ram:
and r2, r0, #0x6000
cmp r2, #0x4000
bne m_write8_z80_not_ym2612
ldr r2, =PicoOpt
and r0, r0, #3
ldr r2, [r2]
tst r2, #1
bxeq lr
stmfd sp!,{lr}
.if EXTERNAL_YM2612
tst r2, #0x200
ldreq r2, =YM2612Write_
ldrne r2, =YM2612Write_940
mov lr, pc
bx r2
.else
bl YM2612Write_
.endif
ldr r2, =emustatus
ldmfd sp!,{lr}
ldr r1, [r2]
orr r1, r0, r2
str r1, [r2] @ emustatus|=YM2612Write(a&3, d);
bx lr
m_write8_z80_not_ym2612: @ not too likely
mov r2, r0, lsl #17
bic r2, r2, #6<<17
mov r3, #0x7f00
orr r3, r3, #0x0011
cmp r3, r2, lsr #17 @ psg @ z80 area?
beq m_write8_psg
and r2, r0, #0x7f00
cmp r2, #0x6000 @ bank register?
bxne lr @ invalid write
m_write8_z80_bank_reg:
ldr r3, =(Pico+0x22208) @ Pico.m
ldrh r2, [r3, #0x0a]
mov r1, r1, lsr #8
orr r2, r1, r2, lsr #1
bic r2, r2, #0xfe00
strh r2, [r3, #0x0a]
bx lr
m_write8_not_z80:
and r2, r0, #0xe70000
cmp r2, #0xc00000 @ VDP area?
bne m_write8_misc4
and r2, r0, #0xf9
cmp r2, #0x11
bne m_write8_misc4
m_write8_psg:
ldr r2, =PicoOpt
mov r0, r1
ldr r2, [r2]
tst r2, #2
bxeq lr
ldr r2, =SN76496Write
bx r2
m_write8_misc4:
@ passthrough
ldr r2, =OtherWrite8
bx r2

225
Pico/MemoryCmn.c
View file

@ -15,38 +15,6 @@ u32 OtherRead16End(u32 a, int realsize);
static void OtherWrite8End(u32 a,u32 d,int realsize); static void OtherWrite8End(u32 a,u32 d,int realsize);
#endif #endif
static int PadRead(int i)
{
int pad=0,value=0,TH;
pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU
TH=Pico.ioports[i+1]&0x40;
if(PicoOpt & 0x20) { // 6 button gamepad enabled
int phase = Pico.m.padTHPhase[i];
if(phase == 2 && !TH) {
value=(pad&0xc0)>>2; // ?0SA 0000
goto end;
} else if(phase == 3 && TH) {
value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
goto end;
} else if(phase == 3 && !TH) {
value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
goto end;
}
}
if(TH) value=(pad&0x3f); // ?1CB RLDU
else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
end:
// orr the bits, which are set as output
value |= Pico.ioports[i+1]&Pico.ioports[i+4];
return value; // will mirror later
}
#ifndef _ASM_MEMORY_C #ifndef _ASM_MEMORY_C
static static
@ -78,6 +46,50 @@ u8 z80Read8(u32 a)
return Pico.zram[a]; return Pico.zram[a];
} }
#ifndef _ASM_MEMORY_C
static
#endif
u32 z80ReadBusReq(void)
{
u32 d=Pico.m.z80Run&1;
if (!d) {
// needed by buggy Terminator (Sega CD)
int stop_before = SekCyclesDone() - z80stopCycle;
dprintf("stop before: %i", stop_before);
if (stop_before > 0 && stop_before <= 32) // Gens uses 16 here
d = 1; // bus not yet available
}
// |=0x80 for Shadow of the Beast & Super Offroad
return d|0x80;
}
#ifndef _ASM_MEMORY_C
static
#endif
void z80WriteBusReq(u32 d)
{
d&=1; d^=1;
if(!d) {
// this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
if (Pico.m.z80Run) {
int lineCycles;
z80stopCycle = SekCyclesDone();
if (Pico.m.z80Run&2)
lineCycles=(488-SekCyclesLeft)&0x1ff;
else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line
if (lineCycles > 0 && lineCycles <= 488) {
dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5));
lineCycles=(lineCycles>>1)-(lineCycles>>5);
z80_run(lineCycles);
}
}
} else {
z80startCycle = SekCyclesDone();
//if(Pico.m.scanline != -1)
}
dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);
Pico.m.z80Run=(u8)d;
}
#ifndef _ASM_MEMORY_C #ifndef _ASM_MEMORY_C
static static
@ -86,6 +98,25 @@ u32 OtherRead16(u32 a, int realsize)
{ {
u32 d=0; u32 d=0;
if ((a&0xffffe0)==0xa10000) { // I/O ports
a=(a>>1)&0xf;
switch(a) {
case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
case 1: d=PadRead(0); break;
case 2: d=PadRead(1); break;
default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
}
d|=d<<8;
goto end;
}
// |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers
if (a==0xa11100) { // z80 busreq
d=(z80ReadBusReq()<<8)|Pico.m.rotate++;
dprintf("get_zrun: %04x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), SekPc);
goto end;
}
if ((a&0xff0000)==0xa00000) { if ((a&0xff0000)==0xa00000) {
if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped) if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled
@ -98,35 +129,6 @@ u32 OtherRead16(u32 a, int realsize)
goto end; goto end;
} }
if ((a&0xffffe0)==0xa10000) { // I/O ports
a=(a>>1)&0xf;
switch(a) {
case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;
case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;
default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
}
d|=d<<8;
goto end;
}
// |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers
if (a==0xa11100) { // z80 busreq
d=Pico.m.z80Run&1;
#if 1
if (!d) {
// needed by buggy Terminator (Sega CD)
int stop_before = SekCyclesDone() - z80stopCycle;
dprintf("stop before: %i", stop_before);
if (stop_before > 0 && stop_before <= 32) // Gens uses 16 here
d = 1; // bus not yet available
}
#endif
d=(d<<8)|0x8000|Pico.m.rotate++;
dprintf("get_zrun: %04x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), SekPc);
goto end;
}
#ifndef _ASM_MEMORY_C #ifndef _ASM_MEMORY_C
if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; } if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
#endif #endif
@ -137,63 +139,41 @@ end:
return d; return d;
} }
static void IoWrite8(u32 a, u32 d)
//extern UINT32 mz80GetRegisterValue(void *, UINT32); {
a=(a>>1)&0xf;
// 6 button gamepad: if TH went from 0 to 1, gamepad changes state
if(PicoOpt&0x20) {
if(a==1) {
Pico.m.padDelay[0] = 0;
if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
}
else if(a==2) {
Pico.m.padDelay[1] = 0;
if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
}
}
Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
}
#ifndef _ASM_CD_MEMORY_C #ifndef _ASM_CD_MEMORY_C
static static
#endif #endif
void OtherWrite8(u32 a,u32 d,int realsize) void OtherWrite8(u32 a,u32 d)
{ {
#ifndef _ASM_MEMORY_C
if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram
if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound
if ((a&0xffffe0)==0xa10000) { // I/O ports if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
a=(a>>1)&0xf; #endif
// 6 button gamepad: if TH went from 0 to 1, gamepad changes state if (a==0xa11100) { z80WriteBusReq(d); return; }
if(PicoOpt&0x20) {
if(a==1) {
Pico.m.padDelay[0] = 0;
if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
}
else if(a==2) {
Pico.m.padDelay[1] = 0;
if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
}
}
Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
return;
}
if (a==0xa11100) {
//int lineCycles=(488-SekCyclesLeft)&0x1ff;
d&=1; d^=1;
if(!d) {
// this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
if (Pico.m.z80Run) {
int lineCycles;
z80stopCycle = SekCyclesDone();
if (Pico.m.z80Run&2)
lineCycles=(488-SekCyclesLeft)&0x1ff;
else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line
if (lineCycles > 0 && lineCycles <= 488) {
dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5));
lineCycles=(lineCycles>>1)-(lineCycles>>5);
z80_run(lineCycles);
}
}
} else {
z80startCycle = SekCyclesDone();
//if(Pico.m.scanline != -1)
}
dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);
Pico.m.z80Run=(u8)d; return;
}
if (a==0xa11200) { if (a==0xa11200) {
dprintf("write z80Reset: %02x", d); dprintf("write z80Reset: %02x", d);
if(!(d&1)) z80_reset(); if(!(d&1)) z80_reset();
return; return;
} }
#ifndef _ASM_MEMORY_C
if ((a&0xff7f00)==0xa06000) // Z80 BANK register if ((a&0xff7f00)==0xa06000) // Z80 BANK register
{ {
Pico.m.z80_bank68k>>=1; Pico.m.z80_bank68k>>=1;
@ -201,13 +181,13 @@ void OtherWrite8(u32 a,u32 d,int realsize)
Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
return; return;
} }
#endif
if ((a&0xe700e0)==0xc00000) { if ((a&0xe700e0)==0xc00000) {
PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
return; return;
} }
OtherWrite8End(a, d, realsize); OtherWrite8End(a, d, 8);
} }
@ -217,29 +197,22 @@ static
void OtherWrite16(u32 a,u32 d) void OtherWrite16(u32 a,u32 d)
{ {
if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }
if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only) if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
if ((a&0xffffe0)==0xa10000) { // I/O ports if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound (??)
a=(a>>1)&0xf; if ((a&0xff7f00)==0xa06000) // Z80 BANK register
// 6 button gamepad: if TH went from 0 to 1, gamepad changes state {
if(PicoOpt&0x20) { Pico.m.z80_bank68k>>=1;
if(a==1) { Pico.m.z80_bank68k|=(d&1)<<8;
Pico.m.padDelay[0] = 0; Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
}
else if(a==2) {
Pico.m.padDelay[1] = 0;
if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
}
}
Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
return; return;
} }
if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }
if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }
OtherWrite8(a, d>>8, 16); OtherWrite8End(a, d>>8, 16);
OtherWrite8(a+1,d&0xff, 16); OtherWrite8End(a+1,d&0xff, 16);
} }

17
Pico/PicoInt.h
View file

@ -154,17 +154,17 @@ struct PicoMisc
{ {
unsigned char rotate; unsigned char rotate;
unsigned char z80Run; unsigned char z80Run;
unsigned char padTHPhase[2]; // phase of gamepad TH switches unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches
short scanline; // 0 to 261||311; -1 in fast mode short scanline; // 04 0 to 261||311; -1 in fast mode
char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before) char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)
unsigned char hardware; // Hardware value for country unsigned char hardware; // 07 Hardware value for country
unsigned char pal; // 1=PAL 0=NTSC unsigned char pal; // 08 1=PAL 0=NTSC
unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access) unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)
unsigned short z80_bank68k; unsigned short z80_bank68k; // 0a
unsigned short z80_lastaddr; // this is for Z80 faking unsigned short z80_lastaddr; // this is for Z80 faking
unsigned char z80_fakeval; unsigned char z80_fakeval;
unsigned char pad0; unsigned char pad0;
unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
unsigned short sram_addr; // EEPROM address register unsigned short sram_addr; // EEPROM address register
unsigned char sram_cycle; // EEPROM SRAM cycle number unsigned char sram_cycle; // EEPROM SRAM cycle number
unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs
@ -297,6 +297,7 @@ PICO_INTERNAL int PicoInitPc(unsigned int pc);
PICO_INTERNAL_ASM unsigned int CPU_CALL PicoRead32(unsigned int a); PICO_INTERNAL_ASM unsigned int CPU_CALL PicoRead32(unsigned int a);
PICO_INTERNAL void PicoMemSetup(void); PICO_INTERNAL void PicoMemSetup(void);
PICO_INTERNAL_ASM void PicoMemReset(void); PICO_INTERNAL_ASM void PicoMemReset(void);
PICO_INTERNAL int PadRead(int i);
PICO_INTERNAL unsigned char z80_read(unsigned short a); PICO_INTERNAL unsigned char z80_read(unsigned short a);
PICO_INTERNAL unsigned short z80_read16(unsigned short a); PICO_INTERNAL unsigned short z80_read16(unsigned short a);
PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a); PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a);

11
Pico/cd/Memory.s
View file

@ -139,6 +139,8 @@ m_s68k_decode_write_table:
.extern PicoCpuS68k .extern PicoCpuS68k
.extern s68k_poll_detect .extern s68k_poll_detect
.extern SN76496Write .extern SN76496Write
.extern m_m68k_read8_misc
.extern m_m68k_write8_misc
@ r0=reg3, r1-r3=temp @ r0=reg3, r1-r3=temp
@ -502,7 +504,7 @@ m_m68k_read8_system_io:
bic r2, r0, #0xfe0000 bic r2, r0, #0xfe0000
bic r2, r2, #0x3f bic r2, r2, #0x3f
cmp r2, #0x012000 cmp r2, #0x012000
bne m_m68k_read8_misc bne m_m68k_read8_misc @ now from Pico/Memory.s
ldr r1, =(Pico+0x22200) ldr r1, =(Pico+0x22200)
and r0, r0, #0x3f and r0, r0, #0x3f
@ -588,7 +590,7 @@ m_m68k_read8_hi:
ldrb r0, [r1, r0] ldrb r0, [r1, r0]
bx lr bx lr
/*
m_m68k_read8_misc: m_m68k_read8_misc:
bic r2, r0, #0x00ff bic r2, r0, #0x00ff
bic r2, r2, #0xbf00 bic r2, r2, #0xbf00
@ -604,7 +606,7 @@ m_m68k_read8_misc:
tst r1, #1 tst r1, #1
moveq r0, r0, lsr #8 moveq r0, r0, lsr #8
bx lr bx lr
*/
m_m68k_read8_vdp: m_m68k_read8_vdp:
tst r0, #0x70000 tst r0, #0x70000
@ -1116,7 +1118,8 @@ m_m68k_write8_system_io:
cmp r2, #0x012000 cmp r2, #0x012000
beq m68k_reg_write8 beq m68k_reg_write8
mov r2, #8 mov r2, #8
b OtherWrite8 @ b OtherWrite8
b m_m68k_write8_misc
m_m68k_write8_vdp: m_m68k_write8_vdp:

29
cpu/DrZ80/drz80.s
View file

@ -111,40 +111,37 @@ DrZ80Ver: .long 0x0001
.if DRZ80_FOR_PICODRIVE .if DRZ80_FOR_PICODRIVE
.macro YM2612Read_and_ret8 .macro YM2612Read_and_ret8
stmfd sp!,{r3,r12,lr} stmfd sp!,{r3,r12,lr}
.if EXTERNAL_YM2612 .if EXTERNAL_YM2612
ldr r1,=PicoOpt ldr r1,=PicoOpt
ldr r1,[r1] ldr r1,[r1]
tst r1,#0x200 tst r1,#0x200
bne 10f ldrne r2, =YM2612Read_940
bl YM2612Read_ ldreq r2, =YM2612Read_
ldmfd sp!,{r3,r12,pc} mov lr,pc
10: bx r2
bl YM2612Read_940
.else .else
bl YM2612Read_ bl YM2612Read_
.endif .endif
ldmfd sp!,{r3,r12,pc} ldmfd sp!,{r3,r12,pc}
.endm .endm
.macro YM2612Read_and_ret16 .macro YM2612Read_and_ret16
stmfd sp!,{r3,r12,lr} stmfd sp!,{r3,r12,lr}
.if EXTERNAL_YM2612 .if EXTERNAL_YM2612
ldr r0,=PicoOpt ldr r0,=PicoOpt
ldr r0,[r0] ldr r0,[r0]
tst r0,#0x200 tst r0,#0x200
bne 10f ldrne r2, =YM2612Read_940
bl YM2612Read_ ldreq r2, =YM2612Read_
orr r0,r0,r0,lsl #8 mov lr,pc
ldmfd sp!,{r3,r12,pc} bx r2
10:
bl YM2612Read_940
orr r0,r0,r0,lsl #8 orr r0,r0,r0,lsl #8
.else .else
bl YM2612Read_ bl YM2612Read_
orr r0,r0,r0,lsl #8 orr r0,r0,r0,lsl #8
.endif .endif
ldmfd sp!,{r3,r12,pc} ldmfd sp!,{r3,r12,pc}
.endm .endm
pico_z80_read8: @ addr pico_z80_read8: @ addr
@ -173,7 +170,7 @@ pico_z80_read8: @ addr
cmp r1,#2 @ YM2612 (0x4000-0x5fff) cmp r1,#2 @ YM2612 (0x4000-0x5fff)
bne 0f bne 0f
and r0,r0,#3 and r0,r0,#3
YM2612Read_and_ret8 YM2612Read_and_ret8
0: 0:
cmp r0,#0x4000 cmp r0,#0x4000
movge r0,#0xff movge r0,#0xff

3
platform/linux/Makefile
View file

@ -74,6 +74,9 @@ PicoDrive : $(OBJS) ../gp2x/helix/helix_mp3_x86.a
@$(GCC) $(COPT) $^ $(LDFLAGS) -lm -lpng -Wl,-Map=PicoDrive.map -o $@ @$(GCC) $(COPT) $^ $(LDFLAGS) -lm -lpng -Wl,-Map=PicoDrive.map -o $@
../../cpu/musashi/m68kops.c :
@make -C ../../cpu/musashi
../../cpu/mz80/mz80.o : ../../cpu/mz80/mz80.asm ../../cpu/mz80/mz80.o : ../../cpu/mz80/mz80.asm
@echo $@ @echo $@
@nasm -f elf $< -o $@ @nasm -f elf $< -o $@