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sh2 drc: RISC-V (RV64IM) code emitter, some work on MIPS64

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This commit is contained in:
kub 2019-11-13 21:05:35 +01:00
parent aaea8e3ecd
commit e7ee501075
21 changed files with 395 additions and 444 deletions
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2
cpu/sh2/compiler.h
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@ -41,6 +41,8 @@ unsigned short scan_block(unsigned int base_pc, int is_slave,
#define DRC_SR_REG "r28"
#elif defined(__mips__)
#define DRC_SR_REG "s6"
#elif defined(__riscv__) || defined(__riscv)
#define DRC_SR_REG "s11"
#elif defined(__i386__)
#define DRC_SR_REG "edi"
#elif defined(__x86_64__)