mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
32x: drc: more wip, some games work, debug stats
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@814 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
4c67e7ad99
commit
e898de13cd
8 changed files with 195 additions and 134 deletions
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@ -1,5 +1,12 @@
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#include <stdarg.h>
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#if (DRC_DEBUG & 1)
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#define COUNT_OP \
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host_insn_count++
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#else
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#define COUNT_OP
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#endif
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// TODO: move
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static int reg_map_g2h[] = {
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-1, -1, -1, -1,
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@ -20,11 +27,16 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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tcache_ptr = (char *)tcache_ptr + sizeof(type); \
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}
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#define EMIT_OP(op) { \
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COUNT_OP; \
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EMIT(op, u8); \
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}
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#define EMIT_MODRM(mod,r,rm) \
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EMIT(((mod)<<6) | ((r)<<3) | (rm), u8)
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#define EMIT_OP_MODRM(op,mod,r,rm) { \
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EMIT(op, u8); \
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EMIT_OP(op); \
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EMIT_MODRM(mod, r, rm); \
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}
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@ -32,7 +44,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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EMIT_OP_MODRM(0x8b, 3, dst, src)
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#define emith_move_r_imm(r, imm) { \
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EMIT(0xb8 + (r), u8); \
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EMIT_OP(0xb8 + (r)); \
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EMIT(imm, u32); \
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}
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@ -65,26 +77,24 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_test_t() { \
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if (reg_map_g2h[SHR_SR] == -1) { \
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EMIT(0xf6, u8); \
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EMIT_MODRM(1, 0, 5); \
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EMIT_OP_MODRM(0xf6, 1, 0, 5); \
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EMIT(SHR_SR * 4, u8); \
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EMIT(0x01, u8); /* test [ebp+SHR_SR], byte 1 */ \
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} else { \
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EMIT(0xf7, u8); \
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EMIT_MODRM(3, 0, reg_map_g2h[SHR_SR]); \
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EMIT_OP_MODRM(0xf7, 3, 0, reg_map_g2h[SHR_SR]); \
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EMIT(0x01, u16); /* test <reg>, word 1 */ \
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} \
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}
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#define emith_jump(ptr) { \
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u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \
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EMIT(0xe9, u8); \
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EMIT_OP(0xe9); \
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EMIT(disp, u32); \
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}
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#define emith_call(ptr) { \
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u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \
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EMIT(0xe8, u8); \
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EMIT_OP(0xe8); \
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EMIT(disp, u32); \
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}
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@ -1,3 +1,6 @@
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/*
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* vim:shiftwidth=2:expandtab
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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@ -6,8 +9,26 @@
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#include "compiler.h"
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#include "../drc/cmn.h"
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#ifndef DRC_DEBUG
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#define DRC_DEBUG 0
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#endif
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#if DRC_DEBUG
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#include "mame/sh2dasm.h"
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#include <platform/linux/host_dasm.h>
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static int insns_compiled, hash_collisions, host_insn_count;
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#endif
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#if (DRC_DEBUG & 2)
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static void *tcache_dsm_ptr = tcache;
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static char sh2dasm_buff[64];
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#endif
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#define BLOCK_CYCLE_LIMIT 100
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static void *tcache_ptr;
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#include "../drc/emit_x86.c"
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typedef enum {
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SHR_R0 = 0, SHR_R15 = 15,
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SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
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@ -20,28 +41,19 @@ typedef struct block_desc_ {
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struct block_desc_ *next; // next block with the same PC hash
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} block_desc;
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#define MAX_BLOCK_COUNT 1024
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#define MAX_BLOCK_COUNT (4*1024)
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static block_desc *block_table;
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static int block_count;
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#define MAX_HASH_ENTRIES 1024
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#define HASH_MASK (MAX_HASH_ENTRIES - 1)
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#ifdef DRC_DEBUG
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#include "mame/sh2dasm.h"
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#include <platform/linux/host_dasm.h>
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static void *tcache_dsm_ptr = tcache;
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#endif
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static void *tcache_ptr;
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#include "../drc/emit_x86.c"
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extern void sh2_drc_entry(SH2 *sh2, void *block);
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extern void sh2_drc_exit(void);
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// tmp
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extern void __attribute__((regparm(2))) sh2_do_op(SH2 *sh2, int opcode);
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static void __attribute__((regparm(1))) sh2_test_irq(SH2 *sh2);
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static void *dr_find_block(block_desc *tab, u32 addr)
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{
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@ -121,18 +133,9 @@ static void emit_braf(sh2_reg_e reg, u32 pc)
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emith_move_r_r(0, host_reg);
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emith_add_r_imm(0, pc);
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emith_ctx_write(0, SHR_PC * 4);
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emith_ctx_write(0, SHR_PPC * 4);
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}
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// FIXME: this is broken, delayed insn shouldn't affect branch
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#define DELAYED_OP \
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if (delayed_op < 0) { \
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delayed_op = op; \
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goto next_op; \
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} \
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delayed_op = -1; \
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pc -= 2 /* adjust back */
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/*
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static int sh2_translate_op4(int op)
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{
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@ -149,43 +152,52 @@ static int sh2_translate_op4(int op)
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}
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*/
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#define DELAYED_OP \
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delayed_op = 2
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#define CHECK_UNHANDLED_BITS(mask) { \
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if ((op & (mask)) != 0) \
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goto default_; \
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}
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static void *sh2_translate(SH2 *sh2, block_desc *other_block)
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{
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void *block_entry = tcache_ptr;
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block_desc *this_block;
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unsigned int pc = sh2->pc;
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int op, delayed_op = -1;
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int op, delayed_op = 0, test_irq = 0;
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int cycles = 0;
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u32 tmp;
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u32 tmp, tmp2;
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this_block = dr_add_block(pc, block_entry);
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if (other_block != NULL) {
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printf("hash collision between %08x and %08x\n", pc, other_block->addr);
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if (other_block != NULL)
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this_block->next = other_block;
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}
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HASH_FUNC(sh2->pc_hashtab, pc) = this_block;
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#ifdef DRC_DEBUG
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printf("== %csh2 block #%d %08x %p\n", sh2->is_slave ? 's' : 'm',
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#if (DRC_DEBUG & 1)
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printf("== %csh2 block #%d %08x -> %p\n", sh2->is_slave ? 's' : 'm',
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block_count, pc, block_entry);
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if (other_block != NULL) {
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printf(" hash collision with %08x\n", other_block->addr);
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hash_collisions++;
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}
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#endif
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while (cycles < BLOCK_CYCLE_LIMIT)
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while (cycles < BLOCK_CYCLE_LIMIT || delayed_op)
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{
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if (delayed_op >= 0)
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op = delayed_op;
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else {
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next_op:
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op = p32x_sh2_read16(pc, sh2->is_slave);
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if (delayed_op > 0)
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delayed_op--;
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#ifdef DRC_DEBUG
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{
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char buff[64];
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DasmSH2(buff, pc, op);
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printf("%08x %04x %s\n", pc, op, buff);
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}
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op = p32x_sh2_read16(pc, sh2->is_slave);
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#if (DRC_DEBUG & 3)
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insns_compiled++;
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#if (DRC_DEBUG & 2)
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DasmSH2(sh2dasm_buff, pc, op);
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printf("%08x %04x %s\n", pc, op, sh2dasm_buff);
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#endif
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#endif
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}
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pc += 2;
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cycles++;
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@ -193,60 +205,71 @@ next_op:
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switch ((op >> 12) & 0x0f)
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{
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case 0x00:
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// RTS 0000000000001011
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if (op == 0x000b) {
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switch (op & 0x0f) {
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case 0x03:
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CHECK_UNHANDLED_BITS(0xd0);
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// BRAF Rm 0000mmmm00100011
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// BSRF Rm 0000mmmm00000011
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DELAYED_OP;
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emit_move_r_r(SHR_PC, SHR_PR);
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if (!(op & 0x20))
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emit_move_r_imm32(SHR_PR, pc + 2);
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emit_braf((op >> 8) & 0x0f, pc + 2);
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cycles++;
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goto end_block;
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}
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// RTE 0000000000101011
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if (op == 0x002b) {
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goto end_op;
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case 0x09:
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CHECK_UNHANDLED_BITS(0xf0);
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// NOP 0000000000001001
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goto end_op;
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case 0x0b:
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CHECK_UNHANDLED_BITS(0xd0);
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DELAYED_OP;
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cycles++;
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//emit_move_r_r(SHR_PC, SHR_PR);
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emit_move_r_imm32(SHR_PC, pc - 4);
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emith_pass_arg(2, sh2, op);
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emith_call(sh2_do_op);
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goto end_block;
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}
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// BRAF Rm 0000mmmm00100011
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if (op == 0x0023) {
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DELAYED_OP;
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cycles++;
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emit_braf((op >> 8) & 0x0f, pc);
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goto end_block;
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}
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// BSRF Rm 0000mmmm00000011
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if (op == 0x0003) {
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DELAYED_OP;
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emit_move_r_imm32(SHR_PR, pc);
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emit_braf((op >> 8) & 0x0f, pc);
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cycles++;
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goto end_block;
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if (!(op & 0x20)) {
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// RTS 0000000000001011
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emit_move_r_r(SHR_PPC, SHR_PR);
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cycles++;
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} else {
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// RTE 0000000000101011
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//emit_move_r_r(SHR_PC, SHR_PR);
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emit_move_r_imm32(SHR_PC, pc - 2);
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emith_pass_arg(2, sh2, op);
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emith_call(sh2_do_op);
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emit_move_r_r(SHR_PPC, SHR_PC);
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test_irq = 1;
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cycles += 3;
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}
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goto end_op;
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}
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goto default_;
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case 0x04:
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// JMP @Rm 0100mmmm00101011
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if ((op & 0xff) == 0x2b) {
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switch (op & 0x0f) {
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case 0x07:
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if ((op & 0xf0) != 0)
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goto default_;
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// LDC.L @Rm+,SR 0100mmmm00000111
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test_irq = 1;
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goto default_;
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case 0x0b:
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if ((op & 0xd0) != 0)
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goto default_;
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// JMP @Rm 0100mmmm00101011
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// JSR @Rm 0100mmmm00001011
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DELAYED_OP;
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emit_move_r_r(SHR_PC, (op >> 8) & 0x0f);
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if (!(op & 0x20))
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emit_move_r_imm32(SHR_PR, pc + 2);
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emit_move_r_r(SHR_PPC, (op >> 8) & 0x0f);
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cycles++;
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goto end_block;
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}
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// JSR @Rm 0100mmmm00001011
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if ((op & 0xff) == 0x0b) {
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DELAYED_OP;
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emit_move_r_imm32(SHR_PR, pc);
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emit_move_r_r(SHR_PC, (op >> 8) & 0x0f);
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cycles++;
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goto end_block;
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goto end_op;
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case 0x0e:
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if ((op & 0xf0) != 0)
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goto default_;
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// LDC Rm,SR 0100mmmm00001110
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test_irq = 1;
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goto default_;
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}
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goto default_;
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case 0x08: {
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int adj = 2;
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case 0x08:
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switch (op & 0x0f00) {
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// BT/S label 10001101dddddddd
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case 0x0d00:
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@ -254,35 +277,36 @@ next_op:
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case 0x0f00:
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DELAYED_OP;
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cycles--;
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adj = 0;
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// fallthrough
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// BT label 10001001dddddddd
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case 0x0900:
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// BF label 10001011dddddddd
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case 0x0b00:
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cycles += 2;
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emit_move_r_imm32(SHR_PC, pc);
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emith_test_t();
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tmp = ((signed int)(op << 24) >> 23);
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EMIT_CONDITIONAL(emit_move_r_imm32(SHR_PC, pc + tmp + adj), (op & 0x0200) ? 1 : 0);
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goto end_block;
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tmp2 = delayed_op ? SHR_PPC : SHR_PC;
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emit_move_r_imm32(tmp2, pc + (delayed_op ? 2 : 0));
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emith_test_t();
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EMIT_CONDITIONAL(emit_move_r_imm32(tmp2, pc + tmp + 2), (op & 0x0200) ? 1 : 0);
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cycles += 2;
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if (!delayed_op)
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goto end_block;
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goto end_op;
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}
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goto default_;
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}
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case 0x0a:
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// BRA label 1010dddddddddddd
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DELAYED_OP;
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do_bra:
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tmp = ((signed int)(op << 20) >> 19);
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emit_move_r_imm32(SHR_PC, pc + tmp);
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emit_move_r_imm32(SHR_PPC, pc + tmp + 2);
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cycles++;
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goto end_block;
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break;
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case 0x0b:
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// BSR label 1011dddddddddddd
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DELAYED_OP;
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emit_move_r_imm32(SHR_PR, pc);
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emit_move_r_imm32(SHR_PR, pc + 2);
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goto do_bra;
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default:
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@ -293,7 +317,18 @@ next_op:
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break;
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}
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#ifdef DRC_DEBUG
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end_op:
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if (delayed_op == 1) {
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emit_move_r_r(SHR_PC, SHR_PPC);
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break;
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}
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if (test_irq && delayed_op != 2) {
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emith_pass_arg(1, sh2);
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emith_call(sh2_test_irq);
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break;
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}
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#if (DRC_DEBUG & 2)
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host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
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tcache_dsm_ptr = tcache_ptr;
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#endif
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@ -312,15 +347,21 @@ end_block:
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emith_sub_r_imm(reg_map_g2h[SHR_SR], cycles << 12);
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emith_jump(sh2_drc_exit);
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#ifdef DRC_DEBUG
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#if (DRC_DEBUG & 2)
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host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
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tcache_dsm_ptr = tcache_ptr;
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#endif
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#if (DRC_DEBUG & 1)
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printf(" tcache %d/%d, hash collisions %d/%d, insns %d -> %d %.3f\n",
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(char *)tcache_ptr - (char *)tcache, DRC_TCACHE_SIZE,
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hash_collisions, block_count, insns_compiled, host_insn_count,
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(double)host_insn_count / insns_compiled);
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#endif
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return block_entry;
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unimplemented:
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// last op
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#ifdef DRC_DEBUG
|
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#if (DRC_DEBUG & 2)
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host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
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tcache_dsm_ptr = tcache_ptr;
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#endif
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@ -344,7 +385,7 @@ void __attribute__((noinline)) sh2_drc_dispatcher(SH2 *sh2)
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if (block == NULL)
|
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block = sh2_translate(sh2, bd);
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|
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#ifdef DRC_DEBUG
|
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#if (DRC_DEBUG & 4)
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printf("= %csh2 enter %08x %p\n", sh2->is_slave ? 's' : 'm', sh2->pc, block);
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#endif
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sh2_drc_entry(sh2, block);
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@ -364,31 +405,29 @@ void sh2_execute(SH2 *sh2, int cycles)
|
|||
sh2->cycles_done += cycles - ((signed int)sh2->sr >> 12);
|
||||
}
|
||||
|
||||
|
||||
static int cmn_init_done;
|
||||
|
||||
static int common_init(void)
|
||||
static void __attribute__((regparm(1))) sh2_test_irq(SH2 *sh2)
|
||||
{
|
||||
block_count = 0;
|
||||
block_table = calloc(MAX_BLOCK_COUNT, sizeof(*block_table));
|
||||
if (block_table == NULL)
|
||||
return -1;
|
||||
|
||||
tcache_ptr = tcache;
|
||||
|
||||
cmn_init_done = 1;
|
||||
return 0;
|
||||
if (sh2->pending_irl > sh2->pending_int_irq)
|
||||
sh2_irl_irq(sh2, sh2->pending_irl);
|
||||
else
|
||||
sh2_internal_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
|
||||
}
|
||||
|
||||
int sh2_drc_init(SH2 *sh2)
|
||||
{
|
||||
if (!cmn_init_done) {
|
||||
int ret = common_init();
|
||||
if (ret)
|
||||
return ret;
|
||||
if (block_table == NULL) {
|
||||
block_count = 0;
|
||||
block_table = calloc(MAX_BLOCK_COUNT, sizeof(*block_table));
|
||||
if (block_table == NULL)
|
||||
return -1;
|
||||
|
||||
tcache_ptr = tcache;
|
||||
#if (DRC_DEBUG & 1)
|
||||
hash_collisions = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
assert(sh2->pc_hashtab == NULL);
|
||||
//assert(sh2->pc_hashtab == NULL);
|
||||
sh2->pc_hashtab = calloc(sizeof(sh2->pc_hashtab[0]), MAX_HASH_ENTRIES);
|
||||
if (sh2->pc_hashtab == NULL)
|
||||
return -1;
|
||||
|
|
@ -396,3 +435,13 @@ int sh2_drc_init(SH2 *sh2)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void sh2_drc_finish(SH2 *sh2)
|
||||
{
|
||||
if (block_table != NULL) {
|
||||
free(block_table);
|
||||
block_table = NULL;
|
||||
}
|
||||
|
||||
free(sh2->pc_hashtab);
|
||||
sh2->pc_hashtab = NULL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,2 +1,3 @@
|
|||
int sh2_drc_init(SH2 *sh2);
|
||||
void sh2_drc_finish(SH2 *sh2);
|
||||
|
||||
int sh2_drc_init(SH2 *sh2);
|
||||
|
|
|
|||
|
|
@ -125,15 +125,6 @@ void __attribute__((regparm(2))) sh2_do_op(SH2 *sh2_, int opcode)
|
|||
case 14<<12: op1110(opcode); break;
|
||||
default: op1111(opcode); break;
|
||||
}
|
||||
|
||||
if (sh2->test_irq)
|
||||
{
|
||||
if (sh2->pending_irl > sh2->pending_int_irq)
|
||||
sh2_irl_irq(sh2, sh2->pending_irl);
|
||||
else
|
||||
sh2_internal_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
|
||||
sh2->test_irq = 0;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -16,6 +16,13 @@ int sh2_init(SH2 *sh2, int is_slave)
|
|||
return ret;
|
||||
}
|
||||
|
||||
void sh2_finish(SH2 *sh2)
|
||||
{
|
||||
#ifdef DRC_SH2
|
||||
sh2_drc_finish(sh2);
|
||||
#endif
|
||||
}
|
||||
|
||||
void sh2_reset(SH2 *sh2)
|
||||
{
|
||||
sh2->pc = p32x_sh2_read32(0, sh2->is_slave);
|
||||
|
|
|
|||
|
|
@ -44,6 +44,7 @@ typedef struct
|
|||
extern SH2 *sh2; // active sh2
|
||||
|
||||
int sh2_init(SH2 *sh2, int is_slave);
|
||||
void sh2_finish(SH2 *sh2);
|
||||
void sh2_reset(SH2 *sh2);
|
||||
void sh2_irl_irq(SH2 *sh2, int level);
|
||||
void sh2_internal_irq(SH2 *sh2, int level, int vector);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue