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core z80, bus blocking for VDP DMA

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kub 2024-05-07 23:11:54 +02:00
parent 274dd51a60
commit ebde43de9d
3 changed files with 11 additions and 1 deletions
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5
pico/memory.c
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@ -565,6 +565,7 @@ void NOINLINE ctl_write_z80reset(u32 d)
pprof_end_sub(m68k);
}
Pico.t.z80_busdelay &= 0xff; // also resets bus request
Pico.video.status &= ~PVS_Z80WAIT;
YM2612ResetChip();
timers_reset();
}
@ -1369,8 +1370,10 @@ void PicoWrite16_32x(u32 a, u32 d) {}
static void access_68k_bus(int delay) // bus delay as Q8
{
// TODO: if the 68K is in DMA wait, Z80 has to wait until DMA ends
if (Pico.video.status & (PVS_CPUWR|PVS_CPURD))
if (Pico.video.status & (PVS_CPUWR|PVS_CPURD)) {
z80_subCLeft(z80_cyclesLeft); // rather rough on both condition and action
Pico.video.status |= PVS_Z80WAIT;
}
// 68k bus access delay for z80. The fractional part needs to be accumulated
// until an additional cycle is full. That is then added to the integer part.

6
pico/pico_cmn.c
View file

@ -125,6 +125,12 @@ static void do_timing_hacks_start(struct PicoVideo *pv)
int cycles = PicoVideoFIFOHint();
SekCyclesBurn(cycles); // prolong cpu HOLD if necessary
if (pv->status & PVS_Z80WAIT) {
Pico.t.z80c_cnt += cycles_68k_to_z80(cycles);
if (!(pv->status & (PVS_CPUWR|PVS_CPURD)))
pv->status &= ~PVS_Z80WAIT;
}
// XXX how to handle Z80 bus cycle stealing during DMA correctly?
if ((Pico.t.z80_buscycles -= cycles) < 0)
Pico.t.z80_buscycles = 0;

1
pico/pico_int.h
View file

@ -299,6 +299,7 @@ extern SH2 sh2s[2];
#define PVS_DMAFILL (1 << 20) // DMA fill is waiting for fill data
#define PVS_DMABG (1 << 21) // background DMA operation is running
#define PVS_FIFORUN (1 << 22) // FIFO is processing
#define PVS_Z80WAIT (1 << 23) // Z80 blocked by VDP DMA
struct PicoVideo
{