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core z80, bus blocking for VDP DMA
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3 changed files with 11 additions and 1 deletions
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@ -565,6 +565,7 @@ void NOINLINE ctl_write_z80reset(u32 d)
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pprof_end_sub(m68k);
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}
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Pico.t.z80_busdelay &= 0xff; // also resets bus request
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Pico.video.status &= ~PVS_Z80WAIT;
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YM2612ResetChip();
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timers_reset();
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}
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@ -1369,8 +1370,10 @@ void PicoWrite16_32x(u32 a, u32 d) {}
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static void access_68k_bus(int delay) // bus delay as Q8
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{
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// TODO: if the 68K is in DMA wait, Z80 has to wait until DMA ends
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if (Pico.video.status & (PVS_CPUWR|PVS_CPURD))
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if (Pico.video.status & (PVS_CPUWR|PVS_CPURD)) {
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z80_subCLeft(z80_cyclesLeft); // rather rough on both condition and action
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Pico.video.status |= PVS_Z80WAIT;
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}
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// 68k bus access delay for z80. The fractional part needs to be accumulated
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// until an additional cycle is full. That is then added to the integer part.
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