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sh2 drc, optimisation for mips,riscv

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This commit is contained in:
kub 2022-01-26 19:46:51 +00:00
parent 5daf702140
commit ed7c6238b7
2 changed files with 98 additions and 18 deletions
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9
cpu/drc/emit_riscv.c
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@ -713,7 +713,14 @@ static void emith_move_imm(int r, uintptr_t imm)
static void emith_move_ptr_imm(int r, uintptr_t imm)
{
#if __riscv_xlen == 64
if ((s32)imm != imm) {
uintptr_t offs = (u8 *)imm - (u8 *)tcache_ptr;
if ((s32)imm != imm && (s32)offs == offs) {
// PC relative
EMIT(R5_MOVA_IMM(r, offs + _CB(offs,1,11,12)));
if (offs & 0xfff)
EMIT(R5_ADD_IMM(r, r, offs));
} else if ((s32)imm != imm) {
// via literal pool
int idx;
if (literal_iindex >= MAX_HOST_LITERALS)
emith_pool_commit(1);