sh2 drc, x86 code emitter: use x86-64 registers R8-R15

cpu/drc/emit_x86.c

@@ -13,9 +13,9 @@
  */
 #include <stdarg.h>
 
-enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
+enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI,	// x86-64,i386 common
+       xR8, xR9, xR10, xR11, xR12, xR13, xR14, xR15 };	// x86-64 only
 
-#define HOST_REGS   8
 #define CONTEXT_REG xBP
 #define RET_REG     xAX
 
@@ -65,7 +65,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 #define EMIT_OP(op) do { \
 	COUNT_OP; \
-	EMIT(op, u8); \
+	if ((op) > 0xff) EMIT((op) >> 8, u8); \
+	EMIT((u8)(op), u8); \
 } while (0)
 
 #define EMIT_MODRM(mod, r, rm) do { \
@@ -110,50 +111,70 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 	EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8)
 
 // _r_r
-#define emith_move_r_r(dst, src) \
+#define emith_move_r_r(dst, src) do {\
-	EMIT_OP_MODRM(0x8b, 3, dst, src)
+	EMIT_REX_IF(0, dst, src); \
+	EMIT_OP_MODRM64(0x8b, 3, dst, src); \
+} while (0)
 
 #define emith_move_r_r_ptr(dst, src) do { \
 	EMIT_REX_IF(1, dst, src); \
 	EMIT_OP_MODRM64(0x8b, 3, dst, src); \
 } while (0)
 
-#define emith_add_r_r(d, s) \
+#define emith_add_r_r(d, s) do { \
-	EMIT_OP_MODRM(0x01, 3, s, d)
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x01, 3, s, d); \
+} while (0)
 
 #define emith_add_r_r_ptr(d, s) do { \
 	EMIT_REX_IF(1, s, d); \
 	EMIT_OP_MODRM64(0x01, 3, s, d); \
 } while (0)
 
-#define emith_sub_r_r(d, s) \
+#define emith_sub_r_r(d, s) do {\
-	EMIT_OP_MODRM(0x29, 3, s, d)
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x29, 3, s, d); \
+} while (0)
 
-#define emith_adc_r_r(d, s) \
+#define emith_adc_r_r(d, s) do { \
-	EMIT_OP_MODRM(0x11, 3, s, d)
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x11, 3, s, d); \
+} while (0)
 
-#define emith_sbc_r_r(d, s) \
+#define emith_sbc_r_r(d, s) do { \
-	EMIT_OP_MODRM(0x19, 3, s, d) /* SBB */
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x19, 3, s, d); /* SBB */ \
+} while (0)
 
-#define emith_or_r_r(d, s) \
+#define emith_or_r_r(d, s) do { \
-	EMIT_OP_MODRM(0x09, 3, s, d)
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x09, 3, s, d); \
+} while (0)
 
-#define emith_and_r_r(d, s) \
+#define emith_and_r_r(d, s) do { \
-	EMIT_OP_MODRM(0x21, 3, s, d)
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x21, 3, s, d); \
+} while (0)
 
-#define emith_eor_r_r(d, s) \
+#define emith_eor_r_r(d, s) do { \
-	EMIT_OP_MODRM(0x31, 3, s, d) /* XOR */
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x31, 3, s, d); /* XOR */ \
+} while (0)
 
-#define emith_tst_r_r(d, s) \
+#define emith_tst_r_r(d, s) do { \
-	EMIT_OP_MODRM(0x85, 3, s, d) /* TEST */
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x85, 3, s, d); /* TEST */ \
+} while (0)
 
 #define emith_tst_r_r_ptr(d, s) do { \
 	EMIT_REX_IF(1, s, d); \
 	EMIT_OP_MODRM64(0x85, 3, s, d); /* TEST */ \
 } while (0)
 
-#define emith_cmp_r_r(d, s) \
+#define emith_cmp_r_r(d, s) do { \
-	EMIT_OP_MODRM(0x39, 3, s, d)
+	EMIT_REX_IF(0, s, d); \
+	EMIT_OP_MODRM64(0x39, 3, s, d); \
+} while (0)
 
 // fake teq - test equivalence - get_flags(d ^ s)
 #define emith_teq_r_r(d, s) do { \
@@ -165,7 +186,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 #define emith_mvn_r_r(d, s) do { \
 	if (d != s) \
 		emith_move_r_r(d, s); \
-	EMIT_OP_MODRM(0xf7, 3, 2, d); /* NOT d */ \
+	EMIT_REX_IF(0, 0, d); \
+	EMIT_OP_MODRM64(0xf7, 3, 2, d); /* NOT d */ \
 } while (0)
 
 #define emith_negc_r_r(d, s) do { \
@@ -179,7 +201,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 #define emith_neg_r_r(d, s) do { \
 	if (d != s) \
 		emith_move_r_r(d, s); \
-	EMIT_OP_MODRM(0xf7, 3, 3, d); /* NEG d */ \
+	EMIT_REX_IF(0, 0, d); \
+	EMIT_OP_MODRM64(0xf7, 3, 3, d); /* NEG d */ \
 } while (0)
 
 // _r_r_r
@@ -325,17 +348,18 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 // _r_imm
 #define emith_move_r_imm(r, imm) do { \
-	EMIT_OP(0xb8 + (r)); \
+	EMIT_REX_IF(0, 0, r); \
+	EMIT_OP(0xb8 + ((r)&7)); \
 	EMIT(imm, u32); \
 } while (0)
 
 #define emith_move_r_ptr_imm(r, imm) do { \
-	if ((uint64_t)(imm) <= UINT32_MAX) \
+	if ((uintptr_t)(imm) <= UINT32_MAX) \
 		emith_move_r_imm(r, (uintptr_t)(imm)); \
 	else { \
 		EMIT_REX_IF(1, 0, r); \
-		EMIT_OP(0xb8 + (r)); \
+		EMIT_OP(0xb8 + ((r)&7)); \
-		EMIT((uint64_t)(imm), uint64_t); \
+		EMIT((uintptr_t)(imm), uint64_t); \
 	} \
 } while (0)
 
@@ -343,7 +367,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 	emith_move_r_imm(r, (u32)(signed int)(signed char)(imm))
 
 #define emith_arith_r_imm(op, r, imm) do { \
-	EMIT_OP_MODRM(0x81, 3, op, r); \
+	EMIT_REX_IF(0, 0, r); \
+	EMIT_OP_MODRM64(0x81, 3, op, r); \
 	EMIT(imm, u32); \
 } while (0)
 
@@ -372,7 +397,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 	emith_arith_r_imm(7, r, imm)
 
 #define emith_tst_r_imm(r, imm) do { \
-	EMIT_OP_MODRM(0xf7, 3, 0, r); \
+	EMIT_REX_IF(0, 0, r); \
+	EMIT_OP_MODRM64(0xf7, 3, 0, r); \
 	EMIT(imm, u32); \
 } while (0)
 
@@ -442,22 +468,14 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 // _r_r_imm - use lea
 #define emith_add_r_r_imm(d, s, imm) do { \
-	assert(s != xSP); \
+	EMIT_REX_IF(0, d, s); \
-	EMIT_OP_MODRM(0x8d, 2, d, s); /* lea */ \
+	emith_deref_modrm(0x8d, 2, d, s); \
 	EMIT(imm, s32); \
 } while (0)
 
 #define emith_add_r_r_ptr_imm(d, s, imm) do { \
-	if ((s) != xSP) { \
+	EMIT_REX_IF(1, d, s); \
-		EMIT_REX_IF(1, d, s); \
+	emith_deref_modrm(0x8d, 2, d, s); \
-		EMIT_OP_MODRM64(0x8d, 2, d, s); /* lea */ \
-	} \
-	else { \
-		if (d != s) \
-			emith_move_r_r_ptr(d, s); \
-		EMIT_REX_IF(1, 0, d); \
-		EMIT_OP_MODRM64(0x81, 3, 0, d); /* add */ \
-	} \
 	EMIT(imm, s32); \
 } while (0)
 
@@ -493,7 +511,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 #define emith_shift(op, d, s, cnt) do { \
 	if (d != s) \
 		emith_move_r_r(d, s); \
-	EMIT_OP_MODRM(0xc1, 3, op, d); \
+	EMIT_REX_IF(0, 0, d); \
+	EMIT_OP_MODRM64(0xc1, 3, op, d); \
 	EMIT(cnt, u8); \
 } while (0)
 
@@ -512,26 +531,36 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 #define emith_ror(d, s, cnt) \
 	emith_shift(1, d, s, cnt)
 
-#define emith_rolc(r) \
+#define emith_rolc(r) do { \
-	EMIT_OP_MODRM(0xd1, 3, 2, r)
+	EMIT_REX_IF(0, 0, r); \
+	EMIT_OP_MODRM64(0xd1, 3, 2, r); \
+} while (0)
 
-#define emith_rorc(r) \
+#define emith_rorc(r) do { \
-	EMIT_OP_MODRM(0xd1, 3, 3, r)
+	EMIT_REX_IF(0, 0, r); \
+	EMIT_OP_MODRM64(0xd1, 3, 3, r); \
+} while (0)
 
 // misc
-#define emith_push(r) \
+#define emith_push(r) do { \
-	EMIT_OP(0x50 + (r))
+	EMIT_REX_IF(0, 0, r); \
+	EMIT_OP(0x50 + ((r)&7)); \
+} while (0)
 
 #define emith_push_imm(imm) do { \
 	EMIT_OP(0x68); \
 	EMIT(imm, u32); \
 } while (0)
 
-#define emith_pop(r) \
+#define emith_pop(r) do { \
-	EMIT_OP(0x58 + (r))
+	EMIT_REX_IF(0, 0, r); \
+	EMIT_OP(0x58 + ((r)&7)); \
+} while (0)
 
-#define emith_neg_r(r) \
+#define emith_neg_r(r) do { \
-	EMIT_OP_MODRM(0xf7, 3, 3, r)
+	EMIT_REX_IF(0, 0, r); \
+	EMIT_OP_MODRM64(0xf7, 3, 3, r); \
+} while (0)
 
 #define emith_clear_msb(d, s, count) do { \
 	u32 t = (u32)-1; \
@@ -553,8 +582,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 #define emith_setc(r) do { \
 	assert(is_abcdx(r)); \
-	EMIT_OP(0x0f); \
+	EMIT_REX_IF(0, 0, r); \
-	EMIT_OP_MODRM(0x92, 3, 0, r); /* SETC r */ \
+	EMIT_OP_MODRM64(0x0f92, 3, 0, r); /* SETC r */ \
 } while (0)
 
 // XXX: stupid mess
@@ -572,9 +601,12 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 		emith_move_r_r(xAX, s1); \
 		rmr = s2; \
 	} \
-	EMIT_OP_MODRM(0xf7, 3, op, rmr); /* xMUL rmr */ \
+	EMIT_REX_IF(0, 0, rmr); \
-	if (dlo != xAX) \
+	EMIT_OP_MODRM64(0xf7, 3, op, rmr); /* xMUL rmr */ \
-		EMIT_OP(0x90 + (dlo)); /* XCHG eax, dlo */ \
+	if (dlo != xAX) { \
+		EMIT_REX_IF(0, 0, dlo); \
+		EMIT_OP(0x90 + ((dlo)&7)); /* XCHG eax, dlo */ \
+	} \
 	if (dhi != xDX && dhi != -1 && !(dhi == xAX && dlo == xDX)) \
 		emith_move_r_r(dhi, (dlo == xDX ? xAX : xDX)); \
 	if (dlo != xDX && dhi != xDX) \
@@ -589,19 +621,30 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 #define emith_mul_s64(dlo, dhi, s1, s2) \
 	emith_mul_(5, dlo, dhi, s1, s2) /* IMUL */
 
-#define emith_mul(d, s1, s2) \
+#define emith_mul(d, s1, s2) do { \
-	emith_mul_(4, d, -1, s1, s2)
+	if (d == s1) { \
+		EMIT_REX_IF(0, d, s2); \
+		EMIT_OP_MODRM64(0x0faf, 3, d, s2); \
+	} else if (d == s2) { \
+		EMIT_REX_IF(0, d, s1); \
+		EMIT_OP_MODRM64(0x0faf, 3, d, s1); \
+	} else { \
+		emith_move_r_r(d, s1); \
+		EMIT_REX_IF(0, d, s2); \
+		EMIT_OP_MODRM64(0x0faf, 3, d, s2); \
+	} \
+} while (0)
 
 // (dlo,dhi) += signed(s1) * signed(s2)
 #define emith_mula_s64(dlo, dhi, s1, s2) do { \
 	emith_push(dhi); \
 	emith_push(dlo); \
 	emith_mul_(5, dlo, dhi, s1, s2); \
-	EMIT_OP_MODRM(0x03, 0, dlo, 4); \
+	EMIT_REX_IF(0, dlo, xSP); \
-	EMIT_SIB(0, 4, 4); /* add dlo, [xsp] */ \
+	emith_deref_modrm(0x03, 0, dlo, xSP); /* add dlo, [xsp] */ \
-	EMIT_OP_MODRM(0x13, 1, dhi, 4); \
+	EMIT_REX_IF(0, dhi, xSP); \
-	EMIT_SIB(0, 4, 4); \
+	emith_deref_modrm(0x13, 1, dhi, xSP); /* adc dhi, [xsp+{4,8}] */ \
-	EMIT(sizeof(void *), u8); /* adc dhi, [xsp+{4,8}] */ \
+	EMIT(sizeof(void *), u8); \
 	emith_add_r_r_ptr_imm(xSP, xSP, sizeof(void *) * 2); \
 } while (0)
 
@@ -631,100 +674,114 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 #define emith_rolcf emith_rolc
 #define emith_rorcf emith_rorc
 
+#define emith_deref_modrm(op, m, r, rs) do { \
+	if (((rs) & 7) == 5 && m == 0) { /* xBP,xR13 not in mod 0, use mod 1 */\
+		EMIT_OP_MODRM64(op, 1, r, rs); \
+		EMIT(0, u8); \
+	} else if (((rs) & 7) == 4) { /* xSP,xR12 must use SIB */ \
+		EMIT_OP_MODRM64(op, m, r, 4); \
+		EMIT_SIB64(0, 4, rs); \
+	} else \
+		EMIT_OP_MODRM64(op, m, r, rs); \
+} while (0)
+
 #define emith_deref_op(op, r, rs, offs) do { \
 	/* mov r <-> [ebp+#offs] */ \
-	if (abs(offs) >= 0x80) { \
+	if ((offs) == 0) { \
-		EMIT_OP_MODRM64(op, 2, r, rs); \
+		emith_deref_modrm(op, 0, r, rs); \
+	} else if (abs(offs) >= 0x80) { \
+		emith_deref_modrm(op, 2, r, rs); \
 		EMIT(offs, u32); \
 	} else { \
-		EMIT_OP_MODRM64(op, 1, r, rs); \
+		emith_deref_modrm(op, 1, r, rs); \
 		EMIT((u8)offs, u8); \
 	} \
 } while (0)
 
-#define is_abcdx(r) (xAX <= (r) && (r) <= xDX)
+#define is_abcdx(r) !((r) & ~0x3)
 
-#define emith_read_r_r_offs(r, rs, offs) \
+#define emith_read_r_r_offs(r, rs, offs) do { \
-	emith_deref_op(0x8b, r, rs, offs)
+	EMIT_REX_IF(0, r, rs); \
-#define emith_read_r_r_offs_ptr(r, rs, offs) \
+	emith_deref_op(0x8b, r, rs, offs); \
+} while (0)
+#define emith_read_r_r_offs_ptr(r, rs, offs) do { \
 	EMIT_REX_IF(1, r, rs); \
-	emith_deref_op(0x8b, r, rs, offs)
+	emith_deref_op(0x8b, r, rs, offs); \
+} while (0)
 
-#define emith_write_r_r_offs(r, rs, offs) \
+#define emith_write_r_r_offs(r, rs, offs) do { \
-	emith_deref_op(0x89, r, rs, offs)
+	EMIT_REX_IF(0, r, rs); \
-#define emith_write_r_r_offs_ptr(r, rs, offs) \
+	emith_deref_op(0x89, r, rs, offs); \
+} while (0)
+#define emith_write_r_r_offs_ptr(r, rs, offs) do { \
 	EMIT_REX_IF(1, r, rs); \
-	emith_deref_op(0x89, r, rs, offs)
+	emith_deref_op(0x89, r, rs, offs); \
+} while (0)
 
 #define emith_read8_r_r_offs(r, rs, offs) do { \
-	EMIT(0x0f, u8); \
+	EMIT_REX_IF(0, r, rs); \
-	emith_deref_op(0xb6, r, rs, offs); \
+	emith_deref_op(0x0fb6, r, rs, offs); \
 } while (0)
 
 #define emith_read8s_r_r_offs(r, rs, offs) do { \
-	EMIT(0x0f, u8); \
+	EMIT_REX_IF(0, r, rs); \
-	emith_deref_op(0xbe, r, rs, offs); \
+	emith_deref_op(0x0fbe, r, rs, offs); \
 } while (0)
 
-// note: don't use prefixes on this
 #define emith_write8_r_r_offs(r, rs, offs) do {\
-	int r_ = r; \
+	EMIT_REX_IF(0, r, rs); \
-	if (!is_abcdx(r)) { \
+	emith_deref_op(0x88, r, rs, offs); \
-		r_ = rcache_get_tmp(); \
-		emith_move_r_r(r_, r); \
-	} \
-	emith_deref_op(0x88, r_, rs, offs); \
-	if ((r) != r_) \
-		rcache_free_tmp(r_); \
 } while (0)
 
 #define emith_read16_r_r_offs(r, rs, offs) do { \
-	EMIT(0x0f, u8); \
+	EMIT_REX_IF(0, r, rs); \
-	emith_deref_op(0xb7, r, rs, offs); \
+	emith_deref_op(0x0fb7, r, rs, offs); \
 } while (0)
 
 #define emith_read16s_r_r_offs(r, rs, offs) do { \
-	EMIT(0x0f, u8); \
+	EMIT_REX_IF(0, r, rs); \
-	emith_deref_op(0xbf, r, rs, offs); \
+	emith_deref_op(0x0fbf, r, rs, offs); \
 } while (0)
 
 #define emith_write16_r_r_offs(r, rs, offs) do { \
-	EMIT(0x66, u8); \
+	EMIT(0x66, u8); /* Intel SDM Vol 2a: REX must be closest to opcode */ \
-	emith_write_r_r_offs(r, rs, offs); \
+	EMIT_REX_IF(0, r, rs); \
+	emith_deref_op(0x89, r, rs, offs); \
 } while (0)
 
 #define emith_read8_r_r_r(r, rs, rm) do { \
-	EMIT(0x0f, u8); \
+	EMIT_XREX_IF(0, r, rm, rs); \
-	EMIT_OP_MODRM(0xb6, 0, r, 4); \
+	EMIT_OP_MODRM64(0x0fb6, 0, r, 4); \
-	EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
+	EMIT_SIB64(0, rs, rm); /* mov r, [rm + rs * 1] */ \
 } while (0)
 
 #define emith_read8s_r_r_r(r, rs, rm) do { \
-	EMIT(0x0f, u8); \
+	EMIT_XREX_IF(0, r, rm, rs); \
-	EMIT_OP_MODRM(0xbe, 0, r, 4); \
+	EMIT_OP_MODRM64(0x0fbe, 0, r, 4); \
-	EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
+	EMIT_SIB64(0, rs, rm); /* mov r, [rm + rs * 1] */ \
 } while (0)
 
 #define emith_read16_r_r_r(r, rs, rm) do { \
-	EMIT(0x0f, u8); \
+	EMIT_XREX_IF(0, r, rm, rs); \
-	EMIT_OP_MODRM(0xb7, 0, r, 4); \
+	EMIT_OP_MODRM64(0x0fb7, 0, r, 4); \
-	EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
+	EMIT_SIB64(0, rs, rm); /* mov r, [rm + rs * 1] */ \
 } while (0)
 
 #define emith_read16s_r_r_r(r, rs, rm) do { \
-	EMIT(0x0f, u8); \
+	EMIT_XREX_IF(0, r, rm, rs); \
-	EMIT_OP_MODRM(0xbf, 0, r, 4); \
+	EMIT_OP_MODRM64(0x0fbf, 0, r, 4); \
-	EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
+	EMIT_SIB64(0, rs, rm); /* mov r, [rm + rs * 1] */ \
 } while (0)
 
 #define emith_read_r_r_r(r, rs, rm) do { \
-	EMIT_OP_MODRM(0x8b, 0, r, 4); \
+	EMIT_XREX_IF(0, r, rm, rs); \
-	EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
+	EMIT_OP_MODRM64(0x8b, 0, r, 4); \
+	EMIT_SIB64(0, rs, rm); /* mov r, [rm + rs * 1] */ \
 } while (0)
 #define emith_read_r_r_r_ptr(r, rs, rm) do { \
-	EMIT_REX_IF(1, r, rs); \
+	EMIT_XREX_IF(1, r, rm, rs); \
 	EMIT_OP_MODRM64(0x8b, 0, r, 4); \
-	EMIT_SIB(0, rs, rm); /* mov r, [rm + rs * 1] */ \
+	EMIT_SIB64(0, rs, rm); /* mov r, [rm + rs * 1] */ \
 } while (0)
 #define emith_read_r_r_r_wb(r, rs, rm) do { \
 	emith_read_r_r_r(r, rs, rm); \
@@ -736,13 +793,14 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 } while (0)
 
 #define emith_write_r_r_r(r, rs, rm) do { \
-	EMIT_OP_MODRM(0x89, 0, r, 4); \
+	EMIT_XREX_IF(0, r, rm, rs); \
-	EMIT_SIB(0, rs, rm); /* mov [rm + rs * 1], r */ \
+	EMIT_OP_MODRM64(0x89, 0, r, 4); \
+	EMIT_SIB64(0, rs, rm); /* mov [rm + rs * 1], r */ \
 } while (0)
 #define emith_write_r_r_r_ptr(r, rs, rm) do { \
-	EMIT_REX_IF(1, r, rs); \
+	EMIT_XREX_IF(1, r, rm, rs); \
 	EMIT_OP_MODRM64(0x89, 0, r, 4); \
-	EMIT_SIB(0, rs, rm); /* mov [rm + rs * 1], r */ \
+	EMIT_SIB64(0, rs, rm); /* mov [rm + rs * 1], r */ \
 } while (0)
 #define emith_write_r_r_r_wb(r, rs, rm) do { \
 	emith_write_r_r_r(r, rs, rm); \
@@ -796,8 +854,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 #define emith_jump_cond(cond, ptr) do { \
 	u32 disp = (u8 *)(ptr) - ((u8 *)tcache_ptr + 6); \
-	EMIT(0x0f, u8); \
+	EMIT_OP(0x0f80 | (cond)); \
-	EMIT_OP(0x80 | (cond)); \
 	EMIT(disp, u32); \
 } while (0)
 
@@ -924,16 +981,21 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 #ifdef __x86_64__
 
+#define HOST_REGS 16
 #define PTR_SCALE 3
 #define NA_TMP_REG xAX // non-arg tmp from reg_temp[]
 
-#define EMIT_REX_IF(w, r, rm) do { \
+#define EMIT_XREX_IF(w, r, rm, rs) do { \
-	int r_ = (r) > 7 ? 1 : 0; \
+	int xr_ = (r) > 7 ? 1 : 0; \
-	int rm_ = (rm) > 7 ? 1 : 0; \
+	int xb_ = (rm) > 7 ? 1 : 0; \
-	if ((w) | r_ | rm_) \
+	int xx_ = (rs) > 7 ? 1 : 0; \
-		EMIT_REX(1, r_, 0, rm_); \
+	if ((w) | xr_ | xx_ | xb_) \
+		EMIT_REX(w, xr_, xx_, xb_); \
 } while (0)
  
+#define EMIT_REX_IF(w, r, rm) \
+	EMIT_XREX_IF(w, r, rm, 0)
+
 #ifndef _WIN32
 
 #define host_arg2reg(rd, arg) \
@@ -947,11 +1009,19 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 #define emith_sh2_drc_entry() do { \
 	emith_push(xBX); \
 	emith_push(xBP); \
+	emith_push(xR12); \
+	emith_push(xR13); \
+	emith_push(xR14); \
+	emith_push(xR15); \
 	emith_push(xSI); /* to align */ \
 } while (0)
 
 #define emith_sh2_drc_exit() do {  \
 	emith_pop(xSI); \
+	emith_pop(xR15); \
+	emith_pop(xR14); \
+	emith_pop(xR13); \
+	emith_pop(xR12); \
 	emith_pop(xBP); \
 	emith_pop(xBX); \
 	emith_ret(); \
@@ -963,22 +1033,30 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 	switch (arg) { \
 	case 0: rd = xCX; break; \
 	case 1: rd = xDX; break; \
-	case 2: rd = 8; break; \
+	case 2: rd = xR8; break; \
-	default: rd = 9; break; \
+	default: rd = xR9; break; \
 	}
 
 #define emith_sh2_drc_entry() do { \
 	emith_push(xBX); \
 	emith_push(xBP); \
+	emith_push(xR12); \
+	emith_push(xR13); \
+	emith_push(xR14); \
+	emith_push(xR15); \
 	emith_push(xSI); \
 	emith_push(xDI); \
-	emith_add_r_r_ptr_imm(xSP, xSP, -8*5); \
+	emith_add_r_r_ptr_imm(xSP, xSP, -8*5); /* align + ABI param area */ \
 } while (0)
 
 #define emith_sh2_drc_exit() do {  \
 	emith_add_r_r_ptr_imm(xSP, xSP, 8*5); \
 	emith_pop(xDI); \
 	emith_pop(xSI); \
+	emith_pop(xR15); \
+	emith_pop(xR14); \
+	emith_pop(xR13); \
+	emith_pop(xR12); \
 	emith_pop(xBP); \
 	emith_pop(xBX); \
 	emith_ret(); \
@@ -988,6 +1066,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 #else // !__x86_64__
 
+#define HOST_REGS 8
 #define PTR_SCALE 2
 #define NA_TMP_REG xBX // non-arg tmp from reg_temp[]
 
@@ -995,6 +1074,11 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 	assert((u32)(r) < 8u); \
 	assert((u32)(rm) < 8u); \
 } while (0)
+#define EMIT_XREX_IF(w, r, rs, rm) do { \
+	assert((u32)(r) < 8u); \
+	assert((u32)(rs) < 8u); \
+	assert((u32)(rm) < 8u); \
+} while (0)
 
 #define host_arg2reg(rd, arg) \
 	switch (arg) { \
@@ -1039,15 +1123,16 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 #define emith_sh2_rcall(a, tab, func, mask) do { \
 	emith_lsr(mask, a, SH2_READ_SHIFT); \
-	EMIT_REX_IF(1, mask, tab); \
+	EMIT_XREX_IF(1, tab, tab, mask); \
 	EMIT_OP_MODRM64(0x8d, 0, tab, 4); \
 	EMIT_SIB64(PTR_SCALE, mask, tab); /* lea tab, [tab + mask * {4,8}] */ \
-	EMIT_REX_IF(1, mask, tab); \
+	EMIT_XREX_IF(1, tab, tab, mask); \
 	EMIT_OP_MODRM64(0x8d, 0, tab, 4); \
 	EMIT_SIB64(PTR_SCALE, mask, tab); /* lea tab, [tab + mask * {4,8}] */ \
-	EMIT_REX_IF(1, func, tab); \
+	EMIT_REX_IF(1, func,  tab); \
-	EMIT_OP_MODRM64(0x8b, 0, func, tab); /* mov func, [tab] */ \
+	emith_deref_modrm(0x8b, 0, func, tab); /* mov func, [tab] */ \
-	EMIT_OP_MODRM64(0x8b, 1, mask, tab); \
+	EMIT_REX_IF(0, mask, tab); \
+	emith_deref_modrm(0x8b, 1, mask, tab); \
 	EMIT(1 << PTR_SCALE, u8); /* mov mask, [tab + {4,8}] */ \
 	emith_add_r_r_ptr(func, func); \
 } while (0)
@@ -1056,7 +1141,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 	int arg2_; \
 	host_arg2reg(arg2_, 2); \
 	emith_lsr(func, a, SH2_WRITE_SHIFT); /* tmp = a >> WRT_SHIFT */ \
-	EMIT_REX_IF(1, func, tab); \
+	EMIT_XREX_IF(1, func, tab, func); \
 	EMIT_OP_MODRM64(0x8b, 0, func, 4); \
 	EMIT_SIB64(PTR_SCALE, func, tab); /* mov tmp, [tab + tmp * {4,8}] */ \
 	emith_move_r_r_ptr(arg2_, CONTEXT_REG); \

cpu/sh2/compiler.c

@@ -1,6 +1,7 @@
 /*
  * SH2 recompiler
  * (C) notaz, 2009,2010,2013
+ * (C) kub, 2018,2019
  *
  * This work is licensed under the terms of MAME license.
  * See COPYING file in the top-level directory.
@@ -430,13 +431,16 @@ typedef struct {
 } guest_reg_t;
 
 
-// note: cache_regs[] must have at least the amount of
+// Note: cache_regs[] must have at least the amount of REG and TEMP registers
-// HRF_REG registers used by handlers in worst case (currently 4)
+// used by handlers in worst case (currently 4). 
+// Register assignment goes by ABI convention. Caller save registers are TEMP,
+// the others are either static or REG. SR must be static, R0 very recommended.
+// TEMP registers first, REG last. alloc/evict algorithm depends on this.
+// The 1st TEMP must not be RET_REG on x86 (it uses temps for some insns).
+// XXX shouldn't this be somehow defined in the code emitters?
 #ifdef __arm__
 #include "../drc/emit_arm.c"
 
-// register assigment goes by ABI convention. All caller save registers are TEMP
-// the others are either static or REG. SR must be static, R0 very recommended
 static guest_reg_t guest_regs[] = {
   // SHR_R0 .. SHR_SP
 #ifndef __MACH__ // no r9..
@@ -453,20 +457,21 @@ static guest_reg_t guest_regs[] = {
   { 0 }            , { 0 }            , { 0 }            , { 0 }            ,
 };
 
-// NB first TEMP, then REG. alloc/evict algorithm depends on this
+// OABI/EABI: params: r0-r3, return: r0-r1, temp: r12,r14, saved: r4-r8,r10,r11
+// SP,PC: r13,r15 must not be used. saved: r9 (for platform use, e.g. on OSx)
 static cache_reg_t cache_regs[] = {
-  { 12, HRF_TEMP },
+  { 12, HRF_TEMP }, // temps
   { 14, HRF_TEMP },
-  {  0, HRF_TEMP },
+  {  3, HRF_TEMP }, // params
-  {  1, HRF_TEMP },
   {  2, HRF_TEMP },
-  {  3, HRF_TEMP },
+  {  1, HRF_TEMP },
-  {  8, HRF_LOCKED },
+  {  0, HRF_TEMP }, // RET_REG
+  {  8, HRF_LOCKED }, // statics
 #ifndef __MACH__ // no r9..
   {  9, HRF_LOCKED },
 #endif
   { 10, HRF_LOCKED },
-  {  4, HRF_REG },
+  {  4, HRF_REG }, // other regs
   {  5, HRF_REG },
   {  6, HRF_REG },
   {  7, HRF_REG },
@@ -489,11 +494,11 @@ static guest_reg_t guest_regs[] = {
 
 // ax, cx, dx are usually temporaries by convention
 static cache_reg_t cache_regs[] = {
-  { xBX, HRF_REG|HRF_TEMP },
+  { xBX, HRF_REG|HRF_TEMP }, // params
   { xCX, HRF_REG|HRF_TEMP },
   { xDX, HRF_REG|HRF_TEMP },
-  { xAX, HRF_REG|HRF_TEMP },
+  { xAX, HRF_REG|HRF_TEMP }, // return value
-  { xSI, HRF_LOCKED },
+  { xSI, HRF_LOCKED }, // statics
   { xDI, HRF_LOCKED },
 };
 
@@ -502,11 +507,7 @@ static cache_reg_t cache_regs[] = {
 
 static guest_reg_t guest_regs[] = {
   // SHR_R0 .. SHR_SP
-#ifndef _WIN32
+  {GRF_STATIC,xR12}, { 0 }            , { 0 }            , { 0 }            ,
-  { 0 }            , { 0 }            , { 0 }            , { 0 }            ,
-#else
-  {GRF_STATIC, xDI}, { 0 }            , { 0 }            , { 0 }            ,
-#endif
   { 0 }            , { 0 }            , { 0 }            , { 0 }            ,
   { 0 }            , { 0 }            , { 0 }            , { 0 }            ,
   { 0 }            , { 0 }            , { 0 }            , { 0 }            ,
@@ -516,18 +517,25 @@ static guest_reg_t guest_regs[] = {
   { 0 }            , { 0 }            , { 0 }            , { 0 }            ,
 };
 
-// ax, cx, dx are usually temporaries by convention
+// M$/SystemV ABI conventions:
+// rbx,rbp,r12-r15 are preserved, rcx,rdx,rax,r8,r9,r10,r11 are temporaries
+// rsi,rdi are preserved in M$ ABI, temporary in SystemV ABI
+// parameters in rcx,rdx,r8,r9, SystemV ABI additionally uses rsi,rdi
 static cache_reg_t cache_regs[] = {
-  { xCX, HRF_REG|HRF_TEMP },
+  { xR10,HRF_TEMP }, // temps
-  { xDX, HRF_REG|HRF_TEMP },
+  { xR11,HRF_TEMP },
-  { xAX, HRF_REG|HRF_TEMP },
+  { xAX, HRF_TEMP }, // RET_REG
+  { xR8, HRF_TEMP }, // params
+  { xR9, HRF_TEMP },
+  { xCX, HRF_TEMP },
+  { xDX, HRF_TEMP },
   { xSI, HRF_REG|HRF_TEMP },
-#ifndef _WIN32
   { xDI, HRF_REG|HRF_TEMP },
-#else
+  { xBX, HRF_LOCKED }, // statics
-  { xDI, HRF_LOCKED },
+  { xR12,HRF_LOCKED },
-#endif
+  { xR13,HRF_REG }, // other regs
-  { xBX, HRF_LOCKED },
+  { xR14,HRF_REG },
+  { xR15,HRF_REG },
 };
 
 #else