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svp compiler: hle work, wip
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@387 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
parent
f5d1115ffc
commit
ee9ee9fdfd
4 changed files with 296 additions and 10 deletions
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@ -13,6 +13,12 @@
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.global ssp_drc_end
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.global ssp_hle_800
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.global ssp_hle_902
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.global ssp_hle_07_030
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.global ssp_hle_07_036
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.global ssp_hle_07_6d6
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.global ssp_hle_11_12c
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.global ssp_hle_11_384
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.global ssp_hle_11_38a
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@ translation cache buffer
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.text
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@ -56,6 +62,7 @@ flush_inval_caches:
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#define SSP_OFFS_PM_WRITE 0x46c // pmac_write[]
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#define SSP_OFFS_EMUSTAT 0x484 // emu_status
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#define SSP_OFFS_IRAM_ROM 0x48c // ptr_iram_rom
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#define SSP_OFFS_DRAM 0x490 // ptr_dram
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#define SSP_OFFS_IRAM_DIRTY 0x494
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#define SSP_OFFS_IRAM_CTX 0x498 // iram_context
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#define SSP_OFFS_BLTAB 0x49c // block_table
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@ -252,6 +259,20 @@ ssp_hle_800:
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b ssp_drc_next
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.macro hle_flushflags
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bic r6, r6, #0xf
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mrs r1, cpsr
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orr r6, r6, r1, lsr #28
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.endm
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.macro hle_popstack
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sub r6, r6, #0x20000000
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add r1, r7, #0x400
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add r1, r1, #0x048 @ stack
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add r1, r1, r6, lsr #28
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ldrh r0, [r1]
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.endm
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ssp_hle_902:
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cmp r11, #0
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ble ssp_drc_end
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@ -302,12 +323,265 @@ ssp_hle_902_loop:
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str r0, [r7, #(SSP_OFFS_GR+SSP_PMC*4)]
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str r0, [r7, #(SSP_OFFS_PM_WRITE+4*4)]
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sub r6, r6, #0x20000000
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add r1, r7, #0x400
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add r1, r1, #0x048 @ stack
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add r1, r1, r6, lsr #28
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ldrh r0, [r1]
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hle_popstack
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subs r11,r11,#16 @ timeslice is likely to end
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ble ssp_drc_end
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b ssp_drc_next
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@ this one is car rendering related
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.macro hle_11_12c_mla offs_in
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ldrsh r5, [r7, #(\offs_in+0)]
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ldrsh r0, [r7, #(\offs_in+2)]
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ldrsh r1, [r7, #(\offs_in+4)]
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mul r5, r2, r5
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ldrsh r12,[r7, #(\offs_in+6)]
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mla r5, r3, r0, r5
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mla r5, r4, r1, r5
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add r5, r5, r12,lsl #11
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movs r5, r5, lsr #13
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add r1, r7, r8, lsr #23
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strh r5, [r1]
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add r8, r8, #(1<<24)
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.endm
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ssp_hle_11_12c:
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cmp r11, #0
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ble ssp_drc_end
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mov r0, #0
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bl ssp_pm_read
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mov r4, r0
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mov r0, #0
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bl ssp_pm_read
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mov r5, r0
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mov r0, #0
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bl ssp_pm_read
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mov r2, r4, lsl #16
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mov r2, r2, asr #15 @ (r7|00) << 1
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mov r3, r5, lsl #16
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mov r3, r3, asr #15 @ (r7|01) << 1
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mov r4, r0, lsl #16
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mov r4, r4, asr #15 @ (r7|10) << 1
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bic r8, r8, #0xff
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mov r8, r8, ror #16
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hle_11_12c_mla 0x20
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hle_11_12c_mla 0x28
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hle_11_12c_mla 0x30
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mov r8, r8, ror #16
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orr r8, r8, #0x1c
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@ hle_flushflags
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hle_popstack
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sub r11,r11,#33
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b ssp_drc_next
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ssp_hle_11_384:
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mov r3, #2
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b ssp_hle_11_38x
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ssp_hle_11_38a:
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mov r3, #3 @ r5
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ssp_hle_11_38x:
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cmp r11, #0
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ble ssp_drc_end
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mov r2, #0 @ EFh, EEh
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mov r1, #1 @ r4
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add r0, r7, #0x1c0 @ r0 (based)
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ssp_hle_11_38x_loop:
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ldrh r5, [r0], #2
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ldr r12,[r7, #0x224]
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mov r5, r5, lsl #16
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eor r5, r5, r5, asr #31
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add r5, r5, r5, lsr #31 @ abs(r5)
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cmp r5, r12,lsl #16
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orrpl r2, r2, r1,lsl #16 @ EFh |= r4
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ldrh r5, [r0, #2]!
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ldr r12,[r7, #0x220]
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cmp r5, r12,lsr #16
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orrpl r2, r2, r1,lsl #16 @ EFh |= r4
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ldr r12,[r7, #0x1e8]
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add r0, r0, #2
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mov r12,r12,lsl #16
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cmp r5, r12,lsr #16
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orrmi r2, r2, r1
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mov r1, r1, lsl #1
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subs r3, r3, #1
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bpl ssp_hle_11_38x_loop
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str r2, [r7, #0x1dc]
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sub r0, r0, r7
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bic r8, r8, #0xff
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orr r8, r8, r0, lsr #1
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bic r9, r9, #0xff
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orr r9, r9, r1
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@ hle_flushflags
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hle_popstack
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sub r11,r11,#(9+30*4)
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b ssp_drc_next
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ssp_hle_07_6d6:
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cmp r11, #0
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ble ssp_drc_end
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ldr r1, [r7, #0x20c]
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and r0, r8, #0xff @ assuming alignment
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add r0, r7, r0, lsl #1
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mov r2, r1, lsr #16
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mov r1, r1, lsl #16 @ 106h << 16
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mov r2, r2, lsl #16 @ 107h << 16
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ssp_hle_07_6d6_loop:
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ldr r5, [r0], #4
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tst r5, r5
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bmi ssp_hle_07_6d6_end
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mov r5, r5, lsl #16
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cmp r5, r1
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movmi r1, r5
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cmp r5, r2
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sub r11,r11,#16
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bmi ssp_hle_07_6d6_loop
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mov r2, r5
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b ssp_hle_07_6d6_loop
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ssp_hle_07_6d6_end:
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sub r0, r0, r7
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mov r0, r0, lsr #1
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bic r8, r8, #0xff
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orr r8, r8, r0
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orr r1, r2, r1, lsr #16
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str r1, [r7, #0x20c]
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hle_popstack
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sub r11,r11,#6
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b ssp_drc_next
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ssp_hle_07_030:
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ldrh r0, [r7]
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mov r0, r0, lsl #4
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orr r0, r0, r0, lsr #16
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strh r0, [r7]
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sub r11,r11,#3
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ssp_hle_07_036:
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ldr r1, [r7, #0x1e0]
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rsb r5, r1, r1, lsr #16
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mov r5, r5, lsl #16 @ ?
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cmp r5, #(4<<16)
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sub r11,r11,#5
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bmi hle_07_036_ending2
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ldr r1, [r7, #0x1dc]
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cmp r5, r1, lsl #16
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bpl hle_07_036_ret
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mov r0, r5, lsr #16 @ F5h
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add r1, r7, #0x100
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strh r0, [r1, #0xea]
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ldr r0, [r7, #0x1e0]
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and r0, r0, #3
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strh r0, [r1, #0xf0]
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add r2, r0, #0xc0
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add r2, r7, r2, lsl #1
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ldrh r2, [r2]
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ldr r0, [r7]
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mov r1, #4
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and r0, r0, r2
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bl ssp_pm_write
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@ will handle PMC later
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ldr r0, [r7, #0x1e8]
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ldr r1, [r7, #0x1f0]
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sub r0, r0, #(3<<16)
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add r0, r0, r1, lsl #16
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ldr r1, [r7, #0x1d4]
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sub r0, r1, r0, lsr #18
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and r0, r0, #0x7f
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rsbs r0, r0, #0x78 @ length
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ble hle_07_036_ending1
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ldr r1, [r7, #(SSP_OFFS_GR+SSP_PMC*4)]
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ldr r2, [r7, #SSP_OFFS_DRAM]
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mov r1, r1, lsl #16
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add r1, r2, r1, lsr #15 @ addr (based)
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ldrh r2, [r7, #0] @ pattern
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ldrh r3, [r7, #6] @ mode
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mov r12, #0x4000
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orr r12,r12,#0x0018
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bic r5, r3, #0x0400
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cmp r5, r12
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bne tr_unhandled
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orr r2, r2, r2, lsl #16
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tst r3, #0x400
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bne hle_07_036_ovrwr
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tst r1, #2
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strne r2, [r1], #0x62 @ align
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subne r0, r0, #1
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cmp r0, #4
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blt hle_07_036_l2
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hle_07_036_l1:
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subs r0, r0, #4
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str r2, [r1], #0x64
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str r2, [r1], #0x64
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bgt hle_07_036_l1
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hle_07_036_l2:
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tst r0, #2
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strne r2, [r1], #0x64
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tst r0, #1
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strneh r2, [r1], #2
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b hle_07_036_ending1
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hle_07_036_ovrwr:
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@ TODO
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hle_07_036_ending1:
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ldr r0, [r7, #0x1e0]
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add r0, r0, #(1<<16)
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and r0, r0, #(3<<16)
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add r0, r0, #(0xc4<<16)
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bic r8, r8, #0xff0000
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orr r8, r8, r0
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add r0, r7, r0, lsl #1
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ldrh r0, [r0]
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ldr r2, [r7]
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and r5, r0, r2
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movs r5, r5, lsl #16
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ldrh r3, [r7, #4] @ new mode
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sub r0, r1, r7 @ new addr
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mov r0, r0, lsr #1
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orr r0, r0, r3, lsl #16
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str r0, [r7, #(SSP_OFFS_PM_WRITE+4*4)]
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mov r0, r5, lsr #16
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mov r1, #4
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bl ssp_pm_write
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hle_07_036_ret:
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hle_popstack
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b ssp_drc_next
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hle_07_036_ending2:
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sub r11,r11,#3
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movs r5, r5, lsl #1
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bmi hle_07_036_ret
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mov r0, #0x100
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orr r0, r0, #0x00e
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b ssp_drc_next @ let the dispatcher finish this
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