mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
switch DMNA Silpheed hack to timeslice hack
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@747 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
6bc00695f8
commit
ef090115c8
5 changed files with 23 additions and 56 deletions
|
|
@ -27,6 +27,7 @@ typedef unsigned int u32;
|
|||
#define rdprintf(...)
|
||||
//#define wrdprintf dprintf
|
||||
#define wrdprintf(...)
|
||||
//#define r3printf elprintf
|
||||
#define r3printf(...)
|
||||
#endif
|
||||
|
||||
|
|
@ -57,8 +58,6 @@ static u32 m68k_reg_read16(u32 a)
|
|||
goto end;
|
||||
case 2:
|
||||
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
|
||||
// the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)
|
||||
if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }
|
||||
r3printf(EL_STATUS, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
|
||||
goto end;
|
||||
case 4:
|
||||
|
|
@ -109,8 +108,8 @@ void m68k_reg_write8(u32 a, u32 d)
|
|||
case 1:
|
||||
d &= 3;
|
||||
if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
|
||||
if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
|
||||
if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
|
||||
if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
|
||||
if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);
|
||||
if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
|
||||
SekResetS68k(); // S68k comes out of RESET or BRQ state
|
||||
Pico_mcd->m.state_flags&=~1;
|
||||
|
|
@ -131,20 +130,14 @@ void m68k_reg_write8(u32 a, u32 d)
|
|||
//if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
|
||||
//if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
|
||||
// ((d&2) ? "word ram to s68k" : "word ram to m68k"));
|
||||
if (dold & 4) {
|
||||
if (dold & 4) { // 1M mode
|
||||
d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
|
||||
} else {
|
||||
//dold &= ~2; // ??
|
||||
#if 1
|
||||
if (d & (d ^ dold) & 2) { // DMNA is being set
|
||||
Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)
|
||||
d &= ~2;
|
||||
if ((d ^ dold) & d & 2) { // DMNA is being set
|
||||
dold &= ~1; // return word RAM to s68k
|
||||
/* Silpheed hack: bset(w3), r3, btst, bne, r3 */
|
||||
SekEndRun(20+16+10+12+16);
|
||||
}
|
||||
else
|
||||
Pico_mcd->m.state_flags &= ~2;
|
||||
#else
|
||||
if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
|
||||
#endif
|
||||
}
|
||||
Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
|
||||
#ifdef USE_POLL_DETECT
|
||||
|
|
@ -324,9 +317,9 @@ void s68k_reg_write8(u32 a, u32 d)
|
|||
}
|
||||
else
|
||||
d |= dold&1;
|
||||
// s68k can only set RET, writing 0 has no effect
|
||||
if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
|
||||
}
|
||||
Pico_mcd->m.state_flags &= ~2;
|
||||
break;
|
||||
}
|
||||
case 4:
|
||||
|
|
|
|||
|
|
@ -208,20 +208,6 @@ static __inline void update_chips(void)
|
|||
// update gfx chip
|
||||
if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
|
||||
gfx_cd_update();
|
||||
|
||||
// delayed setting of DMNA bit (needed for Silpheed)
|
||||
if (Pico_mcd->m.state_flags & 2) {
|
||||
Pico_mcd->m.state_flags &= ~2;
|
||||
if (!(Pico_mcd->s68k_regs[3] & 4)) {
|
||||
Pico_mcd->s68k_regs[3] |= 2;
|
||||
Pico_mcd->s68k_regs[3] &= ~1;
|
||||
#ifdef USE_POLL_DETECT
|
||||
if ((s68k_poll_adclk&0xfe) == 2) {
|
||||
SekSetStopS68k(0); s68k_poll_adclk = 0;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -41,10 +41,7 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
|
|||
(((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
|
||||
#define SekCyclesLeftS68k \
|
||||
((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)
|
||||
#define SekSetCyclesLeftNoMCD(c) PicoCpuCM68k.cycles=c
|
||||
#define SekSetCyclesLeft(c) { \
|
||||
if ((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \
|
||||
}
|
||||
#define SekEndTimeslice(after) PicoCpuCM68k.cycles=after
|
||||
#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
|
||||
#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
|
||||
#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
|
||||
|
|
@ -67,10 +64,7 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
|
|||
(((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
|
||||
#define SekCyclesLeftS68k \
|
||||
((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)
|
||||
#define SekSetCyclesLeftNoMCD(c) PicoCpuFM68k.io_cycle_counter=c
|
||||
#define SekSetCyclesLeft(c) { \
|
||||
if ((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \
|
||||
}
|
||||
#define SekEndTimeslice(after) PicoCpuFM68k.io_cycle_counter=after
|
||||
#define SekPc fm68k_get_pc(&PicoCpuFM68k)
|
||||
#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
|
||||
#define SekSetStop(x) { \
|
||||
|
|
@ -100,10 +94,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
|
|||
(((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
|
||||
#define SekCyclesLeftS68k \
|
||||
((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)
|
||||
#define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)
|
||||
#define SekSetCyclesLeft(c) { \
|
||||
if ((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \
|
||||
}
|
||||
#define SekEndTimeslice(after) SET_CYCLES(after)
|
||||
#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
|
||||
#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
|
||||
#define SekSetStop(x) { \
|
||||
|
|
@ -125,7 +116,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
|
|||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
#endif // EMU_M68K
|
||||
|
||||
extern int SekCycleCnt; // cycles done in this frame
|
||||
extern int SekCycleAim; // cycle aim
|
||||
|
|
@ -141,9 +132,9 @@ extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
|
|||
#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom
|
||||
|
||||
#define SekEndRun(after) { \
|
||||
SekCycleCnt -= SekCyclesLeft - after; \
|
||||
if(SekCycleCnt < 0) SekCycleCnt = 0; \
|
||||
SekSetCyclesLeft(after); \
|
||||
SekCycleCnt -= SekCyclesLeft - (after); \
|
||||
if (SekCycleCnt < 0) SekCycleCnt = 0; \
|
||||
SekEndTimeslice(after); \
|
||||
}
|
||||
|
||||
extern int SekCycleCntS68k;
|
||||
|
|
@ -157,13 +148,11 @@ extern int SekCycleAimS68k;
|
|||
|
||||
#ifdef EMU_CORE_DEBUG
|
||||
extern int dbg_irq_level;
|
||||
#undef SekSetCyclesLeftNoMCD
|
||||
#undef SekSetCyclesLeft
|
||||
#undef SekEndTimeslice
|
||||
#undef SekCyclesBurn
|
||||
#undef SekEndRun
|
||||
#undef SekInterrupt
|
||||
#define SekSetCyclesLeftNoMCD(c)
|
||||
#define SekSetCyclesLeft(c)
|
||||
#define SekEndTimeslice(c)
|
||||
#define SekCyclesBurn(c) c
|
||||
#define SekEndRun(c)
|
||||
#define SekInterrupt(irq) dbg_irq_level=irq
|
||||
|
|
@ -325,7 +314,7 @@ struct mcd_misc
|
|||
unsigned short hint_vector;
|
||||
unsigned char busreq;
|
||||
unsigned char s68k_pend_ints;
|
||||
unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending
|
||||
unsigned int state_flags; // 04: emu state: reset_pending
|
||||
unsigned int counter75hz;
|
||||
unsigned int pad0;
|
||||
int timer_int3; // 10
|
||||
|
|
|
|||
|
|
@ -94,7 +94,7 @@ static void DmaSlow(int len)
|
|||
|
||||
Pico.m.dma_xfers += len;
|
||||
if ((PicoAHW & PAHW_MCD) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCyclesBurn(CheckDMA());
|
||||
else SekSetCyclesLeftNoMCD(SekCyclesLeftNoMCD - CheckDMA());
|
||||
else SekEndTimeslice(SekCyclesLeftNoMCD - CheckDMA());
|
||||
|
||||
if ((source&0xe00000)==0xe00000) { // Ram
|
||||
pd=(u16 *)(Pico.ram+(source&0xfffe));
|
||||
|
|
|
|||
|
|
@ -59,6 +59,7 @@ OBJS += unzip/unzip.o unzip/unzip_stream.o
|
|||
ifeq "$(use_musashi)" "1"
|
||||
DEFINES += EMU_M68K
|
||||
OBJS += cpu/musashi/m68kops.o cpu/musashi/m68kcpu.o
|
||||
OBJS += cpu/musashi/m68kdasm.o
|
||||
endif
|
||||
ifeq "$(use_fame)" "1"
|
||||
DEFINES += EMU_F68K
|
||||
|
|
@ -76,10 +77,8 @@ endif
|
|||
ifeq "$(use_fame)" "1"
|
||||
ifeq "$(use_musashi)" "1"
|
||||
OBJS += pico/debugCPU.o
|
||||
OBJS += cpu/musashi/m68kdasm.o
|
||||
endif
|
||||
endif
|
||||
OBJS += cpu/musashi/m68kdasm.o
|
||||
|
||||
CFLAGS += $(addprefix -D,$(DEFINES))
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue