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sh2 drc, fix for mapping in register cache
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1a95ce340b
commit
efb6bc7d73
2 changed files with 22 additions and 54 deletions
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@ -1724,11 +1724,7 @@ static void rcache_remove_vreg_alias(int x, sh2_reg_e r)
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static void rcache_evict_vreg(int x)
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static void rcache_evict_vreg(int x)
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{
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{
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#if REMAP_REGISTER
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rcache_remap_vreg(x);
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rcache_remap_vreg(x);
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#else
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rcache_clean_vreg(x);
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#endif
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rcache_unmap_vreg(x);
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rcache_unmap_vreg(x);
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}
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}
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@ -1821,10 +1817,10 @@ static int rcache_allocate_temp(void)
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return x;
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return x;
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}
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}
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#if REMAP_REGISTER
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// maps a host register to a REG
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// maps a host register to a REG
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static int rcache_map_reg(sh2_reg_e r, int hr)
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static int rcache_map_reg(sh2_reg_e r, int hr)
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{
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{
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#if REMAP_REGISTER
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int i;
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int i;
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gconst_kill(r);
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gconst_kill(r);
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@ -1855,11 +1851,15 @@ static int rcache_map_reg(sh2_reg_e r, int hr)
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RCACHE_CHECK("after map");
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RCACHE_CHECK("after map");
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#endif
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#endif
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return cache_regs[i].hreg;
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return cache_regs[i].hreg;
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#else
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return rcache_get_reg(r, RC_GR_WRITE, NULL);
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#endif
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}
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}
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// remap vreg from a TEMP to a REG if it will be used (upcoming TEMP invalidation)
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// remap vreg from a TEMP to a REG if it will be used (upcoming TEMP invalidation)
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static void rcache_remap_vreg(int x)
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static void rcache_remap_vreg(int x)
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{
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{
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#if REMAP_REGISTER
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u32 rsl_d = rcache_regs_soon | rcache_regs_late;
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u32 rsl_d = rcache_regs_soon | rcache_regs_late;
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int d;
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int d;
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@ -1898,12 +1898,14 @@ static void rcache_remap_vreg(int x)
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#if DRC_DEBUG & 64
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#if DRC_DEBUG & 64
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RCACHE_CHECK("after remap");
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RCACHE_CHECK("after remap");
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#endif
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#endif
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}
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#else
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rcache_clean_vreg(x);
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#endif
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#endif
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}
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#if ALIAS_REGISTERS
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static void rcache_alias_vreg(sh2_reg_e rd, sh2_reg_e rs)
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static void rcache_alias_vreg(sh2_reg_e rd, sh2_reg_e rs)
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{
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{
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#if ALIAS_REGISTERS
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int x;
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int x;
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// if s isn't constant, it must be in cache for aliasing
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// if s isn't constant, it must be in cache for aliasing
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@ -1931,8 +1933,14 @@ static void rcache_alias_vreg(sh2_reg_e rd, sh2_reg_e rs)
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#if DRC_DEBUG & 64
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#if DRC_DEBUG & 64
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RCACHE_CHECK("after alias");
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RCACHE_CHECK("after alias");
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#endif
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#endif
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}
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#else
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int hr_s = rcache_get_reg(rs, RC_GR_READ, NULL);
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int hr_d = rcache_get_reg(rd, RC_GR_WRITE, NULL);
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emith_move_r_r(hr_d, hr_s);
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gconst_copy(rd, rs);
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#endif
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#endif
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}
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// note: must not be called when doing conditional code
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// note: must not be called when doing conditional code
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static int rcache_get_reg_(sh2_reg_e r, rc_gr_mode mode, int do_locking, int *hr)
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static int rcache_get_reg_(sh2_reg_e r, rc_gr_mode mode, int do_locking, int *hr)
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@ -2380,11 +2388,7 @@ static void rcache_clean_tmp(void)
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for (i = 0; i < ARRAY_SIZE(cache_regs); i++)
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for (i = 0; i < ARRAY_SIZE(cache_regs); i++)
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if (cache_regs[i].type == HR_CACHED && (cache_regs[i].htype & HRT_TEMP)) {
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if (cache_regs[i].type == HR_CACHED && (cache_regs[i].htype & HRT_TEMP)) {
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rcache_unlock(i);
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rcache_unlock(i);
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#if REMAP_REGISTER
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rcache_remap_vreg(i);
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rcache_remap_vreg(i);
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#else
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rcache_clean_vreg(i);
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#endif
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}
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}
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rcache_regs_clean = 0;
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rcache_regs_clean = 0;
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}
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}
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@ -2658,16 +2662,9 @@ static void emit_move_r_imm32(sh2_reg_e dst, u32 imm)
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static void emit_move_r_r(sh2_reg_e dst, sh2_reg_e src)
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static void emit_move_r_r(sh2_reg_e dst, sh2_reg_e src)
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{
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{
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if (gconst_check(src) || rcache_is_cached(src)) {
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if (gconst_check(src) || rcache_is_cached(src))
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#if ALIAS_REGISTERS
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rcache_alias_vreg(dst, src);
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rcache_alias_vreg(dst, src);
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#else
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else {
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int hr_s = rcache_get_reg(src, RC_GR_READ, NULL);
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int hr_d = rcache_get_reg(dst, RC_GR_WRITE, NULL);
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emith_move_r_r(hr_d, hr_s);
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gconst_copy(dst, src);
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#endif
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} else {
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int hr_d = rcache_get_reg(dst, RC_GR_WRITE, NULL);
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int hr_d = rcache_get_reg(dst, RC_GR_WRITE, NULL);
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emith_ctx_read(hr_d, src * 4);
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emith_ctx_read(hr_d, src * 4);
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}
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}
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@ -2828,11 +2825,7 @@ static int emit_memhandler_read_rr(SH2 *sh2, sh2_reg_e rd, sh2_reg_e rs, u32 off
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if (rd == SHR_TMP)
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if (rd == SHR_TMP)
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hr2 = hr;
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hr2 = hr;
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else
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else
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#if REMAP_REGISTER
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hr2 = rcache_map_reg(rd, hr);
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hr2 = rcache_map_reg(rd, hr);
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#else
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hr2 = rcache_get_reg(rd, RC_GR_WRITE, NULL);
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#endif
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if (hr != hr2) {
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if (hr != hr2) {
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emith_move_r_r(hr2, hr);
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emith_move_r_r(hr2, hr);
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@ -2902,11 +2895,7 @@ static int emit_indirect_indexed_read(SH2 *sh2, sh2_reg_e rd, sh2_reg_e rx, sh2_
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if (rd == SHR_TMP)
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if (rd == SHR_TMP)
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hr2 = hr;
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hr2 = hr;
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else
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else
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#if REMAP_REGISTER
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hr2 = rcache_map_reg(rd, hr);
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hr2 = rcache_map_reg(rd, hr);
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#else
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hr2 = rcache_get_reg(rd, RC_GR_WRITE, NULL);
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#endif
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if (hr != hr2) {
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if (hr != hr2) {
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emith_move_r_r(hr2, hr);
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emith_move_r_r(hr2, hr);
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@ -3795,11 +3784,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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emith_add_r_r_imm(tmp, tmp2, 2 + (op & 0xff) * 2);
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emith_add_r_r_imm(tmp, tmp2, 2 + (op & 0xff) * 2);
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}
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}
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tmp2 = emit_memhandler_read(opd->size);
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tmp2 = emit_memhandler_read(opd->size);
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#if REMAP_REGISTER
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tmp3 = rcache_map_reg(GET_Rn(), tmp2);
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tmp3 = rcache_map_reg(GET_Rn(), tmp2);
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#else
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tmp3 = rcache_get_reg(GET_Rn(), RC_GR_WRITE, NULL);
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#endif
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if (tmp3 != tmp2) {
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if (tmp3 != tmp2) {
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emith_move_r_r(tmp3, tmp2);
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emith_move_r_r(tmp3, tmp2);
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rcache_free_tmp(tmp2);
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rcache_free_tmp(tmp2);
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@ -3903,11 +3888,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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rcache_invalidate_tmp();
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rcache_invalidate_tmp();
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emith_abicall(sh2_drc_divu32);
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emith_abicall(sh2_drc_divu32);
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tmp = rcache_get_tmp_ret();
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tmp = rcache_get_tmp_ret();
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#if REMAP_REGISTER
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tmp2 = rcache_map_reg(div(opd).rn, tmp);
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tmp2 = rcache_map_reg(div(opd).rn, tmp);
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#else
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tmp2 = rcache_get_reg(div(opd).rn, RC_GR_WRITE, NULL);
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#endif
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if (tmp != tmp2)
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if (tmp != tmp2)
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emith_move_r_r(tmp2, tmp);
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emith_move_r_r(tmp2, tmp);
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@ -3930,11 +3911,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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rcache_invalidate_tmp();
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rcache_invalidate_tmp();
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emith_abicall(sh2_drc_divu64);
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emith_abicall(sh2_drc_divu64);
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tmp = rcache_get_tmp_ret();
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tmp = rcache_get_tmp_ret();
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#if REMAP_REGISTER
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tmp2 = rcache_map_reg(div(opd).rn, tmp);
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tmp2 = rcache_map_reg(div(opd).rn, tmp);
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#else
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tmp2 = rcache_get_reg(div(opd).rn, RC_GR_WRITE, NULL);
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#endif
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tmp4 = rcache_get_reg(div(opd).ro, RC_GR_WRITE, NULL);
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tmp4 = rcache_get_reg(div(opd).ro, RC_GR_WRITE, NULL);
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if (tmp != tmp2)
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if (tmp != tmp2)
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emith_move_r_r(tmp2, tmp);
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emith_move_r_r(tmp2, tmp);
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@ -4028,11 +4005,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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rcache_invalidate_tmp();
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rcache_invalidate_tmp();
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emith_abicall(sh2_drc_divs32);
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emith_abicall(sh2_drc_divs32);
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tmp = rcache_get_tmp_ret();
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tmp = rcache_get_tmp_ret();
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#if REMAP_REGISTER
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tmp2 = rcache_map_reg(div(opd).rn, tmp);
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tmp2 = rcache_map_reg(div(opd).rn, tmp);
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#else
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tmp2 = rcache_get_reg(div(opd).rn, RC_GR_WRITE, NULL);
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#endif
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if (tmp != tmp2)
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if (tmp != tmp2)
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emith_move_r_r(tmp2, tmp);
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emith_move_r_r(tmp2, tmp);
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tmp3 = rcache_get_tmp();
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tmp3 = rcache_get_tmp();
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@ -4058,11 +4031,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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rcache_invalidate_tmp();
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rcache_invalidate_tmp();
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emith_abicall(sh2_drc_divs64);
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emith_abicall(sh2_drc_divs64);
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tmp = rcache_get_tmp_ret();
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tmp = rcache_get_tmp_ret();
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#if REMAP_REGISTER
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tmp2 = rcache_map_reg(div(opd).rn, tmp);
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tmp2 = rcache_map_reg(div(opd).rn, tmp);
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#else
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tmp2 = rcache_get_reg(div(opd).rn, RC_GR_WRITE, NULL);
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#endif
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tmp4 = rcache_get_reg(div(opd).ro, RC_GR_WRITE, NULL);
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tmp4 = rcache_get_reg(div(opd).ro, RC_GR_WRITE, NULL);
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if (tmp != tmp2)
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if (tmp != tmp2)
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emith_move_r_r(tmp2, tmp);
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emith_move_r_r(tmp2, tmp);
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@ -1,7 +1,7 @@
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int sh2_drc_init(SH2 *sh2);
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int sh2_drc_init(SH2 *sh2);
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void sh2_drc_finish(SH2 *sh2);
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void sh2_drc_finish(SH2 *sh2);
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void sh2_drc_wcheck_ram(uint32_t a, unsigned len, SH2 *sh2);
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void sh2_drc_wcheck_ram(u32 a, unsigned len, SH2 *sh2);
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void sh2_drc_wcheck_da(uint32_t a, unsigned len, SH2 *sh2);
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void sh2_drc_wcheck_da(u32 a, unsigned len, SH2 *sh2);
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#ifdef DRC_SH2
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#ifdef DRC_SH2
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void sh2_drc_mem_setup(SH2 *sh2);
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void sh2_drc_mem_setup(SH2 *sh2);
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@ -27,9 +27,8 @@ void sh2_drc_flush_all(void);
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#define OF_DELAY_LOOP (2 << 2)
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#define OF_DELAY_LOOP (2 << 2)
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#define OF_POLL_LOOP (3 << 2)
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#define OF_POLL_LOOP (3 << 2)
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unsigned short scan_block(uint32_t base_pc, int is_slave,
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u16 scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc,
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unsigned char *op_flags, uint32_t *end_pc,
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u32 *base_literals, u32 *end_literals);
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uint32_t *base_literals, uint32_t *end_literals);
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#if defined(DRC_SH2) && defined(__GNUC__) && !defined(__clang__)
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#if defined(DRC_SH2) && defined(__GNUC__) && !defined(__clang__)
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// direct access to some host CPU registers used by the DRC if gcc is used.
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// direct access to some host CPU registers used by the DRC if gcc is used.
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