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sh2 drc: fixed some RISC-V bugs

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This commit is contained in:
kub 2019-11-20 01:01:33 +01:00
parent f2d19ddf2a
commit f1da0a362f
2 changed files with 7 additions and 7 deletions
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8
README.md
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@ -1,14 +1,14 @@
This is my foray into dynamic recompilation using PicoDrive, a
Megadrive / Genesis / Sega CD / Mega CD / 32X / SMS emulator.
I added support for MIPS (mips32r1) and ARM64 (aarch64) to the recompiler, as
well as spent much effort to optimize the code generated by the DRC.
I added support for MIPS (mips32r1), ARM64 (aarch64) and RISC-V (RV64IM) to the
SH2 recompiler, as well as spent much effort to optimize the DRC-generated code.
I also optimized SH2 memory access inside the emulator, and did some work on
M68K/SH2 CPU synchronization to fix some problems and speed up the emulator.
It got a bit out of hand. I ended up doing fixes and optimzations all over the
It got a bit out of hand. I ended up doing fixes and optimizations all over the
place, mainly for 32X and CD, 32X graphics handling, and probably some more,
see the commit history.
see the commit history. As a result, 32X emulation speed has improved a lot.
### compiling

6
cpu/drc/emit_riscv.c
View file

@ -220,9 +220,9 @@ enum { F2_ALT=0x20, F2_MULDIV=0x01 };
/*EMIT(R5_ADDW_IMM(s1, s1, 0));*/ \
/*EMIT(R5_ADDW_IMM(s2, s2, 0));*/ \
EMIT(R5_MUL(dlo, s1, s2)); \
EMIT(R5_LSR_IMM(dhi, dlo, 32)); \
EMIT(R5_ASR_IMM(dhi, dlo, 32)); \
EMIT(R5_LSL_IMM(dlo, dlo, 32)); \
EMIT(R5_LSR_IMM(dlo, dlo, 32)); \
EMIT(R5_ASR_IMM(dlo, dlo, 32)); \
} while (0)
#define EMIT_R5_MULLS_REG(dlo, dhi, s1, s2) \
@ -1322,7 +1322,7 @@ static int emith_cond_check(int cond, int *r, int *s)
u32 r_ = _CB(*ptr_,5,15,0), s_ = _CB(*ptr_,5,20,0); \
EMIT_PTR(p_, R5_BCOND(f1_, r_, s_, disp_ & 0x00001fff)); \
} else { \
u32 *p_ = -- ptr_; \
u32 *p_ = ptr_; \
uintptr_t target_ = (uintptr_t)(target); \
EMIT_PTR(p_, R5_MOVT_IMM(AT, target_ + _CB(target_,1,11,12))); \
EMIT_PTR(p_, R5_JR(AT, target_)); \