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remove regs union due to compiler issues

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GP2X toolchains are padding the unions no matter what :(
This commit is contained in:
notaz 2013-10-12 00:40:40 +03:00
parent 9770f5316f
commit f47d0a2898
5 changed files with 144 additions and 160 deletions
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184
pico/cd/cdc.c
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@ -80,10 +80,10 @@ typedef struct
{ {
uint8 ifstat; uint8 ifstat;
uint8 ifctrl; uint8 ifctrl;
reg16_t dbc; uint16 dbc;
reg16_t dac; uint16 dac;
reg16_t pt; uint16 pt;
reg16_t wa; uint16 wa;
uint8 ctrl[2]; uint8 ctrl[2];
uint8 head[2][4]; uint8 head[2][4];
uint8 stat[4]; uint8 stat[4];
@ -103,7 +103,7 @@ void cdc_init(void)
void cdc_reset(void) void cdc_reset(void)
{ {
/* reset CDC register index */ /* reset CDC register index */
Pico_mcd->regs[0x04>>1].byte.l = 0x00; Pico_mcd->s68k_regs[0x04+1] = 0x00;
/* reset CDC registers */ /* reset CDC registers */
cdc.ifstat = 0xff; cdc.ifstat = 0xff;
@ -216,7 +216,7 @@ int cdc_context_load_old(uint8 *state)
old_load(stat, 67916); old_load(stat, 67916);
cdc.dma_w = 0; cdc.dma_w = 0;
switch (Pico_mcd->regs[0x04>>1].byte.h & 0x07) switch (Pico_mcd->s68k_regs[0x04+0] & 0x07)
{ {
case 4: /* PCM RAM DMA */ case 4: /* PCM RAM DMA */
cdc.dma_w = pcm_ram_dma_w; cdc.dma_w = pcm_ram_dma_w;
@ -225,16 +225,16 @@ int cdc_context_load_old(uint8 *state)
cdc.dma_w = prg_ram_dma_w; cdc.dma_w = prg_ram_dma_w;
break; break;
case 7: /* WORD-RAM DMA */ case 7: /* WORD-RAM DMA */
if (Pico_mcd->regs[0x02 >> 1].byte.l & 0x04) if (Pico_mcd->s68k_regs[0x02+1] & 0x04)
{ {
if (Pico_mcd->regs[0x02 >> 1].byte.l & 0x01) if (Pico_mcd->s68k_regs[0x02+1] & 0x01)
cdc.dma_w = word_ram_0_dma_w; cdc.dma_w = word_ram_0_dma_w;
else else
cdc.dma_w = word_ram_1_dma_w; cdc.dma_w = word_ram_1_dma_w;
} }
else else
{ {
if (Pico_mcd->regs[0x02 >> 1].byte.l & 0x02) if (Pico_mcd->s68k_regs[0x02+1] & 0x02)
cdc.dma_w = word_ram_2M_dma_w; cdc.dma_w = word_ram_2M_dma_w;
} }
break; break;
@ -247,7 +247,7 @@ int cdc_context_load_old(uint8 *state)
static void do_dma(enum dma_type type, int words_in) static void do_dma(enum dma_type type, int words_in)
{ {
int dma_addr = (Pico_mcd->s68k_regs[0x0a] << 8) | Pico_mcd->s68k_regs[0x0b]; int dma_addr = (Pico_mcd->s68k_regs[0x0a] << 8) | Pico_mcd->s68k_regs[0x0b];
int src_addr = cdc.dac.w & 0x3ffe; int src_addr = cdc.dac & 0x3ffe;
int dst_addr = dma_addr; int dst_addr = dma_addr;
int words = words_in; int words = words_in;
int dst_limit = 0; int dst_limit = 0;
@ -255,7 +255,7 @@ static void do_dma(enum dma_type type, int words_in)
int len; int len;
elprintf(EL_CD, "dma %d %04x->%04x %x", elprintf(EL_CD, "dma %d %04x->%04x %x",
type, cdc.dac.w, dst_addr, words_in); type, cdc.dac, dst_addr, words_in);
switch (type) switch (type)
{ {
@ -331,7 +331,7 @@ static void do_dma(enum dma_type type, int words_in)
update_dma: update_dma:
/* update DMA addresses */ /* update DMA addresses */
cdc.dac.w += words_in * 2; cdc.dac += words_in * 2;
if (type == pcm_ram_dma_w) if (type == pcm_ram_dma_w)
dma_addr += words_in >> 1; dma_addr += words_in >> 1;
else else
@ -344,14 +344,14 @@ update_dma:
void cdc_dma_update(void) void cdc_dma_update(void)
{ {
/* end of DMA transfer ? */ /* end of DMA transfer ? */
//if (cdc.dbc.w < DMA_BYTES_PER_LINE) //if (cdc.dbc < DMA_BYTES_PER_LINE)
{ {
/* transfer remaining words using 16-bit DMA */ /* transfer remaining words using 16-bit DMA */
//cdc.dma_w((cdc.dbc.w + 1) >> 1); //cdc.dma_w((cdc.dbc + 1) >> 1);
do_dma(cdc.dma_w, (cdc.dbc.w + 1) >> 1); do_dma(cdc.dma_w, (cdc.dbc + 1) >> 1);
/* reset data byte counter (DBCH bits 4-7 should be set to 1) */ /* reset data byte counter (DBCH bits 4-7 should be set to 1) */
cdc.dbc.w = 0xf000; cdc.dbc = 0xf000;
/* clear !DTEN and !DTBSY */ /* clear !DTEN and !DTBSY */
cdc.ifstat |= (BIT_DTBSY | BIT_DTEN); cdc.ifstat |= (BIT_DTBSY | BIT_DTEN);
@ -363,7 +363,7 @@ void cdc_dma_update(void)
if (cdc.ifctrl & BIT_DTEIEN) if (cdc.ifctrl & BIT_DTEIEN)
{ {
/* level 5 interrupt enabled ? */ /* level 5 interrupt enabled ? */
if (Pico_mcd->regs[0x32>>1].byte.l & PCDS_IEN5) if (Pico_mcd->s68k_regs[0x32+1] & PCDS_IEN5)
{ {
/* update IRQ level */ /* update IRQ level */
elprintf(EL_INTS, "cdc DTE irq 5"); elprintf(EL_INTS, "cdc DTE irq 5");
@ -372,7 +372,7 @@ void cdc_dma_update(void)
} }
/* clear DSR bit & set EDT bit (SCD register $04) */ /* clear DSR bit & set EDT bit (SCD register $04) */
Pico_mcd->regs[0x04>>1].byte.h = (Pico_mcd->regs[0x04>>1].byte.h & 0x07) | 0x80; Pico_mcd->s68k_regs[0x04+0] = (Pico_mcd->s68k_regs[0x04+0] & 0x07) | 0x80;
/* disable DMA transfer */ /* disable DMA transfer */
cdc.dma_w = 0; cdc.dma_w = 0;
@ -384,7 +384,7 @@ void cdc_dma_update(void)
cdc.dma_w(DMA_BYTES_PER_LINE >> 1); cdc.dma_w(DMA_BYTES_PER_LINE >> 1);
/* decrement data byte counter */ /* decrement data byte counter */
cdc.dbc.w -= length; cdc.dbc -= length;
} }
#endif #endif
} }
@ -407,7 +407,7 @@ int cdc_decoder_update(uint8 header[4])
if (cdc.ifctrl & BIT_DECIEN) if (cdc.ifctrl & BIT_DECIEN)
{ {
/* level 5 interrupt enabled ? */ /* level 5 interrupt enabled ? */
if (Pico_mcd->regs[0x32>>1].byte.l & PCDS_IEN5) if (Pico_mcd->s68k_regs[0x32+1] & PCDS_IEN5)
{ {
/* update IRQ level */ /* update IRQ level */
elprintf(EL_INTS, "cdc DEC irq 5"); elprintf(EL_INTS, "cdc DEC irq 5");
@ -421,13 +421,13 @@ int cdc_decoder_update(uint8 header[4])
uint16 offset; uint16 offset;
/* increment block pointer */ /* increment block pointer */
cdc.pt.w += 2352; cdc.pt += 2352;
/* increment write address */ /* increment write address */
cdc.wa.w += 2352; cdc.wa += 2352;
/* CDC buffer address */ /* CDC buffer address */
offset = cdc.pt.w & 0x3fff; offset = cdc.pt & 0x3fff;
/* write CDD block header (4 bytes) */ /* write CDD block header (4 bytes) */
memcpy(cdc.ram + offset, header, 4); memcpy(cdc.ram + offset, header, 4);
@ -454,9 +454,9 @@ int cdc_decoder_update(uint8 header[4])
void cdc_reg_w(unsigned char data) void cdc_reg_w(unsigned char data)
{ {
#ifdef LOG_CDC #ifdef LOG_CDC
elprintf(EL_STATUS, "CDC register %X write 0x%04x", Pico_mcd->regs[0x04>>1].byte.l & 0x0F, data); elprintf(EL_STATUS, "CDC register %X write 0x%04x", Pico_mcd->s68k_regs[0x04+1] & 0x0F, data);
#endif #endif
switch (Pico_mcd->regs[0x04>>1].byte.l & 0x0F) switch (Pico_mcd->s68k_regs[0x04+1] & 0x0F)
{ {
case 0x01: /* IFCTRL */ case 0x01: /* IFCTRL */
{ {
@ -465,7 +465,7 @@ void cdc_reg_w(unsigned char data)
((data & BIT_DECIEN) && !(cdc.ifstat & BIT_DECI))) ((data & BIT_DECIEN) && !(cdc.ifstat & BIT_DECI)))
{ {
/* level 5 interrupt enabled ? */ /* level 5 interrupt enabled ? */
if (Pico_mcd->regs[0x32>>1].byte.l & PCDS_IEN5) if (Pico_mcd->s68k_regs[0x32+1] & PCDS_IEN5)
{ {
/* update IRQ level */ /* update IRQ level */
elprintf(EL_INTS, "cdc pending irq 5"); elprintf(EL_INTS, "cdc pending irq 5");
@ -486,28 +486,32 @@ void cdc_reg_w(unsigned char data)
} }
cdc.ifctrl = data; cdc.ifctrl = data;
Pico_mcd->regs[0x04>>1].byte.l = 0x02; Pico_mcd->s68k_regs[0x04+1] = 0x02;
break; break;
} }
case 0x02: /* DBCL */ case 0x02: /* DBCL */
cdc.dbc.byte.l = data; cdc.dbc &= 0xff00;
Pico_mcd->regs[0x04>>1].byte.l = 0x03; cdc.dbc |= data;
Pico_mcd->s68k_regs[0x04+1] = 0x03;
break; break;
case 0x03: /* DBCH */ case 0x03: /* DBCH */
cdc.dbc.byte.h = data; cdc.dbc &= 0x00ff;
Pico_mcd->regs[0x04>>1].byte.l = 0x04; cdc.dbc |= data << 8;
Pico_mcd->s68k_regs[0x04+1] = 0x04;
break; break;
case 0x04: /* DACL */ case 0x04: /* DACL */
cdc.dac.byte.l = data; cdc.dac &= 0xff00;
Pico_mcd->regs[0x04>>1].byte.l = 0x05; cdc.dac |= data;
Pico_mcd->s68k_regs[0x04+1] = 0x05;
break; break;
case 0x05: /* DACH */ case 0x05: /* DACH */
cdc.dac.byte.h = data; cdc.dac &= 0x00ff;
Pico_mcd->regs[0x04>>1].byte.l = 0x06; cdc.dac |= data << 8;
Pico_mcd->s68k_regs[0x04+1] = 0x06;
break; break;
case 0x06: /* DTRG */ case 0x06: /* DTRG */
@ -519,15 +523,15 @@ void cdc_reg_w(unsigned char data)
cdc.ifstat &= ~BIT_DTBSY; cdc.ifstat &= ~BIT_DTBSY;
/* clear DBCH bits 4-7 */ /* clear DBCH bits 4-7 */
cdc.dbc.byte.h &= 0x0f; cdc.dbc &= 0x0fff;
/* clear EDT & DSR bits (SCD register $04) */ /* clear EDT & DSR bits (SCD register $04) */
Pico_mcd->regs[0x04>>1].byte.h &= 0x07; Pico_mcd->s68k_regs[0x04+0] &= 0x07;
cdc.dma_w = 0; cdc.dma_w = 0;
/* setup data transfer destination */ /* setup data transfer destination */
switch (Pico_mcd->regs[0x04>>1].byte.h & 0x07) switch (Pico_mcd->s68k_regs[0x04+0] & 0x07)
{ {
case 2: /* MAIN-CPU host read */ case 2: /* MAIN-CPU host read */
case 3: /* SUB-CPU host read */ case 3: /* SUB-CPU host read */
@ -536,7 +540,7 @@ void cdc_reg_w(unsigned char data)
cdc.ifstat &= ~BIT_DTEN; cdc.ifstat &= ~BIT_DTEN;
/* set DSR bit (register $04) */ /* set DSR bit (register $04) */
Pico_mcd->regs[0x04>>1].byte.h |= 0x40; Pico_mcd->s68k_regs[0x04+0] |= 0x40;
break; break;
} }
@ -555,10 +559,10 @@ void cdc_reg_w(unsigned char data)
case 7: /* WORD-RAM DMA */ case 7: /* WORD-RAM DMA */
{ {
/* check memory mode */ /* check memory mode */
if (Pico_mcd->regs[0x02 >> 1].byte.l & 0x04) if (Pico_mcd->s68k_regs[0x02+1] & 0x04)
{ {
/* 1M mode */ /* 1M mode */
if (Pico_mcd->regs[0x02 >> 1].byte.l & 0x01) if (Pico_mcd->s68k_regs[0x02+1] & 0x01)
{ {
/* Word-RAM bank 0 is assigned to SUB-CPU */ /* Word-RAM bank 0 is assigned to SUB-CPU */
cdc.dma_w = word_ram_0_dma_w; cdc.dma_w = word_ram_0_dma_w;
@ -572,7 +576,7 @@ void cdc_reg_w(unsigned char data)
else else
{ {
/* 2M mode */ /* 2M mode */
if (Pico_mcd->regs[0x02 >> 1].byte.l & 0x02) if (Pico_mcd->s68k_regs[0x02+1] & 0x02)
{ {
/* only process DMA if Word-RAM is assigned to SUB-CPU */ /* only process DMA if Word-RAM is assigned to SUB-CPU */
cdc.dma_w = word_ram_2M_dma_w; cdc.dma_w = word_ram_2M_dma_w;
@ -584,16 +588,16 @@ void cdc_reg_w(unsigned char data)
default: /* invalid */ default: /* invalid */
{ {
elprintf(EL_ANOMALY, "invalid CDC tranfer destination (%d)", elprintf(EL_ANOMALY, "invalid CDC tranfer destination (%d)",
Pico_mcd->regs[0x04>>1].byte.h & 0x07); Pico_mcd->s68k_regs[0x04+0] & 0x07);
break; break;
} }
} }
if (cdc.dma_w) if (cdc.dma_w)
pcd_event_schedule_s68k(PCD_EVENT_DMA, cdc.dbc.w / 2); pcd_event_schedule_s68k(PCD_EVENT_DMA, cdc.dbc / 2);
} }
Pico_mcd->regs[0x04>>1].byte.l = 0x07; Pico_mcd->s68k_regs[0x04+1] = 0x07;
break; break;
} }
@ -603,7 +607,7 @@ void cdc_reg_w(unsigned char data)
cdc.ifstat |= BIT_DTEI; cdc.ifstat |= BIT_DTEI;
/* clear DBCH bits 4-7 */ /* clear DBCH bits 4-7 */
cdc.dbc.byte.h &= 0x0f; cdc.dbc &= 0x0fff;
#if 0 #if 0
/* no pending decoder interrupt ? */ /* no pending decoder interrupt ? */
@ -613,18 +617,20 @@ void cdc_reg_w(unsigned char data)
SekInterruptClearS68k(5); SekInterruptClearS68k(5);
} }
#endif #endif
Pico_mcd->regs[0x04>>1].byte.l = 0x08; Pico_mcd->s68k_regs[0x04+1] = 0x08;
break; break;
} }
case 0x08: /* WAL */ case 0x08: /* WAL */
cdc.wa.byte.l = data; cdc.wa &= 0xff00;
Pico_mcd->regs[0x04>>1].byte.l = 0x09; cdc.wa |= data;
Pico_mcd->s68k_regs[0x04+1] = 0x09;
break; break;
case 0x09: /* WAH */ case 0x09: /* WAH */
cdc.wa.byte.h = data; cdc.wa &= 0x00ff;
Pico_mcd->regs[0x04>>1].byte.l = 0x0a; cdc.wa |= data << 8;
Pico_mcd->s68k_regs[0x04+1] = 0x0a;
break; break;
case 0x0a: /* CTRL0 */ case 0x0a: /* CTRL0 */
@ -645,7 +651,7 @@ void cdc_reg_w(unsigned char data)
} }
cdc.ctrl[0] = data; cdc.ctrl[0] = data;
Pico_mcd->regs[0x04>>1].byte.l = 0x0b; Pico_mcd->s68k_regs[0x04+1] = 0x0b;
break; break;
} }
@ -664,22 +670,24 @@ void cdc_reg_w(unsigned char data)
} }
cdc.ctrl[1] = data; cdc.ctrl[1] = data;
Pico_mcd->regs[0x04>>1].byte.l = 0x0c; Pico_mcd->s68k_regs[0x04+1] = 0x0c;
break; break;
} }
case 0x0c: /* PTL */ case 0x0c: /* PTL */
cdc.pt.byte.l = data; cdc.pt &= 0xff00;
Pico_mcd->regs[0x04>>1].byte.l = 0x0d; cdc.pt |= data;
Pico_mcd->s68k_regs[0x04+1] = 0x0d;
break; break;
case 0x0d: /* PTH */ case 0x0d: /* PTH */
cdc.pt.byte.h = data; cdc.pt &= 0x00ff;
Pico_mcd->regs[0x04>>1].byte.l = 0x0e; cdc.pt |= data << 8;
Pico_mcd->s68k_regs[0x04+1] = 0x0e;
break; break;
case 0x0e: /* CTRL2 (unused) */ case 0x0e: /* CTRL2 (unused) */
Pico_mcd->regs[0x04>>1].byte.l = 0x0f; Pico_mcd->s68k_regs[0x04+1] = 0x0f;
break; break;
case 0x0f: /* RESET */ case 0x0f: /* RESET */
@ -693,62 +701,62 @@ void cdc_reg_w(unsigned char data)
unsigned char cdc_reg_r(void) unsigned char cdc_reg_r(void)
{ {
switch (Pico_mcd->regs[0x04>>1].byte.l & 0x0F) switch (Pico_mcd->s68k_regs[0x04+1] & 0x0F)
{ {
case 0x01: /* IFSTAT */ case 0x01: /* IFSTAT */
Pico_mcd->regs[0x04>>1].byte.l = 0x02; Pico_mcd->s68k_regs[0x04+1] = 0x02;
return cdc.ifstat; return cdc.ifstat;
case 0x02: /* DBCL */ case 0x02: /* DBCL */
Pico_mcd->regs[0x04>>1].byte.l = 0x03; Pico_mcd->s68k_regs[0x04+1] = 0x03;
return cdc.dbc.byte.l; return cdc.dbc & 0xff;
case 0x03: /* DBCH */ case 0x03: /* DBCH */
Pico_mcd->regs[0x04>>1].byte.l = 0x04; Pico_mcd->s68k_regs[0x04+1] = 0x04;
return cdc.dbc.byte.h; return (cdc.dbc >> 8) & 0xff;
case 0x04: /* HEAD0 */ case 0x04: /* HEAD0 */
Pico_mcd->regs[0x04>>1].byte.l = 0x05; Pico_mcd->s68k_regs[0x04+1] = 0x05;
return cdc.head[cdc.ctrl[1] & BIT_SHDREN][0]; return cdc.head[cdc.ctrl[1] & BIT_SHDREN][0];
case 0x05: /* HEAD1 */ case 0x05: /* HEAD1 */
Pico_mcd->regs[0x04>>1].byte.l = 0x06; Pico_mcd->s68k_regs[0x04+1] = 0x06;
return cdc.head[cdc.ctrl[1] & BIT_SHDREN][1]; return cdc.head[cdc.ctrl[1] & BIT_SHDREN][1];
case 0x06: /* HEAD2 */ case 0x06: /* HEAD2 */
Pico_mcd->regs[0x04>>1].byte.l = 0x07; Pico_mcd->s68k_regs[0x04+1] = 0x07;
return cdc.head[cdc.ctrl[1] & BIT_SHDREN][2]; return cdc.head[cdc.ctrl[1] & BIT_SHDREN][2];
case 0x07: /* HEAD3 */ case 0x07: /* HEAD3 */
Pico_mcd->regs[0x04>>1].byte.l = 0x08; Pico_mcd->s68k_regs[0x04+1] = 0x08;
return cdc.head[cdc.ctrl[1] & BIT_SHDREN][3]; return cdc.head[cdc.ctrl[1] & BIT_SHDREN][3];
case 0x08: /* PTL */ case 0x08: /* PTL */
Pico_mcd->regs[0x04>>1].byte.l = 0x09; Pico_mcd->s68k_regs[0x04+1] = 0x09;
return cdc.pt.byte.l; return cdc.pt & 0xff;
case 0x09: /* PTH */ case 0x09: /* PTH */
Pico_mcd->regs[0x04>>1].byte.l = 0x0a; Pico_mcd->s68k_regs[0x04+1] = 0x0a;
return cdc.pt.byte.h; return (cdc.pt >> 8) & 0xff;
case 0x0a: /* WAL */ case 0x0a: /* WAL */
Pico_mcd->regs[0x04>>1].byte.l = 0x0b; Pico_mcd->s68k_regs[0x04+1] = 0x0b;
return cdc.wa.byte.l; return cdc.wa & 0xff;
case 0x0b: /* WAH */ case 0x0b: /* WAH */
Pico_mcd->regs[0x04>>1].byte.l = 0x0c; Pico_mcd->s68k_regs[0x04+1] = 0x0c;
return cdc.wa.byte.h; return (cdc.wa >> 8) & 0xff;
case 0x0c: /* STAT0 */ case 0x0c: /* STAT0 */
Pico_mcd->regs[0x04>>1].byte.l = 0x0d; Pico_mcd->s68k_regs[0x04+1] = 0x0d;
return cdc.stat[0]; return cdc.stat[0];
case 0x0d: /* STAT1 (always return 0) */ case 0x0d: /* STAT1 (always return 0) */
Pico_mcd->regs[0x04>>1].byte.l = 0x0e; Pico_mcd->s68k_regs[0x04+1] = 0x0e;
return 0x00; return 0x00;
case 0x0e: /* STAT2 */ case 0x0e: /* STAT2 */
Pico_mcd->regs[0x04>>1].byte.l = 0x0f; Pico_mcd->s68k_regs[0x04+1] = 0x0f;
return cdc.stat[2]; return cdc.stat[2];
case 0x0f: /* STAT3 */ case 0x0f: /* STAT3 */
@ -770,7 +778,7 @@ unsigned char cdc_reg_r(void)
} }
#endif #endif
Pico_mcd->regs[0x04>>1].byte.l = 0x00; Pico_mcd->s68k_regs[0x04+1] = 0x00;
return data; return data;
} }
@ -785,24 +793,24 @@ unsigned short cdc_host_r(void)
if (!(cdc.ifstat & BIT_DTEN)) if (!(cdc.ifstat & BIT_DTEN))
{ {
/* read data word from CDC RAM buffer */ /* read data word from CDC RAM buffer */
uint8 *datap = cdc.ram + (cdc.dac.w & 0x3ffe); uint8 *datap = cdc.ram + (cdc.dac & 0x3ffe);
uint16 data = (datap[0] << 8) | datap[1]; uint16 data = (datap[0] << 8) | datap[1];
#ifdef LOG_CDC #ifdef LOG_CDC
error("CDC host read 0x%04x -> 0x%04x (dbc=0x%x) (%X)\n", cdc.dac.w, data, cdc.dbc.w, s68k.pc); error("CDC host read 0x%04x -> 0x%04x (dbc=0x%x) (%X)\n", cdc.dac, data, cdc.dbc, s68k.pc);
#endif #endif
/* increment data address counter */ /* increment data address counter */
cdc.dac.w += 2; cdc.dac += 2;
/* decrement data byte counter */ /* decrement data byte counter */
cdc.dbc.w -= 2; cdc.dbc -= 2;
/* end of transfer ? */ /* end of transfer ? */
if ((int16)cdc.dbc.w <= 0) if ((int16)cdc.dbc <= 0)
{ {
/* reset data byte counter (DBCH bits 4-7 should be set to 1) */ /* reset data byte counter (DBCH bits 4-7 should be set to 1) */
cdc.dbc.w = 0xf000; cdc.dbc = 0xf000;
/* clear !DTEN and !DTBSY */ /* clear !DTEN and !DTBSY */
cdc.ifstat |= (BIT_DTBSY | BIT_DTEN); cdc.ifstat |= (BIT_DTBSY | BIT_DTEN);
@ -814,7 +822,7 @@ unsigned short cdc_host_r(void)
if (cdc.ifctrl & BIT_DTEIEN) if (cdc.ifctrl & BIT_DTEIEN)
{ {
/* level 5 interrupt enabled ? */ /* level 5 interrupt enabled ? */
if (Pico_mcd->regs[0x32>>1].byte.l & PCDS_IEN5) if (Pico_mcd->s68k_regs[0x32+1] & PCDS_IEN5)
{ {
/* update IRQ level */ /* update IRQ level */
elprintf(EL_INTS, "cdc DTE irq 5"); elprintf(EL_INTS, "cdc DTE irq 5");
@ -823,7 +831,7 @@ unsigned short cdc_host_r(void)
} }
/* clear DSR bit & set EDT bit (SCD register $04) */ /* clear DSR bit & set EDT bit (SCD register $04) */
Pico_mcd->regs[0x04>>1].byte.h = (Pico_mcd->regs[0x04>>1].byte.h & 0x07) | 0x80; Pico_mcd->s68k_regs[0x04+0] = (Pico_mcd->s68k_regs[0x04+0] & 0x07) | 0x80;
} }
return data; return data;

92
pico/cd/cdd.c
View file

@ -519,7 +519,7 @@ void cdd_read_audio(unsigned int samples)
samples = blip_clocks_needed(blip[0], samples); samples = blip_clocks_needed(blip[0], samples);
/* audio track playing ? */ /* audio track playing ? */
if (!Pico_mcd->regs[0x36>>1].byte.h && cdd.toc.tracks[cdd.index].fd) if (!Pico_mcd->s68k_regs[0x36+0] && cdd.toc.tracks[cdd.index].fd)
{ {
int i, mul, delta; int i, mul, delta;
@ -720,7 +720,7 @@ void cdd_update(void)
if (cdd.lba >= cdd.toc.tracks[cdd.index].start) if (cdd.lba >= cdd.toc.tracks[cdd.index].start)
{ {
/* audio track playing */ /* audio track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x00; Pico_mcd->s68k_regs[0x36+0] = 0x00;
} }
/* audio blocks are still sent to CDC as well as CD DAC/Fader */ /* audio blocks are still sent to CDC as well as CD DAC/Fader */
@ -752,7 +752,7 @@ void cdd_update(void)
cdd.index++; cdd.index++;
/* PAUSE between tracks */ /* PAUSE between tracks */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* seek to next audio track start */ /* seek to next audio track start */
#ifdef USE_LIBTREMOR #ifdef USE_LIBTREMOR
@ -806,7 +806,7 @@ void cdd_update(void)
/* AUDIO track playing ? */ /* AUDIO track playing ? */
if (cdd.status == CD_PLAY) if (cdd.status == CD_PLAY)
{ {
Pico_mcd->regs[0x36>>1].byte.h = 0x00; Pico_mcd->s68k_regs[0x36+0] = 0x00;
} }
} }
else if (cdd.lba < cdd.toc.tracks[cdd.index].start) else if (cdd.lba < cdd.toc.tracks[cdd.index].start)
@ -837,7 +837,7 @@ void cdd_update(void)
else if (cdd.index >= cdd.toc.last) else if (cdd.index >= cdd.toc.last)
{ {
/* no AUDIO track playing */ /* no AUDIO track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* end of disc */ /* end of disc */
cdd.index = cdd.toc.last; cdd.index = cdd.toc.last;
@ -850,7 +850,7 @@ void cdd_update(void)
if (!cdd.index) if (!cdd.index)
{ {
/* no AUDIO track playing */ /* no AUDIO track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* DATA track */ /* DATA track */
pm_seek(cdd.toc.tracks[0].fd, cdd.lba * cdd.sectorSize, SEEK_SET); pm_seek(cdd.toc.tracks[0].fd, cdd.lba * cdd.sectorSize, SEEK_SET);
@ -894,21 +894,21 @@ void cdd_update(void)
void cdd_process(void) void cdd_process(void)
{ {
/* Process CDD command */ /* Process CDD command */
switch (Pico_mcd->regs[0x42>>1].byte.h & 0x0f) switch (Pico_mcd->s68k_regs[0x42+0] & 0x0f)
{ {
case 0x00: /* Drive Status */ case 0x00: /* Drive Status */
{ {
/* RS1-RS8 normally unchanged */ /* RS1-RS8 normally unchanged */
Pico_mcd->regs[0x38>>1].byte.h = cdd.status; Pico_mcd->s68k_regs[0x38+0] = cdd.status;
/* unless RS1 indicated invalid track infos */ /* unless RS1 indicated invalid track infos */
if (Pico_mcd->regs[0x38>>1].byte.l == 0x0f) if (Pico_mcd->s68k_regs[0x38+1] == 0x0f)
{ {
/* and SEEK has ended */ /* and SEEK has ended */
if (cdd.status != CD_SEEK) if (cdd.status != CD_SEEK)
{ {
/* then return valid track infos, e.g current track number in RS2-RS3 (fixes Lunar - The Silver Star) */ /* then return valid track infos, e.g current track number in RS2-RS3 (fixes Lunar - The Silver Star) */
Pico_mcd->regs[0x38>>1].byte.l = 0x02; Pico_mcd->s68k_regs[0x38+1] = 0x02;
set_reg16(0x3a, (cdd.index < cdd.toc.last) ? lut_BCD_16[cdd.index + 1] : 0x0A0A); set_reg16(0x3a, (cdd.index < cdd.toc.last) ? lut_BCD_16[cdd.index + 1] : 0x0A0A);
} }
} }
@ -921,7 +921,7 @@ void cdd_process(void)
cdd.status = cdd.loaded ? CD_STOP : NO_DISC; cdd.status = cdd.loaded ? CD_STOP : NO_DISC;
/* no audio track playing */ /* no audio track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* RS1-RS8 ignored, expects 0x0 ("no disc" ?) in RS0 once */ /* RS1-RS8 ignored, expects 0x0 ("no disc" ?) in RS0 once */
set_reg16(0x38, 0x0000); set_reg16(0x38, 0x0000);
@ -939,7 +939,7 @@ void cdd_process(void)
/* Infos automatically retrieved by CDD processor from Q-Channel */ /* Infos automatically retrieved by CDD processor from Q-Channel */
/* commands 0x00-0x02 (current block) and 0x03-0x05 (Lead-In) */ /* commands 0x00-0x02 (current block) and 0x03-0x05 (Lead-In) */
switch (Pico_mcd->regs[0x44>>1].byte.l) switch (Pico_mcd->s68k_regs[0x44+1])
{ {
case 0x00: /* Current Absolute Time (MM:SS:FF) */ case 0x00: /* Current Absolute Time (MM:SS:FF) */
{ {
@ -948,7 +948,7 @@ void cdd_process(void)
set_reg16(0x3a, lut_BCD_16[(lba/75)/60]); set_reg16(0x3a, lut_BCD_16[(lba/75)/60]);
set_reg16(0x3c, lut_BCD_16[(lba/75)%60]); set_reg16(0x3c, lut_BCD_16[(lba/75)%60]);
set_reg16(0x3e, lut_BCD_16[(lba%75)]); set_reg16(0x3e, lut_BCD_16[(lba%75)]);
Pico_mcd->regs[0x40>>1].byte.h = cdd.index ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */ Pico_mcd->s68k_regs[0x40+0] = cdd.index ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */
break; break;
} }
@ -959,7 +959,7 @@ void cdd_process(void)
set_reg16(0x3a, lut_BCD_16[(lba/75)/60]); set_reg16(0x3a, lut_BCD_16[(lba/75)/60]);
set_reg16(0x3c, lut_BCD_16[(lba/75)%60]); set_reg16(0x3c, lut_BCD_16[(lba/75)%60]);
set_reg16(0x3e, lut_BCD_16[(lba%75)]); set_reg16(0x3e, lut_BCD_16[(lba%75)]);
Pico_mcd->regs[0x40>>1].byte.h = cdd.index ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */ Pico_mcd->s68k_regs[0x40+0] = cdd.index ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */
break; break;
} }
@ -969,7 +969,7 @@ void cdd_process(void)
set_reg16(0x3a, (cdd.index < cdd.toc.last) ? lut_BCD_16[cdd.index + 1] : 0x0A0A); set_reg16(0x3a, (cdd.index < cdd.toc.last) ? lut_BCD_16[cdd.index + 1] : 0x0A0A);
set_reg16(0x3c, 0x0000); set_reg16(0x3c, 0x0000);
set_reg16(0x3e, 0x0000); /* Disk Control Code (?) in RS6 */ set_reg16(0x3e, 0x0000); /* Disk Control Code (?) in RS6 */
Pico_mcd->regs[0x40>>1].byte.h = 0x00; Pico_mcd->s68k_regs[0x40+0] = 0x00;
break; break;
} }
@ -980,7 +980,7 @@ void cdd_process(void)
set_reg16(0x3a, lut_BCD_16[(lba/75)/60]); set_reg16(0x3a, lut_BCD_16[(lba/75)/60]);
set_reg16(0x3c, lut_BCD_16[(lba/75)%60]); set_reg16(0x3c, lut_BCD_16[(lba/75)%60]);
set_reg16(0x3e, lut_BCD_16[(lba%75)]); set_reg16(0x3e, lut_BCD_16[(lba%75)]);
Pico_mcd->regs[0x40>>1].byte.h = 0x00; Pico_mcd->s68k_regs[0x40+0] = 0x00;
break; break;
} }
@ -990,23 +990,23 @@ void cdd_process(void)
set_reg16(0x3a, 0x0001); set_reg16(0x3a, 0x0001);
set_reg16(0x3c, lut_BCD_16[cdd.toc.last]); set_reg16(0x3c, lut_BCD_16[cdd.toc.last]);
set_reg16(0x3e, 0x0000); /* Drive Version (?) in RS6-RS7 */ set_reg16(0x3e, 0x0000); /* Drive Version (?) in RS6-RS7 */
Pico_mcd->regs[0x40>>1].byte.h = 0x00; /* Lead-In flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */ Pico_mcd->s68k_regs[0x40+0] = 0x00; /* Lead-In flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */
break; break;
} }
case 0x05: /* Track Start Time (MM:SS:FF) */ case 0x05: /* Track Start Time (MM:SS:FF) */
{ {
int track = Pico_mcd->regs[0x46>>1].byte.h * 10 + Pico_mcd->regs[0x46>>1].byte.l; int track = Pico_mcd->s68k_regs[0x46+0] * 10 + Pico_mcd->s68k_regs[0x46+1];
int lba = cdd.toc.tracks[track-1].start + 150; int lba = cdd.toc.tracks[track-1].start + 150;
set_reg16(0x38, (cdd.status << 8) | 0x05); set_reg16(0x38, (cdd.status << 8) | 0x05);
set_reg16(0x3a, lut_BCD_16[(lba/75)/60]); set_reg16(0x3a, lut_BCD_16[(lba/75)/60]);
set_reg16(0x3c, lut_BCD_16[(lba/75)%60]); set_reg16(0x3c, lut_BCD_16[(lba/75)%60]);
set_reg16(0x3e, lut_BCD_16[(lba%75)]); set_reg16(0x3e, lut_BCD_16[(lba%75)]);
Pico_mcd->regs[0x40>>1].byte.h = track % 10; /* Track Number (low digit) */ Pico_mcd->s68k_regs[0x40+0] = track % 10; /* Track Number (low digit) */
if (track == 1) if (track == 1)
{ {
/* RS6 bit 3 is set for the first (DATA) track */ /* RS6 bit 3 is set for the first (DATA) track */
Pico_mcd->regs[0x3e>>1].byte.h |= 0x08; Pico_mcd->s68k_regs[0x3e + 0] |= 0x08;
} }
break; break;
} }
@ -1014,7 +1014,7 @@ void cdd_process(void)
default: default:
{ {
#ifdef LOG_ERROR #ifdef LOG_ERROR
error("Unknown CDD Command %02X (%X)\n", Pico_mcd->regs[0x44>>1].byte.l, s68k.pc); error("Unknown CDD Command %02X (%X)\n", Pico_mcd->s68k_regs[0x44+1], s68k.pc);
#endif #endif
return; return;
} }
@ -1028,9 +1028,9 @@ void cdd_process(void)
int index = 0; int index = 0;
/* new LBA position */ /* new LBA position */
int lba = ((Pico_mcd->regs[0x44>>1].byte.h * 10 + Pico_mcd->regs[0x44>>1].byte.l) * 60 + int lba = ((Pico_mcd->s68k_regs[0x44+0] * 10 + Pico_mcd->s68k_regs[0x44+1]) * 60 +
(Pico_mcd->regs[0x46>>1].byte.h * 10 + Pico_mcd->regs[0x46>>1].byte.l)) * 75 + (Pico_mcd->s68k_regs[0x46+0] * 10 + Pico_mcd->s68k_regs[0x46+1])) * 75 +
(Pico_mcd->regs[0x48>>1].byte.h * 10 + Pico_mcd->regs[0x48>>1].byte.l) - 150; (Pico_mcd->s68k_regs[0x48+0] * 10 + Pico_mcd->s68k_regs[0x48+1]) - 150;
/* CD drive latency */ /* CD drive latency */
if (!cdd.latency) if (!cdd.latency)
@ -1119,7 +1119,7 @@ void cdd_process(void)
#endif #endif
/* no audio track playing (yet) */ /* no audio track playing (yet) */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* update status */ /* update status */
cdd.status = CD_PLAY; cdd.status = CD_PLAY;
@ -1129,7 +1129,7 @@ void cdd_process(void)
set_reg16(0x3a, (cdd.index < cdd.toc.last) ? lut_BCD_16[index + 1] : 0x0A0A); set_reg16(0x3a, (cdd.index < cdd.toc.last) ? lut_BCD_16[index + 1] : 0x0A0A);
set_reg16(0x3c, 0x0000); set_reg16(0x3c, 0x0000);
set_reg16(0x3e, 0x0000); set_reg16(0x3e, 0x0000);
Pico_mcd->regs[0x40>>1].byte.h = 0x00; Pico_mcd->s68k_regs[0x40+0] = 0x00;
break; break;
} }
@ -1139,9 +1139,9 @@ void cdd_process(void)
int index = 0; int index = 0;
/* new LBA position */ /* new LBA position */
int lba = ((Pico_mcd->regs[0x44>>1].byte.h * 10 + Pico_mcd->regs[0x44>>1].byte.l) * 60 + int lba = ((Pico_mcd->s68k_regs[0x44+0] * 10 + Pico_mcd->s68k_regs[0x44+1]) * 60 +
(Pico_mcd->regs[0x46>>1].byte.h * 10 + Pico_mcd->regs[0x46>>1].byte.l)) * 75 + (Pico_mcd->s68k_regs[0x46+0] * 10 + Pico_mcd->s68k_regs[0x46+1])) * 75 +
(Pico_mcd->regs[0x48>>1].byte.h * 10 + Pico_mcd->regs[0x48>>1].byte.l) - 150; (Pico_mcd->s68k_regs[0x48+0] * 10 + Pico_mcd->s68k_regs[0x48+1]) - 150;
/* CD drive seek time */ /* CD drive seek time */
/* We are using similar linear model as above, although still not exactly accurate, */ /* We are using similar linear model as above, although still not exactly accurate, */
@ -1213,7 +1213,7 @@ void cdd_process(void)
#endif #endif
/* no audio track playing */ /* no audio track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* update status */ /* update status */
cdd.status = CD_SEEK; cdd.status = CD_SEEK;
@ -1230,17 +1230,17 @@ void cdd_process(void)
case 0x06: /* Pause */ case 0x06: /* Pause */
{ {
/* no audio track playing */ /* no audio track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* update status (RS1-RS8 unchanged) */ /* update status (RS1-RS8 unchanged) */
cdd.status = Pico_mcd->regs[0x38>>1].byte.h = CD_READY; cdd.status = Pico_mcd->s68k_regs[0x38+0] = CD_READY;
break; break;
} }
case 0x07: /* Resume */ case 0x07: /* Resume */
{ {
/* update status (RS1-RS8 unchanged) */ /* update status (RS1-RS8 unchanged) */
cdd.status = Pico_mcd->regs[0x38>>1].byte.h = CD_PLAY; cdd.status = Pico_mcd->s68k_regs[0x38+0] = CD_PLAY;
break; break;
} }
@ -1250,7 +1250,7 @@ void cdd_process(void)
cdd.scanOffset = CD_SCAN_SPEED; cdd.scanOffset = CD_SCAN_SPEED;
/* update status (RS1-RS8 unchanged) */ /* update status (RS1-RS8 unchanged) */
cdd.status = Pico_mcd->regs[0x38>>1].byte.h = CD_SCAN; cdd.status = Pico_mcd->s68k_regs[0x38+0] = CD_SCAN;
break; break;
} }
@ -1260,7 +1260,7 @@ void cdd_process(void)
cdd.scanOffset = -CD_SCAN_SPEED; cdd.scanOffset = -CD_SCAN_SPEED;
/* update status (RS1-RS8 unchanged) */ /* update status (RS1-RS8 unchanged) */
cdd.status = Pico_mcd->regs[0x38>>1].byte.h = CD_SCAN; cdd.status = Pico_mcd->s68k_regs[0x38+0] = CD_SCAN;
break; break;
} }
@ -1273,17 +1273,17 @@ void cdd_process(void)
/* also see US Patent nr. 5222054 for a detailled description of seeking operation using Track Jump */ /* also see US Patent nr. 5222054 for a detailled description of seeking operation using Track Jump */
/* no audio track playing */ /* no audio track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* update status (RS1-RS8 unchanged) */ /* update status (RS1-RS8 unchanged) */
cdd.status = Pico_mcd->regs[0x38>>1].byte.h = CD_READY; cdd.status = Pico_mcd->s68k_regs[0x38+0] = CD_READY;
break; break;
} }
case 0x0c: /* Close Tray */ case 0x0c: /* Close Tray */
{ {
/* no audio track playing */ /* no audio track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* update status */ /* update status */
cdd.status = cdd.loaded ? CD_STOP : NO_DISC; cdd.status = cdd.loaded ? CD_STOP : NO_DISC;
@ -1304,7 +1304,7 @@ void cdd_process(void)
case 0x0d: /* Open Tray */ case 0x0d: /* Open Tray */
{ {
/* no audio track playing */ /* no audio track playing */
Pico_mcd->regs[0x36>>1].byte.h = 0x01; Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* update status (RS1-RS8 ignored) */ /* update status (RS1-RS8 ignored) */
cdd.status = CD_OPEN; cdd.status = CD_OPEN;
@ -1323,17 +1323,17 @@ void cdd_process(void)
#ifdef LOG_CDD #ifdef LOG_CDD
error("Unknown CDD Command !!!\n"); error("Unknown CDD Command !!!\n");
#endif #endif
Pico_mcd->regs[0x38>>1].byte.h = cdd.status; Pico_mcd->s68k_regs[0x38+0] = cdd.status;
break; break;
} }
/* only compute checksum when necessary */ /* only compute checksum when necessary */
Pico_mcd->regs[0x40>>1].byte.l = Pico_mcd->s68k_regs[0x40 + 1] =
~(Pico_mcd->regs[0x38>>1].byte.h + Pico_mcd->regs[0x38>>1].byte.l + ~(Pico_mcd->s68k_regs[0x38 + 0] + Pico_mcd->s68k_regs[0x38 + 1] +
Pico_mcd->regs[0x3a>>1].byte.h + Pico_mcd->regs[0x3a>>1].byte.l + Pico_mcd->s68k_regs[0x3a + 0] + Pico_mcd->s68k_regs[0x3a + 1] +
Pico_mcd->regs[0x3c>>1].byte.h + Pico_mcd->regs[0x3c>>1].byte.l + Pico_mcd->s68k_regs[0x3c + 0] + Pico_mcd->s68k_regs[0x3c + 1] +
Pico_mcd->regs[0x3e>>1].byte.h + Pico_mcd->regs[0x3e>>1].byte.l + Pico_mcd->s68k_regs[0x3e + 0] + Pico_mcd->s68k_regs[0x3e + 1] +
Pico_mcd->regs[0x40>>1].byte.h) & 0x0f; Pico_mcd->s68k_regs[0x40 + 0]) & 0x0f;
} }
// vim:shiftwidth=2:ts=2:expandtab // vim:shiftwidth=2:ts=2:expandtab

16
pico/cd/genplus_macros.h
View file

@ -12,22 +12,6 @@
#define int16 signed short #define int16 signed short
#define int32 signed int #define int32 signed int
typedef union
{
uint16 w;
struct
{
#if 1
uint8 l;
uint8 h;
#else
uint8 h;
uint8 l;
#endif
} byte;
} reg16_t;
#define READ_BYTE(BASE, ADDR) (BASE)[(ADDR)^1] #define READ_BYTE(BASE, ADDR) (BASE)[(ADDR)^1]
#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[(ADDR)^1] = (VAL) #define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[(ADDR)^1] = (VAL)

2
pico/cd/memory.c
View file

@ -385,7 +385,7 @@ void s68k_reg_write8(u32 a, u32 d)
//dprintf("s68k CDC reg addr: %x", d&0xf); //dprintf("s68k CDC reg addr: %x", d&0xf);
break; break;
case 7: case 7:
cdc_reg_w(d); cdc_reg_w(d & 0xff);
return; return;
case 0xa: case 0xa:
elprintf(EL_CDREGS, "s68k set CDC dma addr"); elprintf(EL_CDREGS, "s68k set CDC dma addr");

10
pico/pico_int.h
View file

@ -434,15 +434,7 @@ typedef struct
unsigned char pcm_ram[0x10000]; unsigned char pcm_ram[0x10000];
unsigned char pcm_ram_b[0x10][0x1000]; unsigned char pcm_ram_b[0x10][0x1000];
}; };
union { unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
union {
struct {
unsigned char h;
unsigned char l;
} byte;
} regs[0x200/2];
};
unsigned char bram[0x2000]; // 110200: 8K unsigned char bram[0x2000]; // 110200: 8K
struct mcd_misc m; // 112200: misc struct mcd_misc m; // 112200: misc
struct mcd_pcm pcm; // 112240: struct mcd_pcm pcm; // 112240: