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core vdp, minor fifo write optimisation

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kub 2022-03-06 22:18:52 +00:00
parent f507a70379
commit f591b83785
1 changed files with 7 additions and 9 deletions
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16
pico/videoport.c
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@ -345,20 +345,18 @@ int PicoVideoFIFOWrite(int count, int flags, unsigned sr_mask,unsigned sr_flags)
int burn = 0, x; int burn = 0, x;
// sync only needed if queue is too full or background dma might be deferred // sync only needed if queue is too full or background dma might be deferred
if ((vf->fifo_ql >= 6) | (pv->status & SR_DMA)) if ((vf->fifo_ql >= 6) | (pv->status & PVS_DMABG))
PicoVideoFIFOSync(lc); PicoVideoFIFOSync(lc);
// determine last ent, ignoring bg dma (pushed back below if new ent created)
x = (vf->fifo_qx + vf->fifo_ql - 1 - !!(pv->status & PVS_DMABG)) & 7;
pv->status = (pv->status & ~sr_mask) | sr_flags; pv->status = (pv->status & ~sr_mask) | sr_flags;
vf->fifo_total += count * !(flags & FQ_BGDMA);
x = (vf->fifo_qx + vf->fifo_ql - 1) & 7;
if (unlikely(vf->fifo_queue[x] & FQ_BGDMA))
x = (x-1) & 7; // ignore bg dma ent (pushed back below if new ent created)
// determine queue position for entry
if (!(flags & FQ_BGDMA))
vf->fifo_total += count;
if (!vf->fifo_ql) if (!vf->fifo_ql)
vf->fifo_slot = Cyc2Sl(vf, lc+7); // FIFO latency ~3 vdp slots vf->fifo_slot = Cyc2Sl(vf, lc+7); // FIFO latency ~3 vdp slots
// determine queue position for entry
count <<= (flags & FQ_BYTE)+3; count <<= (flags & FQ_BYTE)+3;
if (vf->fifo_queue[x] && (vf->fifo_queue[x] & 7) == flags) { if (vf->fifo_queue[x] && (vf->fifo_queue[x] & 7) == flags) {
// amalgamate entries if of same type and not empty (in case of bgdma) // amalgamate entries if of same type and not empty (in case of bgdma)