mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
32x: memhandler improvements
- use consistent read tables (with write) - use sh2 ptr instead of id - place data_array/peri_regs in sh2 struct
This commit is contained in:
notaz
parent
c1931173ab
commit
f81107f590
11 changed files with 224 additions and 223 deletions
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@ -59,7 +59,7 @@ struct dmac {
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static void dmac_te_irq(SH2 *sh2, struct dma_chan *chan)
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{
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char *regs = (void *)Pico32xMem->sh2_peri_regs[sh2->is_slave];
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char *regs = (void *)sh2->peri_regs;
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struct dmac *dmac = (void *)(regs + 0x180);
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int level = PREG8(regs, 0xe2) & 0x0f; // IPRA
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int vector = (chan == &dmac->chan[0]) ?
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@ -167,7 +167,7 @@ void p32x_timers_recalc(void)
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// SH2 timer step
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for (i = 0; i < 2; i++) {
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tmp = PREG8(Pico32xMem->sh2_peri_regs[i], 0x80) & 7;
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tmp = PREG8(sh2s[i].peri_regs, 0x80) & 7;
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// Sclk cycles per timer tick
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if (tmp)
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cycles = 0x20 << tmp;
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@ -186,7 +186,7 @@ void p32x_timers_do(unsigned int m68k_slice)
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// WDT timers
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for (i = 0; i < 2; i++) {
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void *pregs = Pico32xMem->sh2_peri_regs[i];
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void *pregs = sh2s[i].peri_regs;
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if (PREG8(pregs, 0x80) & 0x20) { // TME
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timer_cycles[i] += cycles;
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cnt = PREG8(pregs, 0x81);
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@ -211,44 +211,48 @@ void p32x_timers_do(unsigned int m68k_slice)
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// SH2 internal peripheral memhandlers
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// we keep them in little endian format
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u32 sh2_peripheral_read8(u32 a, int id)
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u32 sh2_peripheral_read8(u32 a, SH2 *sh2)
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{
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u8 *r = (void *)Pico32xMem->sh2_peri_regs[id];
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u8 *r = (void *)sh2->peri_regs;
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u32 d;
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a &= 0x1ff;
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d = PREG8(r, a);
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elprintf(EL_32XP, "%csh2 peri r8 [%08x] %02x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
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elprintf(EL_32XP, "%csh2 peri r8 [%08x] %02x @%06x",
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sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
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return d;
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}
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u32 sh2_peripheral_read16(u32 a, int id)
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u32 sh2_peripheral_read16(u32 a, SH2 *sh2)
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{
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u16 *r = (void *)Pico32xMem->sh2_peri_regs[id];
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u16 *r = (void *)sh2->peri_regs;
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u32 d;
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a &= 0x1ff;
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d = r[(a / 2) ^ 1];
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elprintf(EL_32XP, "%csh2 peri r16 [%08x] %04x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
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elprintf(EL_32XP, "%csh2 peri r16 [%08x] %04x @%06x",
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sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
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return d;
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}
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u32 sh2_peripheral_read32(u32 a, int id)
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u32 sh2_peripheral_read32(u32 a, SH2 *sh2)
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{
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u32 d;
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a &= 0x1fc;
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d = Pico32xMem->sh2_peri_regs[id][a / 4];
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d = sh2->peri_regs[a / 4];
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elprintf(EL_32XP, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
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elprintf(EL_32XP, "%csh2 peri r32 [%08x] %08x @%06x",
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sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
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return d;
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}
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int REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, int id)
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void REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, SH2 *sh2)
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{
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u8 *r = (void *)Pico32xMem->sh2_peri_regs[id];
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elprintf(EL_32XP, "%csh2 peri w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
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u8 *r = (void *)sh2->peri_regs;
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elprintf(EL_32XP, "%csh2 peri w8 [%08x] %02x @%06x",
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sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
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a &= 0x1ff;
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PREG8(r, a) = d;
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@ -256,22 +260,23 @@ int REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, int id)
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// X-men SCI hack
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if ((a == 2 && (d & 0x20)) || // transmiter enabled
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(a == 4 && !(d & 0x80))) { // valid data in TDR
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void *oregs = Pico32xMem->sh2_peri_regs[id ^ 1];
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void *oregs = sh2->other_sh2->peri_regs;
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if ((PREG8(oregs, 2) & 0x50) == 0x50) { // receiver + irq enabled
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int level = PREG8(oregs, 0x60) >> 4;
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int vector = PREG8(oregs, 0x63) & 0x7f;
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elprintf(EL_32XP, "%csh2 SCI recv irq (%d, %d)", (id ^ 1) ? 's' : 'm', level, vector);
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sh2_internal_irq(&sh2s[id ^ 1], level, vector);
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return 1;
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elprintf(EL_32XP, "%csh2 SCI recv irq (%d, %d)",
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(sh2->is_slave ^ 1) ? 's' : 'm', level, vector);
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sh2_internal_irq(sh2->other_sh2, level, vector);
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return;
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}
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}
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return 0;
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}
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int REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, int id)
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void REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, SH2 *sh2)
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{
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u16 *r = (void *)Pico32xMem->sh2_peri_regs[id];
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elprintf(EL_32XP, "%csh2 peri w16 [%08x] %04x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
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u16 *r = (void *)sh2->peri_regs;
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elprintf(EL_32XP, "%csh2 peri w16 [%08x] %04x @%06x",
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sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
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a &= 0x1ff;
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@ -283,17 +288,17 @@ int REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, int id)
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}
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if ((d & 0xff00) == 0x5a00) // WTCNT
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PREG8(r, 0x81) = d;
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return 0;
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return;
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}
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r[(a / 2) ^ 1] = d;
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return 0;
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}
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void sh2_peripheral_write32(u32 a, u32 d, int id)
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void sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2)
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{
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u32 *r = Pico32xMem->sh2_peri_regs[id];
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elprintf(EL_32XP, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
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u32 *r = sh2->peri_regs;
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elprintf(EL_32XP, "%csh2 peri w32 [%08x] %08x @%06x",
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sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
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a &= 0x1fc;
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r[a / 4] = d;
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@ -301,7 +306,8 @@ void sh2_peripheral_write32(u32 a, u32 d, int id)
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switch (a) {
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// division unit (TODO: verify):
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case 0x104: // DVDNT: divident L, starts divide
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elprintf(EL_32XP, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]);
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elprintf(EL_32XP, "%csh2 divide %08x / %08x",
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sh2->is_slave ? 's' : 'm', d, r[0x100 / 4]);
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if (r[0x100 / 4]) {
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signed int divisor = r[0x100 / 4];
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r[0x118 / 4] = r[0x110 / 4] = (signed int)d % divisor;
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@ -312,7 +318,7 @@ void sh2_peripheral_write32(u32 a, u32 d, int id)
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break;
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case 0x114:
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elprintf(EL_32XP, "%csh2 divide %08x%08x / %08x @%08x",
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id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id));
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sh2->is_slave ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(sh2));
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if (r[0x100 / 4]) {
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signed long long divident = (signed long long)r[0x110 / 4] << 32 | d;
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signed int divisor = r[0x100 / 4];
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@ -322,7 +328,8 @@ void sh2_peripheral_write32(u32 a, u32 d, int id)
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r[0x11c / 4] = r[0x114 / 4] = divident;
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divident >>= 31;
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if ((unsigned long long)divident + 1 > 1) {
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//elprintf(EL_32XP, "%csh2 divide overflow! @%08x", id ? 's' : 'm', sh2_pc(id));
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//elprintf(EL_32XP, "%csh2 divide overflow! @%08x",
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// sh2->is_slave ? 's' : 'm', sh2_pc(sh2));
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r[0x11c / 4] = r[0x114 / 4] = divident > 0 ? 0x7fffffff : 0x80000000; // overflow
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}
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}
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@ -333,14 +340,14 @@ void sh2_peripheral_write32(u32 a, u32 d, int id)
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// perhaps starting a DMA?
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if (a == 0x1b0 || a == 0x18c || a == 0x19c) {
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struct dmac *dmac = (void *)&Pico32xMem->sh2_peri_regs[id][0x180 / 4];
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struct dmac *dmac = (void *)&sh2->peri_regs[0x180 / 4];
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if (!(dmac->dmaor & DMA_DME))
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return;
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if ((dmac->chan[0].chcr & (DMA_TE|DMA_DE)) == DMA_DE)
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dmac_trigger(&sh2s[id], &dmac->chan[0]);
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dmac_trigger(sh2, &dmac->chan[0]);
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if ((dmac->chan[1].chcr & (DMA_TE|DMA_DE)) == DMA_DE)
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dmac_trigger(&sh2s[id], &dmac->chan[1]);
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dmac_trigger(sh2, &dmac->chan[1]);
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}
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}
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@ -401,8 +408,8 @@ static void dreq1_do(SH2 *sh2, struct dma_chan *chan)
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void p32x_dreq0_trigger(void)
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{
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struct dmac *mdmac = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
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struct dmac *sdmac = (void *)&Pico32xMem->sh2_peri_regs[1][0x180 / 4];
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struct dmac *mdmac = (void *)&msh2.peri_regs[0x180 / 4];
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struct dmac *sdmac = (void *)&ssh2.peri_regs[0x180 / 4];
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elprintf(EL_32XP, "dreq0_trigger");
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if ((mdmac->dmaor & DMA_DME) && (mdmac->chan[0].chcr & 3) == DMA_DE) {
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@ -415,8 +422,8 @@ void p32x_dreq0_trigger(void)
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void p32x_dreq1_trigger(void)
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{
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struct dmac *mdmac = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
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struct dmac *sdmac = (void *)&Pico32xMem->sh2_peri_regs[1][0x180 / 4];
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struct dmac *mdmac = (void *)&msh2.peri_regs[0x180 / 4];
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struct dmac *sdmac = (void *)&ssh2.peri_regs[0x180 / 4];
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int hit = 0;
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elprintf(EL_32XP, "dreq1_trigger");
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