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32x: simplify logging a bit

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This commit is contained in:
notaz 2013-08-12 00:24:19 +03:00
parent 8a847c12e6
commit f8675e282e
5 changed files with 40 additions and 37 deletions
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4
cpu/sh2/compiler.c
View file

@ -1552,8 +1552,8 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
if (delay_dep_bk & BITMASK1(SHR_PC)) {
if (opd->op != OP_LOAD_POOL && opd->op != OP_MOVA) {
// can only be those 2 really..
elprintf(EL_ANOMALY, "%csh2 drc: illegal slot insn %04x @ %08x?",
sh2->is_slave ? 's' : 'm', op, pc - 2);
elprintf_sh2(sh2, EL_ANOMALY,
"drc: illegal slot insn %04x @ %08x?", op, pc - 2);
}
if (opd->imm != 0)
; // addr already resolved somehow

20
pico/32x/32x.c
View file

@ -17,12 +17,12 @@ SH2 sh2s[2];
static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
{
if (sh2->pending_irl > sh2->pending_int_irq) {
elprintf(EL_32X, "%csh2 ack/irl %d @ %08x",
sh2->is_slave ? 's' : 'm', level, sh2->pc);
elprintf_sh2(sh2, EL_32X, "ack/irl %d @ %08x",
level, sh2_pc(sh2));
return 64 + sh2->pending_irl / 2;
} else {
elprintf(EL_32X, "%csh2 ack/int %d/%d @ %08x",
sh2->is_slave ? 's' : 'm', level, sh2->pending_int_vector, sh2->pc);
elprintf_sh2(sh2, EL_32X, "ack/int %d/%d @ %08x",
level, sh2->pending_int_vector, sh2_pc(sh2));
sh2->pending_int_irq = 0; // auto-clear
sh2->pending_level = sh2->pending_irl;
return sh2->pending_int_vector;
@ -323,16 +323,16 @@ static inline void run_sh2(SH2 *sh2, int m68k_cycles)
pevt_log_sh2_o(sh2, EVT_RUN_START);
sh2->state |= SH2_STATE_RUN;
cycles = C_M68K_TO_SH2(*sh2, m68k_cycles);
elprintf(EL_32X, "%csh2 +run %u %d @%08x",
sh2->is_slave?'s':'m', sh2->m68krcycles_done, cycles, sh2->pc);
elprintf_sh2(sh2, EL_32X, "+run %u %d @%08x",
sh2->m68krcycles_done, cycles, sh2->pc);
done = sh2_execute(sh2, cycles);
sh2->m68krcycles_done += C_SH2_TO_M68K(*sh2, done);
sh2->state &= ~SH2_STATE_RUN;
pevt_log_sh2_o(sh2, EVT_RUN_END);
elprintf(EL_32X, "%csh2 -run %u %d",
sh2->is_slave?'s':'m', sh2->m68krcycles_done, done);
elprintf_sh2(sh2, EL_32X, "-run %u %d",
sh2->m68krcycles_done, done);
}
// sync other sh2 to this one
@ -355,8 +355,8 @@ void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target)
return;
}
elprintf(EL_32X, "%csh2 sync to %u %d",
osh2->is_slave?'s':'m', m68k_target, m68k_cycles);
elprintf_sh2(osh2, EL_32X, "sync to %u %d",
m68k_target, m68k_cycles);
run_sh2(osh2, m68k_cycles);

38
pico/32x/memory.c
View file

@ -103,7 +103,7 @@ static void sh2_poll_detect(SH2 *sh2, u32 a, u32 flags, int maxcnt)
if (a == sh2->poll_addr && sh2->poll_cycles - cycles_left <= 10) {
if (sh2->poll_cnt++ > maxcnt) {
if (!(sh2->state & flags))
elprintf(EL_32X, "%csh2 state: %02x->%02x", sh2->is_slave?'s':'m',
elprintf_sh2(sh2, EL_32X, "state: %02x->%02x",
sh2->state, sh2->state | flags);
sh2->state |= flags;
@ -121,8 +121,8 @@ static void sh2_poll_detect(SH2 *sh2, u32 a, u32 flags, int maxcnt)
void p32x_sh2_poll_event(SH2 *sh2, u32 flags, u32 m68k_cycles)
{
if (sh2->state & flags) {
elprintf(EL_32X, "%csh2 state: %02x->%02x", sh2->is_slave?'s':'m',
sh2->state, sh2->state & ~flags);
elprintf_sh2(sh2, EL_32X, "state: %02x->%02x", sh2->state,
sh2->state & ~flags);
if (sh2->m68krcycles_done < m68k_cycles)
sh2->m68krcycles_done = m68k_cycles;
@ -1054,8 +1054,8 @@ static void bank_switch(int b)
// read8
static u32 sh2_read8_unmapped(u32 a, SH2 *sh2)
{
elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
sh2->is_slave ? 's' : 'm', a, 0, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32X, "unmapped r8 [%08x] %02x @%06x",
a, 0, sh2_pc(sh2));
return 0;
}
@ -1096,8 +1096,8 @@ out_16to8:
else
d >>= 8;
elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32X, "r8 [%08x] %02x @%06x",
a, d, sh2_pc(sh2));
return d;
}
@ -1109,8 +1109,8 @@ static u32 sh2_read8_da(u32 a, SH2 *sh2)
// read16
static u32 sh2_read16_unmapped(u32 a, SH2 *sh2)
{
elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
sh2->is_slave ? 's' : 'm', a, 0, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32X, "unmapped r16 [%08x] %04x @%06x",
a, 0, sh2_pc(sh2));
return 0;
}
@ -1146,8 +1146,8 @@ static u32 sh2_read16_cs0(u32 a, SH2 *sh2)
return sh2_read16_unmapped(a, sh2);
out:
elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32X, "r16 [%08x] %04x @%06x",
a, d, sh2_pc(sh2));
return d;
}
@ -1164,14 +1164,14 @@ static void REGPARM(3) sh2_write_ignore(u32 a, u32 d, SH2 *sh2)
// write8
static void REGPARM(3) sh2_write8_unmapped(u32 a, u32 d, SH2 *sh2)
{
elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
sh2->is_slave ? 's' : 'm', a, d & 0xff, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32X, "unmapped w8 [%08x] %02x @%06x",
a, d & 0xff, sh2_pc(sh2));
}
static void REGPARM(3) sh2_write8_cs0(u32 a, u32 d, SH2 *sh2)
{
elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
sh2->is_slave ? 's' : 'm', a, d & 0xff, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32X, "w8 [%08x] %02x @%06x",
a, d & 0xff, sh2_pc(sh2));
if (Pico32x.regs[0] & P32XS_FM) {
if ((a & 0x3ff00) == 0x4100) {
@ -1234,15 +1234,15 @@ static void REGPARM(3) sh2_write8_da(u32 a, u32 d, SH2 *sh2)
// write16
static void REGPARM(3) sh2_write16_unmapped(u32 a, u32 d, SH2 *sh2)
{
elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
sh2->is_slave ? 's' : 'm', a, d & 0xffff, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32X, "unmapped w16 [%08x] %04x @%06x",
a, d & 0xffff, sh2_pc(sh2));
}
static void REGPARM(3) sh2_write16_cs0(u32 a, u32 d, SH2 *sh2)
{
if (((EL_LOGMASK & EL_PWM) || (a & 0x30) != 0x30)) // hide PWM
elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
sh2->is_slave ? 's' : 'm', a, d & 0xffff, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32X, "w16 [%08x] %04x @%06x",
a, d & 0xffff, sh2_pc(sh2));
if (Pico32x.regs[0] & P32XS_FM) {
if ((a & 0x3ff00) == 0x4100) {

12
pico/32x/sh2soc.c
View file

@ -128,7 +128,7 @@ static void dmac_transfer_one(SH2 *sh2, struct dma_chan *chan)
// DMA trigger by SH2 register write
static void dmac_trigger(SH2 *sh2, struct dma_chan *chan)
{
elprintf(EL_32XP, "sh2 DMA %08x->%08x, cnt %d, chcr %04x @%06x",
elprintf_sh2(sh2, EL_32XP, "DMA %08x->%08x, cnt %d, chcr %04x @%06x",
chan->sar, chan->dar, chan->tcr, chan->chcr, sh2->pc);
chan->tcr &= 0xffffff;
@ -279,7 +279,7 @@ static void sci_trigger(SH2 *sh2, u8 *r)
if (PREG8(r, 2) & 0x80) { // TIE - tx irq enabled
int level = PREG8(oregs, 0x60) >> 4;
int vector = PREG8(oregs, 0x64) & 0x7f;
elprintf(EL_32XP, "SCI tx irq (%d, %d)",
elprintf_sh2(sh2, EL_32XP, "SCI tx irq (%d, %d)",
level, vector);
sh2_internal_irq(sh2, level, vector);
}
@ -287,7 +287,7 @@ static void sci_trigger(SH2 *sh2, u8 *r)
if (PREG8(oregs, 2) & 0x40) { // RIE - rx irq enabled
int level = PREG8(oregs, 0x60) >> 4;
int vector = PREG8(oregs, 0x63) & 0x7f;
elprintf(EL_32XP, "SCI rx irq (%d, %d)",
elprintf_sh2(sh2->other_sh2, EL_32XP, "SCI rx irq (%d, %d)",
level, vector);
sh2_internal_irq(sh2->other_sh2, level, vector);
}
@ -298,8 +298,8 @@ void REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, SH2 *sh2)
u8 *r = (void *)sh2->peri_regs;
u8 old;
elprintf(EL_32XP, "%csh2 peri w8 [%08x] %02x @%06x",
sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
elprintf_sh2(sh2, EL_32XP, "peri w8 [%08x] %02x @%06x",
a, d, sh2_pc(sh2));
a &= 0x1ff;
old = PREG8(r, a);
@ -435,7 +435,7 @@ static void dreq0_do(SH2 *sh2, struct dma_chan *chan)
sh2->state |= SH2_STATE_SLEEP;
for (i = 0; i < Pico32x.dmac0_fifo_ptr && chan->tcr > 0; i++) {
elprintf(EL_32XP, "dreq0 [%08x] %04x, dreq_len %d",
elprintf_sh2(sh2, EL_32XP, "dreq0 [%08x] %04x, dreq_len %d",
chan->dar, Pico32x.dmac_fifo[i], dreqlen);
p32x_sh2_write16(chan->dar, Pico32x.dmac_fifo[i], sh2);
chan->dar += 2;

3
pico/pico_int.h
View file

@ -283,6 +283,9 @@ extern SH2 sh2s[2];
#define sh2_set_vbr(c, v) \
{ if (c) ssh2.vbr = v; else msh2.vbr = v; }
#define elprintf_sh2(sh2, w, f, ...) \
elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__)
// ---------------------------------------------------------
// main oscillator clock which controls timing